From: richardbarry Date: Wed, 23 Jan 2013 16:06:45 +0000 (+0000) Subject: Replace the CLZ function with a CLZ intrinsic in the Cortex-R4 port layer. X-Git-Tag: V7.4.0~17 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=c9abc95052c5eb2f876817ea3711da36c7be4a87;p=freertos Replace the CLZ function with a CLZ intrinsic in the Cortex-R4 port layer. Add EDS support in the PIC24 port layer. Remove unnecessary EHB instructions from PIC32 port. In the PIC32 port assembly code, replace the &= code with a single ins instruction. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1814 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- diff --git a/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portASM.asm b/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portASM.asm index 989e5dbb3..803cbd850 100644 --- a/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portASM.asm +++ b/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portASM.asm @@ -233,15 +233,6 @@ vPortPreemptiveTick: ; Restore the context of the task selected to execute. portRESTORE_CONTEXT -;------------------------------------------------------------------------------- - - .def ulPortCountLeadingZeros - -ulPortCountLeadingZeros: - - CLZ R0, R0 - BX LR - ;------------------------------------------------------------------------------- .if (__TI_VFP_SUPPORT__) diff --git a/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portmacro.h b/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portmacro.h index b2315dfc2..f11c38a25 100644 --- a/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portmacro.h +++ b/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portmacro.h @@ -122,9 +122,6 @@ extern void vPortYield( void ); /* Architecture specific optimisations. */ #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 - /* Generic helper function. */ - unsigned long ulPortCountLeadingZeros( unsigned long ulBitmap ); - /* Check the configuration. */ #if( configMAX_PRIORITIES > 32 ) #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice. @@ -136,7 +133,7 @@ extern void vPortYield( void ); /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - ulPortCountLeadingZeros( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ diff --git a/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/port.c b/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/port.c index 297beee53..fdd2fb202 100644 --- a/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/port.c +++ b/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/port.c @@ -1,7 +1,7 @@ /* FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd. - FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT + FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. *************************************************************************** @@ -42,7 +42,7 @@ FreeRTOS WEB site. 1 tab == 4 spaces! - + *************************************************************************** * * * Having a problem? Start by reading the FAQ "My application does * @@ -52,17 +52,17 @@ * * *************************************************************************** - - http://www.FreeRTOS.org - Documentation, training, latest versions, license - and contact details. - + + http://www.FreeRTOS.org - Documentation, training, latest versions, license + and contact details. + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, including FreeRTOS+Trace - an indispensable productivity tool. - Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell - the code with commercial support, indemnification, and middleware, under + Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell + the code with commercial support, indemnification, and middleware, under the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also - provide a safety engineered and independently SIL3 certified version under + provide a safety engineered and independently SIL3 certified version under the SafeRTOS brand: http://www.SafeRTOS.com. */ @@ -85,7 +85,7 @@ #define portTIMER_PRESCALE 8 #define portINITIAL_SR 0 -/* Defined for backward compatability with project created prior to +/* Defined for backward compatability with project created prior to FreeRTOS.org V4.3.0. */ #ifndef configKERNEL_INTERRUPT_PRIORITY #define configKERNEL_INTERRUPT_PRIORITY 1 @@ -103,25 +103,46 @@ unsigned portBASE_TYPE uxCriticalNesting = 0xef; #ifdef MPLAB_PIC24_PORT - #define portRESTORE_CONTEXT() \ - asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \ - "MOV [W0], W15 \n" \ - "POP W0 \n" /* Restore the critical nesting counter for the task. */ \ - "MOV W0, _uxCriticalNesting \n" \ - "POP PSVPAG \n" \ - "POP CORCON \n" \ - "POP TBLPAG \n" \ - "POP RCOUNT \n" /* Restore the registers from the stack. */ \ - "POP W14 \n" \ - "POP.D W12 \n" \ - "POP.D W10 \n" \ - "POP.D W8 \n" \ - "POP.D W6 \n" \ - "POP.D W4 \n" \ - "POP.D W2 \n" \ - "POP.D W0 \n" \ - "POP SR " ); - + #ifdef __HAS_EDS__ + #define portRESTORE_CONTEXT() \ + asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \ + "MOV [W0], W15 \n" \ + "POP W0 \n" /* Restore the critical nesting counter for the task. */ \ + "MOV W0, _uxCriticalNesting \n" \ + "POP DSWPAG \n" \ + "POP DSRPAG \n" \ + "POP CORCON \n" \ + "POP TBLPAG \n" \ + "POP RCOUNT \n" /* Restore the registers from the stack. */ \ + "POP W14 \n" \ + "POP.D W12 \n" \ + "POP.D W10 \n" \ + "POP.D W8 \n" \ + "POP.D W6 \n" \ + "POP.D W4 \n" \ + "POP.D W2 \n" \ + "POP.D W0 \n" \ + "POP SR " ); + #else /* __HAS_EDS__ */ + #define portRESTORE_CONTEXT() \ + asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \ + "MOV [W0], W15 \n" \ + "POP W0 \n" /* Restore the critical nesting counter for the task. */ \ + "MOV W0, _uxCriticalNesting \n" \ + "POP PSVPAG \n" \ + "POP CORCON \n" \ + "POP TBLPAG \n" \ + "POP RCOUNT \n" /* Restore the registers from the stack. */ \ + "POP W14 \n" \ + "POP.D W12 \n" \ + "POP.D W10 \n" \ + "POP.D W8 \n" \ + "POP.D W6 \n" \ + "POP.D W4 \n" \ + "POP.D W2 \n" \ + "POP.D W0 \n" \ + "POP SR " ); + #endif /* __HAS_EDS__ */ #endif /* MPLAB_PIC24_PORT */ #ifdef MPLAB_DSPIC_PORT @@ -163,15 +184,15 @@ unsigned portBASE_TYPE uxCriticalNesting = 0xef; */ static void prvSetupTimerInterrupt( void ); -/* - * See header file for description. +/* + * See header file for description. */ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) { unsigned short usCode; portBASE_TYPE i; -const portSTACK_TYPE xInitialStack[] = +const portSTACK_TYPE xInitialStack[] = { 0x1111, /* W1 */ 0x2222, /* W2 */ @@ -235,8 +256,16 @@ const portSTACK_TYPE xInitialStack[] = *pxTopOfStack = CORCON; pxTopOfStack++; - *pxTopOfStack = PSVPAG; - pxTopOfStack++; + + #if defined(__HAS_EDS__) + *pxTopOfStack = DSRPAG; + pxTopOfStack++; + *pxTopOfStack = DSWPAG; + pxTopOfStack++; + #else /* __HAS_EDS__ */ + *pxTopOfStack = PSVPAG; + pxTopOfStack++; + #endif /* __HAS_EDS__ */ /* Finally the critical nesting depth. */ *pxTopOfStack = 0x00; @@ -249,7 +278,7 @@ const portSTACK_TYPE xInitialStack[] = portBASE_TYPE xPortStartScheduler( void ) { /* Setup a timer for the tick ISR. */ - prvSetupTimerInterrupt(); + prvSetupTimerInterrupt(); /* Restore the context of the first task to run. */ portRESTORE_CONTEXT(); @@ -265,7 +294,7 @@ portBASE_TYPE xPortStartScheduler( void ) void vPortEndScheduler( void ) { /* It is unlikely that the scheduler for the PIC port will get stopped - once running. If required disable the tick interrupt here, then return + once running. If required disable the tick interrupt here, then return to xPortStartScheduler(). */ } /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S b/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S index 5fec0222b..84926f1aa 100644 --- a/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S +++ b/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S @@ -1,7 +1,7 @@ /* FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd. - FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT + FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. *************************************************************************** @@ -42,7 +42,7 @@ FreeRTOS WEB site. 1 tab == 4 spaces! - + *************************************************************************** * * * Having a problem? Start by reading the FAQ "My application does * @@ -52,17 +52,17 @@ * * *************************************************************************** - - http://www.FreeRTOS.org - Documentation, training, latest versions, license - and contact details. - + + http://www.FreeRTOS.org - Documentation, training, latest versions, license + and contact details. + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, including FreeRTOS+Trace - an indispensable productivity tool. - Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell - the code with commercial support, indemnification, and middleware, under + Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell + the code with commercial support, indemnification, and middleware, under the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also - provide a safety engineered and independently SIL3 certified version under + provide a safety engineered and independently SIL3 certified version under the SafeRTOS brand: http://www.SafeRTOS.com. */ @@ -86,9 +86,14 @@ _vPortYield: PUSH W14 PUSH RCOUNT PUSH TBLPAG - + PUSH CORCON - PUSH PSVPAG + #ifdef __HAS_EDS__ + PUSH DSRPAG + PUSH DSWPAG + #else + PUSH PSVPAG + #endif /* __HAS_EDS__ */ MOV _uxCriticalNesting, W0 /* Save the critical nesting counter for the task. */ PUSH W0 MOV _pxCurrentTCB, W0 /* Save the new top of stack into the TCB. */ @@ -100,7 +105,12 @@ _vPortYield: MOV [W0], W15 POP W0 /* Restore the critical nesting counter for the task. */ MOV W0, _uxCriticalNesting +#ifdef __HAS_EDS__ + POP DSWPAG + POP DSRPAG +#else POP PSVPAG +#endif /* __HAS_EDS__ */ POP CORCON POP TBLPAG POP RCOUNT /* Restore the registers from the stack. */ diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MX/ISR_Support.h b/FreeRTOS/Source/portable/MPLAB/PIC32MX/ISR_Support.h index 6f2d3710d..229948de6 100644 --- a/FreeRTOS/Source/portable/MPLAB/PIC32MX/ISR_Support.h +++ b/FreeRTOS/Source/portable/MPLAB/PIC32MX/ISR_Support.h @@ -224,7 +224,6 @@ mtc0 k0, _CP0_STATUS mtc0 k1, _CP0_EPC - ehb eret nop diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MX/port_asm.S b/FreeRTOS/Source/portable/MPLAB/PIC32MX/port_asm.S index 9cfb9980c..c0ab86c74 100644 --- a/FreeRTOS/Source/portable/MPLAB/PIC32MX/port_asm.S +++ b/FreeRTOS/Source/portable/MPLAB/PIC32MX/port_asm.S @@ -1,7 +1,7 @@ /* FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd. - FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT + FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. *************************************************************************** @@ -42,7 +42,7 @@ FreeRTOS WEB site. 1 tab == 4 spaces! - + *************************************************************************** * * * Having a problem? Start by reading the FAQ "My application does * @@ -52,33 +52,33 @@ * * *************************************************************************** - - http://www.FreeRTOS.org - Documentation, training, latest versions, license - and contact details. - + + http://www.FreeRTOS.org - Documentation, training, latest versions, license + and contact details. + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, including FreeRTOS+Trace - an indispensable productivity tool. - Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell - the code with commercial support, indemnification, and middleware, under + Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell + the code with commercial support, indemnification, and middleware, under the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also - provide a safety engineered and independently SIL3 certified version under + provide a safety engineered and independently SIL3 certified version under the SafeRTOS brand: http://www.SafeRTOS.com. */ - + #include #include #include "ISR_Support.h" - + .set nomips16 .set noreorder - + .extern pxCurrentTCB .extern vTaskSwitchContext .extern vPortIncrementTick .extern xISRStackTop - + .global vPortStartFirstTask .global vPortYieldISR .global vPortTickInterruptHandler @@ -89,7 +89,7 @@ .set noreorder .set noat .ent vPortTickInterruptHandler - + vPortTickInterruptHandler: portSAVE_CONTEXT @@ -125,8 +125,8 @@ vPortStartFirstTask: vPortYieldISR: - /* Make room for the context. First save the current status so we can - manipulate it, and the cause and EPC registers so we capture their + /* Make room for the context. First save the current status so we can + manipulate it, and the cause and EPC registers so we capture their original values in case of interrupt nesting. */ mfc0 k0, _CP0_CAUSE addiu sp, sp, -portCONTEXT_SIZE @@ -216,14 +216,13 @@ vPortYieldISR: ins s7, $0, 10, 6 ori s6, s7, ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 10 ) | 1 - /* This mtc0 re-enables interrupts, but only above + /* This mtc0 re-enables interrupts, but only above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ mtc0 s6, _CP0_STATUS /* Clear the software interrupt in the core. */ mfc0 s6, _CP0_CAUSE - addiu s4,zero,-257 - and s6, s6, s4 + ins s6, zero, 8, 1 mtc0 s6, _CP0_CAUSE /* Clear the interrupt in the interrupt controller. */ @@ -296,10 +295,9 @@ vPortYieldISR: /* Remove stack frame. */ addiu sp, sp, portCONTEXT_SIZE - mtc0 k1, _CP0_STATUS + mtc0 k1, _CP0_STATUS mtc0 k0, _CP0_EPC - ehb - eret + eret nop .end vPortYieldISR