From: Heiko Schocher Date: Wed, 9 Nov 2011 20:06:23 +0000 (+0000) Subject: arm, arm926ejs: always do cpu critical inits X-Git-Tag: v2011.12-rc1~60^2~48 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=ca4b55800ed7;p=u-boot arm, arm926ejs: always do cpu critical inits always do the cpu critical inits in cpu_init_crit, and only jump to lowlevel_init, if CONFIG_SKIP_LOWLEVEL_INIT is not defined. Signed-off-by: Heiko Schocher Cc: Albert ARIBAUD Cc: Wolfgang Denk Cc: Sandeep Paulraj Cc: Tom Rini Cc: Christian Riesch --- diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index bb4d00bf3f..6a09c028e4 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -194,9 +194,7 @@ reset: * we do sys-critical inits only at reboot, * not when booting from ram! */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT bl cpu_init_crit -#endif /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: @@ -355,7 +353,6 @@ _dynsym_start_ofs: * ************************************************************************* */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT cpu_init_crit: /* * flush v4 I/D caches @@ -374,14 +371,15 @@ cpu_init_crit: orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ mcr p15, 0, r0, c1, c0, 0 +#ifndef CONFIG_SKIP_LOWLEVEL_INIT /* * Go setup Memory and board specific bits prior to relocation. */ mov ip, lr /* perserve link reg across call */ bl lowlevel_init /* go setup pll,mux,memory */ mov lr, ip /* restore link */ - mov pc, lr /* back to my caller */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ + mov pc, lr /* back to my caller */ #ifndef CONFIG_SPL_BUILD /*