From: Scott Wood Date: Fri, 2 Nov 2012 23:41:35 +0000 (-0500) Subject: nand/fsl: add NAND_NO_SUBPAGE_WRITE to eLBC and IFC drivers X-Git-Tag: v2013.01-rc2~117^2~6 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=cb04c77234293a8edbdd327d85cda9fb8b520748;p=u-boot nand/fsl: add NAND_NO_SUBPAGE_WRITE to eLBC and IFC drivers These controllers can only do hardware ECC on full page transfers. Signed-off-by: Scott Wood --- diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index 9076ad4cdc..834a8a6498 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -748,7 +748,7 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr) /* set up nand options */ nand->options = NAND_NO_READRDY | NAND_NO_AUTOINCR | - NAND_USE_FLASH_BBT; + NAND_USE_FLASH_BBT | NAND_NO_SUBPAGE_WRITE; nand->controller = &elbc_ctrl->controller; nand->priv = priv; diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c index b3b7c705e1..f473003769 100644 --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c @@ -797,7 +797,7 @@ int board_nand_init(struct nand_chip *nand) /* set up nand options */ nand->options = NAND_NO_READRDY | NAND_NO_AUTOINCR | - NAND_USE_FLASH_BBT; + NAND_USE_FLASH_BBT | NAND_NO_SUBPAGE_WRITE; if (cspr & CSPR_PORT_SIZE_16) { nand->read_byte = fsl_ifc_read_byte16;