From: wdenk Date: Tue, 10 Feb 2004 00:03:41 +0000 (+0000) Subject: * Patch by Jian Zhang, 3 Feb 2004: X-Git-Tag: LABEL_2006_03_12_0025~655 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=cd37d9e6e5e9692d8efafc155df23fa142b63d03;p=u-boot * Patch by Jian Zhang, 3 Feb 2004: - Changed the incorrect FAT12BUFSIZE - data_begin in fsdata can be negative. Changed it to be short. * Code cleanup --- diff --git a/CHANGELOG b/CHANGELOG index 78914c16d3..194564a137 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,10 @@ Changes since U-Boot 1.0.1: ====================================================================== +* Patch by Jian Zhang, 3 Feb 2004: + - Changed the incorrect FAT12BUFSIZE + - data_begin in fsdata can be negative. Changed it to be short. + * Patches by Stephan Linz, 30 Jan 2004: 1: - board/altera/common/flash.c:flash_erase(): o allow interrupts befor get_timer() call diff --git a/board/esteem192e/esteem192e.c b/board/esteem192e/esteem192e.c index f080d6731c..5c3e9b4265 100644 --- a/board/esteem192e/esteem192e.c +++ b/board/esteem192e/esteem192e.c @@ -113,7 +113,7 @@ long int initdram (int board_type) memctl->memc_mptpr = 0x0200; /* divide by 32 */ - memctl->memc_mamr = 0x18003112; /*CFG_MAMR_8COL; *//* 0x18005112 TODO: explain here */ + memctl->memc_mamr = 0x18003112; /*CFG_MAMR_8COL; */ /* 0x18005112 TODO: explain here */ upmconfig (UPMA, (uint *) sdram_table, sizeof (sdram_table) / sizeof (uint)); diff --git a/board/omap1610inn/flash.c b/board/omap1610inn/flash.c index ae7fb3b69a..b316c1d80c 100644 --- a/board/omap1610inn/flash.c +++ b/board/omap1610inn/flash.c @@ -19,7 +19,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -32,7 +32,7 @@ #include #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */ -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ /* Board support for 1 or 2 flash devices */ #undef FLASH_PORT_WIDTH32 @@ -120,13 +120,13 @@ unsigned long flash_init (void) */ flash_unlock(flash_info_t * info) { - int j; - for (j=2;jstart[j]); - flash_unprotect_sectors (addr); - *addr = (FPW) 0x00500050;/* clear status register */ - *addr = (FPW) 0x00FF00FF;/* resest to read mode */ - } + int j; + for (j=2;jstart[j]); + flash_unprotect_sectors (addr); + *addr = (FPW) 0x00500050;/* clear status register */ + *addr = (FPW) 0x00FF00FF;/* resest to read mode */ + } } /*----------------------------------------------------------------------- @@ -192,7 +192,7 @@ void flash_print_info (flash_info_t * info) if ((i % 5) == 0) printf ("\n "); printf (" %08lX%s", - info->start[i], info->protect[i] ? " (RO)" : " "); + info->start[i], info->protect[i] ? " (RO)" : " "); } printf ("\n"); return; @@ -224,18 +224,18 @@ static ulong flash_get_size (FPW * addr, flash_info_t * info) info->sector_count = 0; info->size = 0; addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ - return (0); /* no or unknown flash */ + return (0); /* no or unknown flash */ } mb (); - value = addr[1]; /* device ID */ + value = addr[1]; /* device ID */ switch (value) { case (FPW) (INTEL_ID_28F256L18T): info->flash_id += FLASH_28F256L18T; info->sector_count = 259; info->size = 0x02000000; - break; /* => 32 MB */ + break; /* => 32 MB */ default: info->flash_id = FLASH_UNKNOWN; @@ -318,7 +318,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) /* Start erase on unprotected sectors */ for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ + if (info->protect[sect] == 0) { /* not protected */ FPWV *addr = (FPWV *) (info->start[sect]); FPW status; @@ -348,7 +348,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) } } - /* clear status register cmd. */ + /* clear status register cmd. */ *addr = (FPW) 0x00500050; *addr = (FPW) 0x00FF00FF;/* resest to read mode */ printf (" done\n"); diff --git a/board/tb0229/flash.c b/board/tb0229/flash.c index 5dea463700..e9f6418c4e 100644 --- a/board/tb0229/flash.c +++ b/board/tb0229/flash.c @@ -860,7 +860,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) } for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size;*//* bank end addr */ + ulong b_end = info->start[0] + info->size;*/ /* bank end addr */ /* short s_end = info->sector_count - 1; for (i=0; isector_count; ++i) { ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; @@ -872,7 +872,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) } } -*//* finally write data to flash */ +*/ /* finally write data to flash */ /* for (info = info_first; info <= info_last && cnt>0; ++info) { ulong len; diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c index fb769253dd..c4d7bff54c 100644 --- a/drivers/cfi_flash.c +++ b/drivers/cfi_flash.c @@ -30,11 +30,11 @@ * Tested Architectures * Port Width Chip Width # of banks Flash Chip Board * 32 16 1 23F128J3 seranoa/eagle - * + * */ /* The DEBUG define must be before common to enable debugging */ -#undef DEBUG +#undef DEBUG #include #include #ifdef CFG_FLASH_CFI_DRIVER @@ -170,8 +170,8 @@ void print_longlong(char * str, unsigned long long data) int i; char *cp; cp = (unsigned char *)&data; - for(i=0;i<8; i++) - sprintf(&str[i*2], "%2.2x", *cp++); + for(i=0;i<8; i++) + sprintf(&str[i*2], "%2.2x", *cp++); } #endif @@ -501,7 +501,7 @@ void flash_read_user_serial(flash_info_t * info, void * buffer, int offset, int void flash_read_factory_serial(flash_info_t * info, void * buffer, int offset, int len) { uchar * src; - + src = flash_make_addr(info, 0, FLASH_OFFSET_INTEL_PROTECTION); flash_write_cmd(info,0, 0, FLASH_CMD_READ_ID); memcpy(buffer,src + offset,len); @@ -510,7 +510,7 @@ void flash_read_factory_serial(flash_info_t * info, void * buffer, int offset, i #endif /* CFG_FLASH_PROTECTION */ -static int flash_poll_status(flash_info_t * info, flash_sect_t sect) +static int flash_poll_status(flash_info_t * info, flash_sect_t sect) { int retval; switch(info->vendor) { @@ -626,27 +626,27 @@ static void flash_write_cmd(flash_info_t * info, flash_sect_t sect, uint offset, flash_make_cmd(info, cmd, &cword); switch(info->portwidth) { case FLASH_CFI_8BIT: - debug("fwc addr %p cmd %x %x 8bit x %d bit\n",addr.cp, cmd, cword.c, + debug("fwc addr %p cmd %x %x 8bit x %d bit\n",addr.cp, cmd, cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); *addr.cp = cword.c; break; case FLASH_CFI_16BIT: - debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n",addr.wp, cmd, cword.w, + debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n",addr.wp, cmd, cword.w, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); *addr.wp = cword.w; break; case FLASH_CFI_32BIT: - debug("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n",addr.lp, cmd, cword.l, + debug("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n",addr.lp, cmd, cword.l, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); *addr.lp = cword.l; break; case FLASH_CFI_64BIT: #ifdef DEBUG - { + { char str[20]; print_longlong(str, cword.ll); - - printf("fwc addr %p cmd %x %s 64 bit x %d bit\n",addr.llp, cmd, str, + + printf("fwc addr %p cmd %x %s 64 bit x %d bit\n",addr.llp, cmd, str, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); } #endif @@ -685,7 +685,7 @@ static int flash_isequal(flash_info_t * info, flash_sect_t sect, uint offset, uc retval = (cptr.lp[0] == cword.l); break; case FLASH_CFI_64BIT: -#ifdef DEBUG +#ifdef DEBUG { char str1[20]; char str2[20]; @@ -776,14 +776,14 @@ static int flash_detect_cfi(flash_info_t * info) info->chipwidth >>= 1) { */ for(info->chipwidth =FLASH_CFI_BY8; info->chipwidth <= info->portwidth; - info->chipwidth <<= 1) { + info->chipwidth <<= 1) { flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI); if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { debug("found port %d chip %d ", info->portwidth, info->chipwidth); - debug("port %d bits chip %d bits\n", info->portwidth << CFI_FLASH_SHIFT_WIDTH, + debug("port %d bits chip %d bits\n", info->portwidth << CFI_FLASH_SHIFT_WIDTH, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); return 1; } @@ -823,11 +823,11 @@ static ulong flash_get_size (ulong base, int banknum) info->cmd_reset = AMD_CMD_RESET; break; } - + debug("manufacturer is %d\n", info->vendor); size_ratio = info->portwidth / info->chipwidth; num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS); - debug("size_ration %d port %d bits chip %d bits\n", size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, + debug("size_ration %d port %d bits chip %d bits\n", size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); debug("found %d erase regions\n", num_erase_regions); sect_cnt = 0; diff --git a/drivers/pci_auto.c b/drivers/pci_auto.c index 39b7e8e33b..3965f13717 100644 --- a/drivers/pci_auto.c +++ b/drivers/pci_auto.c @@ -296,11 +296,11 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev) pciauto_setup_device(hose, dev, 2, hose->pci_mem, hose->pci_io); DEBUGF("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_DEV(dev)); - + /* TBS: Passing in current_busno allows for sibling P2P bridges */ pciauto_prescan_setup_bridge(hose, dev, hose->current_busno); - /* - * TBS: need to figure out if this is a subordinate bridge on the bus + /* + * TBS: need to figure out if this is a subordinate bridge on the bus * to be able to properly set the pri/sec/sub bridge registers. */ n = pci_hose_scan_bus(hose, hose->current_busno); diff --git a/include/configs/tb0229.h b/include/configs/tb0229.h index 53fafdd6ea..5a20473dd5 100644 --- a/include/configs/tb0229.h +++ b/include/configs/tb0229.h @@ -84,7 +84,7 @@ "cp.b 80400000 BFC60000 $(filesize)\0" \ "initenv=erase bfc40000 bfc5ffff\0" \ "" -//#define CONFIG_BOOTCOMMAND "run flash_local" +/*#define CONFIG_BOOTCOMMAND "run flash_local" */ #define CONFIG_BOOTCOMMAND "run netboot" #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ diff --git a/include/fat.h b/include/fat.h index 3f9c5f359e..8fffb420b6 100644 --- a/include/fat.h +++ b/include/fat.h @@ -43,7 +43,7 @@ #define FATBUFBLOCKS 6 #define FATBUFSIZE (FS_BLOCK_SIZE*FATBUFBLOCKS) -#define FAT12BUFSIZE ((FATBUFSIZE*3)/2) +#define FAT12BUFSIZE ((FATBUFSIZE*2)/3) #define FAT16BUFSIZE (FATBUFSIZE/2) #define FAT32BUFSIZE (FATBUFSIZE/4) @@ -176,7 +176,7 @@ typedef struct { __u16 fat_sect; /* Starting sector of the FAT */ __u16 rootdir_sect; /* Start sector of root directory */ __u16 clust_size; /* Size of clusters in sectors */ - __u16 data_begin; /* The sector of the first cluster */ + short data_begin; /* The sector of the first cluster, can be negative */ __u8 fatbuf[FATBUFSIZE]; /* Current FAT buffer */ int fatbufnum; /* Used by get_fatent, init to -1 */ } fsdata; diff --git a/rtc/ds1306.c b/rtc/ds1306.c index 20f1a50856..e6694615ed 100644 --- a/rtc/ds1306.c +++ b/rtc/ds1306.c @@ -74,10 +74,6 @@ static unsigned char bcd2bin (unsigned char c); static unsigned char rtc_read (unsigned char reg); static void rtc_write (unsigned char reg, unsigned char val); - - - - /* ************************************************************************* */ #ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */ @@ -306,10 +302,6 @@ void rtc_reset (void) #else /* not CONFIG_SXNI855T */ /* ************************************************************************* */ - - - - /* read clock time from DS1306 and return it in *tmp */ void rtc_get (struct rtc_time *tmp) {