From: Marek Vasut <marex@denx.de>
Date: Wed, 8 Jun 2016 00:57:05 +0000 (+0200)
Subject: ARM: socfpga: Sort Kconfig entries
X-Git-Tag: v2016.07-rc2~14^2
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=cf0a8dab8ee8c1eafbcd9ed081f5cab15e5a58a5;p=u-boot

ARM: socfpga: Sort Kconfig entries

Just sort the board entries, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
---

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index c4432cfe10..1a43c7bc9a 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -27,10 +27,6 @@ config TARGET_SOCFPGA_DENX_MCVEVK
 	bool "DENX MCVEVK (Cyclone V)"
 	select TARGET_SOCFPGA_CYCLONE5
 
-config TARGET_SOCFPGA_SR1500
-	bool "SR1500 (Cyclone V)"
-	select TARGET_SOCFPGA_CYCLONE5
-
 config TARGET_SOCFPGA_EBV_SOCRATES
 	bool "EBV SoCrates (Cyclone V)"
 	select TARGET_SOCFPGA_CYCLONE5
@@ -43,6 +39,10 @@ config TARGET_SOCFPGA_SAMTEC_VINING_FPGA
 	bool "samtec VIN|ING FPGA (Cyclone V)"
 	select TARGET_SOCFPGA_CYCLONE5
 
+config TARGET_SOCFPGA_SR1500
+	bool "SR1500 (Cyclone V)"
+	select TARGET_SOCFPGA_CYCLONE5
+
 config TARGET_SOCFPGA_TERASIC_DE0_NANO
 	bool "Terasic DE0-Nano-Atlas (Cyclone V)"
 	select TARGET_SOCFPGA_CYCLONE5