From: Siva Durga Prasad Paladugu Date: Fri, 6 Jan 2017 10:48:50 +0000 (+0530) Subject: net: xilinx_axi_emac: Use wait_for_bit instead of while loop X-Git-Tag: v2018.01-rc1~59^2~21 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=d02a0b1fdf6ba3197e0b46f8a8f52e3c5d375506;p=u-boot net: xilinx_axi_emac: Use wait_for_bit instead of while loop Use wait_for_bit instead while loop during init Signed-off-by: Siva Durga Prasad Paladugu --- diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c index 25c66c6098..ea79b7420a 100644 --- a/drivers/net/xilinx_axi_emac.c +++ b/drivers/net/xilinx_axi_emac.c @@ -14,6 +14,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -350,7 +351,7 @@ static void axiemac_stop(struct udevice *dev) static int axi_ethernet_init(struct axidma_priv *priv) { struct axi_regs *regs = priv->iobase; - u32 timeout = 200; + int err; /* * Check the status of the MgtRdy bit in the interrupt status @@ -359,11 +360,9 @@ static int axi_ethernet_init(struct axidma_priv *priv) * will be valid until this bit is valid. * The bit is always a 1 for all other PHY interfaces. */ - while (timeout && (!(in_be32(®s->is) & XAE_INT_MGTRDY_MASK))) { - timeout--; - udelay(1); - } - if (!timeout) { + err = wait_for_bit(__func__, (const u32 *)®s->is, + XAE_INT_MGTRDY_MASK, true, 200, false); + if (err) { printf("%s: Timeout\n", __func__); return 1; }