From: Simon Glass <sjg@chromium.org>
Date: Sun, 25 Nov 2012 20:12:16 +0000 (+0000)
Subject: x86: coreboot: Enable LPC TPM
X-Git-Tag: v2013.01-rc2~103^2
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=d02a568e9aa3c3500d9b680f60782c192fd51691;p=u-boot

x86: coreboot: Enable LPC TPM

Coreboot boards have an LPC TPM connected, so enable this.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index 12d1016522..5da006fbde 100644
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -67,6 +67,10 @@
 					 CONFIG_SYS_SCSI_MAX_LUN)
 #endif
 
+/* Generic TPM interfaced through LPC bus */
+#define CONFIG_GENERIC_LPC_TPM
+#define CONFIG_TPM_TIS_BASE_ADDRESS        0xfed40000
+
 /*-----------------------------------------------------------------------
  * Real Time Clock Configuration
  */