From: Jon Loeliger <jdl@freescale.com>
Date: Thu, 14 Sep 2006 13:40:36 +0000 (-0500)
Subject: Handle 86xx SVR values according to the new Reference Manual.
X-Git-Tag: U-Boot-1_1_6~20^2~3^2~23^2
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=d14ba6a798beb753e7a864500414fcc2d198b8bc;p=u-boot

Handle 86xx SVR values according to the new Reference Manual.
Both 8641 and 8641D have SVR == 0x8090, and are distinguished
by the byte in bits 16-23 instead.
Thanks to Jason Jin for noticing.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
---

diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c
index ddd0ad3b39..551b243076 100644
--- a/cpu/mpc86xx/cpu.c
+++ b/cpu/mpc86xx/cpu.c
@@ -76,11 +76,12 @@ checkcpu(void)
 	puts("    System: ");
 	switch (ver) {
 	case SVR_8641:
-		puts("8641");
-		break;
-	case SVR_8641D:
+	    if (SVR_SUBVER(svr) == 1) {
 		puts("8641D");
-		break;
+	    } else {
+		puts("8641");
+	    }
+	    break;
 	default:
 		puts("Unknown");
 		break;
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index 0060cd030b..553ef3d945 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -802,6 +802,8 @@
 #define SVR_VER(svr)	(((svr) >>  16) & 0xFFFF)	/* Version field */
 #define SVR_REV(svr)	(((svr) >>   0) & 0xFFFF)	/* Revison field */
 
+#define SVR_SUBVER(svr)	(((svr) >>  8) & 0xFF)	/* Process/MFG sub-version */
+
 #define SVR_FAM(svr)	(((svr) >> 20) & 0xFFF)	/* Family field */
 #define SVR_MEM(svr)	(((svr) >> 16) & 0xF)	/* Member field */
 
@@ -819,9 +821,8 @@
 #define SVR_8541	0x807A
 #define SVR_8548	0x8031
 #define SVR_8548_E	0x8039
-
 #define SVR_8641	0x8090
-#define SVR_8641D	0x8091
+
 
 /* I am just adding a single entry for 8260 boards.  I think we may be
  * able to combine mbx, fads, rpxlite, bseip, and classic into a single