From: Prabhakar Kushwaha Date: Sun, 29 Apr 2012 23:56:56 +0000 (+0000) Subject: powerpc/85xx:Fix NAND code base to support debugger X-Git-Tag: v2012.07-rc1~12^2~11 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=d16a37b86459331faf5e31ef837f3dfb8d3411e3;p=u-boot powerpc/85xx:Fix NAND code base to support debugger Update NAND code base to ovecome e500 and e500v2's second limitation i.e. IVPR + IVOR15 should be valid fetchable OP code address. As NAND SPL does not compile vector table so making sure IVOR + IVOR15 points to any fetchable valid data Signed-off-by: Radu Lazarescu Signed-off-by: Marius Grigoras Signed-off-by: Prabhakar Kushwaha --- diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 42671960da..6aabc30c28 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -182,7 +182,7 @@ l2_disabled: andi. r1,r3,L1CSR0_DCE@l beq 2b -#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) +#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(CONFIG_NAND_SPL) /* * TLB entry for debuggging in AS1 * Create temporary TLB entry in AS0 to handle debug exception