From: Michal Simek <michal.simek@xilinx.com>
Date: Thu, 14 Jun 2018 07:08:44 +0000 (+0200)
Subject: net: zynq_gem: Initialize val variable in zynq_gem_miiphy_read()
X-Git-Tag: v2018.07-rc3~1^2~7
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=d1b226b7d403b29c1064318097d972ce804e96e7;p=u-boot

net: zynq_gem: Initialize val variable in zynq_gem_miiphy_read()

phyread can timeout and val will contain random value. Initialize it to
zero not to report random value in case of error.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
---

diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index a817f2e5d6..d1138fe090 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -609,7 +609,7 @@ static int zynq_gem_miiphy_read(struct mii_dev *bus, int addr,
 {
 	struct zynq_gem_priv *priv = bus->priv;
 	int ret;
-	u16 val;
+	u16 val = 0;
 
 	ret = phyread(priv, addr, reg, &val);
 	debug("%s 0x%x, 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, val, ret);