From: Markus Klotzbuecher <mk@denx.de>
Date: Wed, 12 Jul 2006 07:08:36 +0000 (+0200)
Subject: Bugfix in FEC initialisation:
X-Git-Tag: U-Boot-1_1_5~105^2~1
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=d6cc73e4e70a7f8712c52ef9d93a19a906cc3d4b;p=u-boot

Bugfix in FEC initialisation:
All MII configuration is done via FEC1 registers. But MII_SPEED was
configured according to FEC used. So if only FEC2 was used, this caused
the real MII_SPEED register in FEC1 to stay uninitalised, what lead
to "mii_send STUCK!" messages. Fix: always configure MII_SPEED on FEC1
only.
---

diff --git a/cpu/mpc8xx/fec.c b/cpu/mpc8xx/fec.c
index 21c9070d21..9ebee592d8 100644
--- a/cpu/mpc8xx/fec.c
+++ b/cpu/mpc8xx/fec.c
@@ -396,8 +396,10 @@ static void fec_pin_init(int fecidx)
 	 * * to 2.5 MHz.
 	 * * This MDC frequency is equal to system clock / (2 * MII_SPEED).
 	 * * Then MII_SPEED = system_clock / 2 * 2,5 Mhz.
+	 *
+	 * All MII configuration is done via FEC1 registers:
 	 */
-	fecp->fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1;
+	immr->im_cpm.cp_fec1.fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1;
 
 #if defined(CONFIG_NETTA) || defined(CONFIG_NETPHONE) || defined(CONFIG_NETTA2)
 	/* our PHYs are the limit at 2.5 MHz */