From: Tang Yuantian <Yuantian.Tang@freescale.com>
Date: Thu, 9 Oct 2014 08:11:37 +0000 (+0800)
Subject: arm: ls102xa: Fixed a register definition error
X-Git-Tag: v2015.01-rc3~51^2~10
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=d8222dbe42e17c49c2f904400c711ef58e3e06d8;p=u-boot

arm: ls102xa: Fixed a register definition error

There are 8 SCFG_SPARECR registers in SCFG memory block, not one.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
---

diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 7995fe262b..b5db7205fc 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -182,7 +182,7 @@ struct ccsr_scfg {
 	u32 etsecmcr;
 	u32 sdhciovserlcr;
 	u32 resv14[61];
-	u32 sparecr;
+	u32 sparecr[8];
 };
 
 /* Clocking */