From: Vikas Manocha Date: Mon, 27 Mar 2017 20:02:45 +0000 (-0700) Subject: stm32f7: enable instruction & data cache X-Git-Tag: v2017.05-rc2~70 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=dc11d83a2e4f534242d634f65427e07c6ecf2c6c;p=u-boot stm32f7: enable instruction & data cache It also enables commands for cache enable/disable/status. Signed-off-by: Vikas Manocha cc: Christophe KERELLO --- diff --git a/arch/arm/mach-stm32/stm32f7/soc.c b/arch/arm/mach-stm32/stm32f7/soc.c index 06af631cc1..6f9704ab78 100644 --- a/arch/arm/mach-stm32/stm32f7/soc.c +++ b/arch/arm/mach-stm32/stm32f7/soc.c @@ -58,6 +58,8 @@ int arch_cpu_init(void) (V7M_MPU_RASR_XN_ENABLE | V7M_MPU_RASR_AP_RW_RW | 0x01 << V7M_MPU_RASR_TEX_SHIFT + | 0x01 << V7M_MPU_RASR_B_SHIFT + | 0x01 << V7M_MPU_RASR_C_SHIFT | V7M_MPU_RASR_SIZE_8MB | V7M_MPU_RASR_EN) , &V7M_MPU->rasr diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 5776d89c97..de3d661d60 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -12,9 +12,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x20050000 #define CONFIG_SYS_TEXT_BASE 0x08000000 -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF - /* * Configuration of the external SDRAM memory */ @@ -78,4 +75,5 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_CMD_MEM +#define CONFIG_CMD_CACHE #endif /* __CONFIG_H */