From: Anatolij Gustschin <agust@denx.de>
Date: Wed, 26 May 2010 08:38:57 +0000 (+0200)
Subject: video: sm501: add support for SM501 chips on PCI bus
X-Git-Tag: v2010.09-rc1~107^2~19^2~1
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=e2bee9e3c0f4bd363207ce5e496cef2134f67d28;p=u-boot

video: sm501: add support for SM501 chips on PCI bus

Signed-off-by: Anatolij Gustschin <agust@denx.de>
---

diff --git a/drivers/video/sm501.c b/drivers/video/sm501.c
index 8c963162db..f55bf3cb11 100644
--- a/drivers/video/sm501.c
+++ b/drivers/video/sm501.c
@@ -31,6 +31,7 @@
 
 #include <common.h>
 
+#include <asm/io.h>
 #include <video_fb.h>
 #include <sm501.h>
 
@@ -54,6 +55,18 @@
 
 GraphicDevice sm501;
 
+void write_be32(int off, unsigned int val)
+{
+	out_be32((unsigned __iomem *)(sm501.isaBase + off), val);
+}
+
+void write_le32(int off, unsigned int val)
+{
+	out_le32((unsigned __iomem *)(sm501.isaBase + off), val);
+}
+
+void (*write_reg32)(int off, unsigned int val) = write_be32;
+
 /*-----------------------------------------------------------------------------
  * SmiSetRegs --
  *-----------------------------------------------------------------------------
@@ -66,7 +79,7 @@ static void SmiSetRegs (void)
 	 */
 	const SMI_REGS *preg = board_get_regs ();
 	while (preg->Index) {
-		write32 (preg->Index, preg->Value);
+		write_reg32 (preg->Index, preg->Value);
 		/*
 		 * Insert a delay between
 		 */
@@ -75,26 +88,92 @@ static void SmiSetRegs (void)
 	}
 }
 
+#ifdef CONFIG_VIDEO_SM501_PCI
+static struct pci_device_id sm501_pci_tbl[] = {
+	{ PCI_VENDOR_ID_SMI, PCI_DEVICE_ID_SMI_501 },
+	{}
+};
+#endif
+
 /*-----------------------------------------------------------------------------
  * video_hw_init --
  *-----------------------------------------------------------------------------
  */
 void *video_hw_init (void)
 {
+#ifdef CONFIG_VIDEO_SM501_PCI
+	unsigned int pci_mem_base, pci_mmio_base;
+	unsigned int id;
+	unsigned short device_id;
+	pci_dev_t devbusfn;
+	int mem;
+#endif
 	unsigned int *vm, i;
 
 	memset (&sm501, 0, sizeof (GraphicDevice));
 
+#ifdef CONFIG_VIDEO_SM501_PCI
+	printf("Video: ");
+
+	/* Look for SM501/SM502 chips */
+	devbusfn = pci_find_devices(sm501_pci_tbl, 0);
+	if (devbusfn < 0) {
+		printf ("PCI Controller not found.\n");
+		goto not_pci;
+	}
+
+	/* Setup */
+	pci_write_config_dword (devbusfn, PCI_COMMAND,
+				(PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
+	pci_read_config_word (devbusfn, PCI_DEVICE_ID, &device_id);
+	pci_read_config_dword (devbusfn, PCI_REVISION_ID, &id);
+	pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, &pci_mem_base);
+	pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_1, &pci_mmio_base);
+	sm501.frameAdrs = pci_mem_to_phys (devbusfn, pci_mem_base);
+	sm501.isaBase = pci_mem_to_phys (devbusfn, pci_mmio_base);
+
+	if (sm501.isaBase)
+		write_reg32 = write_le32;
+
+	mem = in_le32 ((unsigned __iomem *)(sm501.isaBase + 0x10));
+	mem = (mem & 0x0000e000) >> 13;
+	switch (mem) {
+	case 1:
+		mem = 8;
+		break;
+	case 2:
+		mem = 16;
+		break;
+	case 3:
+		mem = 32;
+		break;
+	case 4:
+		mem = 64;
+		break;
+	case 5:
+		mem = 2;
+		break;
+	case 0:
+	default:
+		mem = 4;
+	}
+	printf ("PCI SM50%d %d MB\n", ((id & 0xff) == 0xC0) ? 2 : 1, mem);
+not_pci:
+#endif
 	/*
 	 * Initialization of the access to the graphic chipset Retreive base
 	 * address of the chipset (see board/RPXClassic/eccx.c)
 	 */
-	if ((sm501.isaBase = board_video_init ()) == 0) {
-		return (NULL);
+	if (!sm501.isaBase) {
+		sm501.isaBase = board_video_init ();
+		if (!sm501.isaBase)
+			return NULL;
 	}
 
-	if ((sm501.frameAdrs = board_video_get_fb ()) == 0) {
-		return (NULL);
+	if (!sm501.frameAdrs) {
+		sm501.frameAdrs = board_video_get_fb ();
+		if (!sm501.frameAdrs)
+			return NULL;
 	}
 
 	sm501.winSizeX = board_get_width ();
diff --git a/include/pci_ids.h b/include/pci_ids.h
index edfdc1e0ab..dcc381d301 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -1454,6 +1454,7 @@
 #define PCI_DEVICE_ID_SMI_710		0x0710
 #define PCI_DEVICE_ID_SMI_712		0x0712
 #define PCI_DEVICE_ID_SMI_810		0x0810
+#define PCI_DEVICE_ID_SMI_501		0x0501
 
 #define PCI_VENDOR_ID_HUGHES		0x1273
 #define PCI_DEVICE_ID_HUGHES_DIRECPC	0x0002