From: Laurentiu Tudor Date: Fri, 5 Oct 2012 09:48:51 +0000 (+0000) Subject: powerpc/85xx: introduce SET_PCI_LIODN_BASE, for setting PCI LIODNs X-Git-Tag: v2013.01-rc1~90^2~41 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=e389a377ee3ad8d137c9af749ddf2354be0d4a7c;p=u-boot powerpc/85xx: introduce SET_PCI_LIODN_BASE, for setting PCI LIODNs The liodn for the new PCIE controller included in P5040DS is no longer set through a register in the guts register block but with one in the PCIE register block itself. Update the PCIE CCSR structure to add the new liodn register and add a new dedicated SET_PCI_LIODN_BASE macro that puts the liodn in the correct register. Signed-off-by: Laurentiu Tudor Signed-off-by: Timur Tabi Signed-off-by: Andy Fleming --- diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h index a9973b80da..a37983ee54 100644 --- a/arch/powerpc/include/asm/fsl_liodn.h +++ b/arch/powerpc/include/asm/fsl_liodn.h @@ -94,6 +94,11 @@ extern void fdt_fixup_liodn(void *blob); SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\ CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET) +#define SET_PCI_LIODN_BASE(compat, pciNum, liodn) \ + SET_LIODN_ENTRY_1(compat, liodn,\ + offsetof(ccsr_pcix_t, liodn_base) + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET,\ + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET) + /* reg nodes for DMA start @ 0x300 */ #define SET_DMA_LIODN(dmaNum, liodn) \ SET_GUTS_LIODN("fsl,eloplus-dma", liodn, dma##dmaNum##liodnr,\ diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 7de33a7dde..6c11178f0f 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -296,7 +296,9 @@ typedef struct ccsr_pcix { u32 cfg_addr; /* PCIX Configuration Addr */ u32 cfg_data; /* PCIX Configuration Data */ u32 int_ack; /* PCIX IRQ Acknowledge */ - u8 res1[3060]; + u8 res000c[52]; + u32 liodn_base; /* PCIX LIODN base register */ + u8 res0044[3004]; u32 potar0; /* PCIX Outbound Transaction Addr 0 */ u32 potear0; /* PCIX Outbound Translation Extended Addr 0 */ u32 powbar0; /* PCIX Outbound Window Base Addr 0 */