From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Wed, 29 Jun 2016 10:39:03 +0000 (+0900)
Subject: ARM: uniphier: add external IRQ setup code
X-Git-Tag: v2016.07-rc3~1^2
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=e64a6b11411befbaf166443d02d8b10e06852f6a;p=u-boot

ARM: uniphier: add external IRQ setup code

I will carry this work-around until it is cared in the kernel.
This looks up the AIDET node and sets up a register to handle
active low interrupt signals.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

diff --git a/arch/arm/mach-uniphier/board_early_init_f.c b/arch/arm/mach-uniphier/board_early_init_f.c
index f853701f44..d35d38dcbf 100644
--- a/arch/arm/mach-uniphier/board_early_init_f.c
+++ b/arch/arm/mach-uniphier/board_early_init_f.c
@@ -4,10 +4,47 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <common.h>
+#include <libfdt.h>
+#include <linux/io.h>
+
 #include "init.h"
 #include "micro-support-card.h"
 #include "soc-info.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
+static void uniphier_setup_xirq(void)
+{
+	const void *fdt = gd->fdt_blob;
+	int soc_node, aidet_node;
+	const u32 *val;
+	unsigned long aidet_base;
+	u32 tmp;
+
+	soc_node = fdt_path_offset(fdt, "/soc");
+	if (soc_node < 0)
+		return;
+
+	aidet_node = fdt_subnode_offset_namelen(fdt, soc_node, "aidet", 5);
+	if (aidet_node < 0)
+		return;
+
+	val = fdt_getprop(fdt, aidet_node, "reg", NULL);
+	if (!val)
+		return;
+
+	aidet_base = fdt32_to_cpu(*val);
+
+	tmp = readl(aidet_base + 8);	/* AIDET DETCONFR2 */
+	tmp |= 0x00ff0000;		/* Set XIRQ0-7 low active */
+	writel(tmp, aidet_base + 8);
+
+	tmp = readl(0x55000090);	/* IRQCTL */
+	tmp |= 0x000000ff;
+	writel(tmp, 0x55000090);
+}
+
 int board_early_init_f(void)
 {
 	led_puts("U0");
@@ -81,6 +118,8 @@ int board_early_init_f(void)
 		break;
 	}
 
+	uniphier_setup_xirq();
+
 	led_puts("U2");
 
 	return 0;
diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c
index 6066b169cf..645b90151c 100644
--- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c
+++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c
@@ -43,4 +43,9 @@ void uniphier_ld20_pin_init(void)
 	sg_set_pinsel(53, 0, 8, 4);	/* USB3OD   -> USB3OD */
 	sg_set_iectrl_range(46, 53);
 #endif
+
+	sg_set_pinsel(149, 14, 8, 4);	/* XIRQ0    -> XIRQ0 */
+	sg_set_iectrl(149);
+	sg_set_pinsel(153, 14, 8, 4);	/* XIRQ4    -> XIRQ4 */
+	sg_set_iectrl(153);
 }