From: Fabio Estevam Date: Tue, 18 Sep 2012 09:27:49 +0000 (+0000) Subject: mx6qsabresd: Add 8-bit USDHC support X-Git-Tag: v2013.01-rc1~220 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=e72d617860f7833756acddaf09ac28a3d8986d4c;p=u-boot mx6qsabresd: Add 8-bit USDHC support USDHC3 has 8 pins wired in mx6qsabresd. Configure the extra pins. Signed-off-by: Fabio Estevam --- diff --git a/board/freescale/mx6qsabresd/mx6qsabresd.c b/board/freescale/mx6qsabresd/mx6qsabresd.c index 069c66417b..03a6857323 100644 --- a/board/freescale/mx6qsabresd/mx6qsabresd.c +++ b/board/freescale/mx6qsabresd/mx6qsabresd.c @@ -93,6 +93,10 @@ iomux_v3_cfg_t usdhc3_pads[] = { MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6Q_PAD_NANDF_D0__GPIO_2_0 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ };