From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Wed, 10 Aug 2016 07:08:38 +0000 (+0900)
Subject: ARM: uniphier: do not compile v7_outer_cache_disable if L2 is disabled
X-Git-Tag: v2016.09-rc2~75^2~11
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=e731a5385d1e8b0ffaa69977899dc4246de53db4;p=u-boot

ARM: uniphier: do not compile v7_outer_cache_disable if L2 is disabled

If CONFIG_UNIPHIER_L2CACHE_ON is undefined, the L2 cache is never
enabled, so there is no need for v7_outer_cache_disable().  The weak
stub avoids the compile error anyway.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

diff --git a/arch/arm/mach-uniphier/arm32/cache-uniphier.c b/arch/arm/mach-uniphier/arm32/cache-uniphier.c
index a210835ea9..66e9f6b9b7 100644
--- a/arch/arm/mach-uniphier/arm32/cache-uniphier.c
+++ b/arch/arm/mach-uniphier/arm32/cache-uniphier.c
@@ -183,7 +183,6 @@ void v7_outer_cache_enable(void)
 	tmp |= UNIPHIER_SSCC_ON;
 	writel(tmp, UNIPHIER_SSCC);
 }
-#endif
 
 void v7_outer_cache_disable(void)
 {
@@ -193,6 +192,7 @@ void v7_outer_cache_disable(void)
 	tmp &= ~UNIPHIER_SSCC_ON;
 	writel(tmp, UNIPHIER_SSCC);
 }
+#endif
 
 void enable_caches(void)
 {