From: Jagan Teki <jteki@openedev.com>
Date: Sat, 15 Aug 2015 17:45:21 +0000 (+0530)
Subject: dts: zc702: Enable zynq qspi controller node
X-Git-Tag: v2016.01-rc1~155^2~47
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=e9cf6ec5160d457af1423ffe9ce254754b4cdde5;p=u-boot

dts: zc702: Enable zynq qspi controller node

Enabled zynq qspi controller node for zc702 board.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts
index 6691a8de24..4d8696021b 100644
--- a/arch/arm/dts/zynq-zc702.dts
+++ b/arch/arm/dts/zynq-zc702.dts
@@ -17,6 +17,7 @@
 		ethernet0 = &gem0;
 		i2c0 = &i2c0;
 		serial0 = &uart1;
+		spi0 = &qspi;
 	};
 
 	memory {
@@ -380,6 +381,10 @@
 	pinctrl-0 = <&pinctrl_uart1_default>;
 };
 
+&qspi {
+	status = "okay";
+};
+
 &usb0 {
 	status = "okay";
 	dr_mode = "host";