From: York Sun Date: Fri, 22 Jul 2016 17:52:23 +0000 (-0700) Subject: armv8: fsl-layerscape: mmu: Fix enabling MMU X-Git-Tag: v2016.09-rc2~180^2~3 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=ed7a3943d580f4cf72e5ef8a20c43fa93e889d14;p=u-boot armv8: fsl-layerscape: mmu: Fix enabling MMU MMU bit in SCTLR needs to be set explicitly after tables are created. It isn't an issue for EL3 becuase this bit is already set by early MMU setup. But for other exception levels this bit was not set. Signed-off-by: York Sun --- diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index eaff16651a..e12b773550 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -145,11 +145,14 @@ static inline void final_mmu_setup(void) set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(el, NULL, NULL), MEMORY_ATTRIBUTES); /* - * MMU is already enabled, just need to invalidate TLB to load the + * EL3 MMU is already enabled, just need to invalidate TLB to load the * new table. The new table is compatible with the current table, if * MMU somehow walks through the new table before invalidation TLB, * it still works. So we don't need to turn off MMU here. + * When EL2 MMU table is created by calling this function, MMU needs + * to be enabled. */ + set_sctlr(get_sctlr() | CR_M); } u64 get_page_table_size(void)