From: Hou Zhiqiang Date: Fri, 6 Jan 2017 09:41:11 +0000 (+0800) Subject: ARMv8/fsl-layerscape: Enable data coherency between cores in cluster X-Git-Tag: v2017.03-rc1~93^2~25 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=ee2a51022135a01fa2258b7788702313d0f54dac;p=u-boot ARMv8/fsl-layerscape: Enable data coherency between cores in cluster Signed-off-by: Hou Zhiqiang Reviewed-by: York Sun --- diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 9d37b2ff25..7572f19239 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -1,5 +1,6 @@ config ARCH_LS1012A bool + select ARMV8_SET_SMPEN select FSL_LSCH2 select SYS_FSL_DDR_BE select SYS_FSL_MMDC @@ -7,6 +8,7 @@ config ARCH_LS1012A config ARCH_LS1043A bool + select ARMV8_SET_SMPEN select FSL_LSCH2 select SYS_FSL_DDR select SYS_FSL_DDR_BE @@ -23,6 +25,7 @@ config ARCH_LS1043A config ARCH_LS1046A bool + select ARMV8_SET_SMPEN select FSL_LSCH2 select SYS_FSL_DDR select SYS_FSL_DDR_BE @@ -38,6 +41,7 @@ config ARCH_LS1046A config ARCH_LS2080A bool + select ARMV8_SET_SMPEN select FSL_LSCH3 select SYS_FSL_DDR select SYS_FSL_DDR_LE