From: Masahiro Yamada Date: Thu, 13 Nov 2014 11:31:51 +0000 (+0900) Subject: mtd: denali: set some registers after nand_scan_ident() X-Git-Tag: v2015.01-rc3~48 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=f09eb52b3ffcc63b5bdaa5ca33f130491201f571;p=u-boot mtd: denali: set some registers after nand_scan_ident() Some but not all of implementations of the Denali NAND controller have hardware circuits to detect the device parameters such as page_size, erase_size, etc. Even on those SoCs with such hardware supported, the hardware is known to detect wrong parameters for some nasty (almost buggy) NAND devices. The device parameters detected during nand_scan_ident() are more trustworthy. This commit sets some hardware registers to mtd->pagesize, mtd->oobsize, etc. in the code between nand_scan_ident() and nand_scan_tail(). Signed-off-by: Masahiro Yamada Cc: Scott Wood Cc: Chin Liang See --- diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 24bc0ab4a5..9e0429aa19 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -1209,6 +1209,17 @@ static int denali_init(struct denali_nand_info *denali) nand_oob.eccbytes = denali->nand.ecc.bytes; denali->nand.ecc.layout = &nand_oob; + writel(denali->mtd->erasesize / denali->mtd->writesize, + denali->flash_reg + PAGES_PER_BLOCK); + writel(denali->nand.options & NAND_BUSWIDTH_16 ? 1 : 0, + denali->flash_reg + DEVICE_WIDTH); + writel(denali->mtd->writesize, + denali->flash_reg + DEVICE_MAIN_AREA_SIZE); + writel(denali->mtd->oobsize, + denali->flash_reg + DEVICE_SPARE_AREA_SIZE); + if (readl(denali->flash_reg + DEVICES_CONNECTED) == 0) + writel(1, denali->flash_reg + DEVICES_CONNECTED); + /* override the default operations */ denali->nand.ecc.read_page = denali_read_page; denali->nand.ecc.read_page_raw = denali_read_page_raw;