From: Stefan Chulski <stefanc@marvell.com>
Date: Wed, 9 Aug 2017 07:37:47 +0000 (+0300)
Subject: net: mvpp2x: decrease size of AGGR_TXQ and CPU_DESC_CHUNK
X-Git-Tag: v2017.09-rc2~90^2~5
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=f0e970fd2a5f802f7f2553a13a2f1e4e4bf7d5ee;p=u-boot

net: mvpp2x: decrease size of AGGR_TXQ and CPU_DESC_CHUNK

U-boot use single physical tx queue with size 16 descriptors.
So aggregated tx queue size should be equal to physical tx queue
and cpu descriptor chunk(number of descriptors delivered from
physical tx queue to aggregated tx queue by one chunk) shouldn't be
larger than physical tx queue.

Fix:
Set AGGR_TXQ and CPU_DESC_CHUNK to be 16 descriptors, same as
physical TXQ.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
---

diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 426b2c2dce..355eb39293 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -617,10 +617,10 @@ enum mv_netc_lanes {
 #define MVPP2_MAX_TXD			16
 
 /* Amount of Tx descriptors that can be reserved at once by CPU */
-#define MVPP2_CPU_DESC_CHUNK		64
+#define MVPP2_CPU_DESC_CHUNK		16
 
 /* Max number of Tx descriptors in each aggregated queue */
-#define MVPP2_AGGR_TXQ_SIZE		256
+#define MVPP2_AGGR_TXQ_SIZE		16
 
 /* Descriptor aligned size */
 #define MVPP2_DESC_ALIGNED_SIZE		32