From: Philipp Tomsich Date: Wed, 7 Jun 2017 16:45:59 +0000 (+0200) Subject: rockchip: xhci: dm: convert fdt_get to dev_read X-Git-Tag: v2017.09-rc1~215^2~49 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=f2708c97c2ee213021a3d8ce484a6218ce4a5cf6;p=u-boot rockchip: xhci: dm: convert fdt_get to dev_read With the new dev_read functions available, we can convert the rockchip architecture-specific drivers and common drivers used by these devices over to the dev_read family of calls. This change covers the USB3 (xhci) driver for the Rockchip devices. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass --- diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c index c4ae55fc39..da21bc7ae8 100644 --- a/drivers/usb/host/xhci-rockchip.c +++ b/drivers/usb/host/xhci-rockchip.c @@ -86,18 +86,15 @@ static void rockchip_dwc3_phy_setup(struct dwc3 *dwc3_reg, struct udevice *dev) { u32 reg; - const void *blob = gd->fdt_blob; u32 utmi_bits; /* Set dwc3 usb2 phy config */ reg = readl(&dwc3_reg->g_usb2phycfg[0]); - if (fdtdec_get_bool(blob, dev_of_offset(dev), - "snps,dis-enblslpm-quirk")) + if (dev_read_bool(dev, "snps,dis-enblslpm-quirk")) reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; - utmi_bits = fdtdec_get_int(blob, dev_of_offset(dev), - "snps,phyif-utmi-bits", -1); + utmi_bits = dev_read_u32_default(dev, "snps,phyif-utmi-bits", -1); if (utmi_bits == 16) { reg |= DWC3_GUSB2PHYCFG_PHYIF; reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK; @@ -108,12 +105,10 @@ static void rockchip_dwc3_phy_setup(struct dwc3 *dwc3_reg, reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT; } - if (fdtdec_get_bool(blob, dev_of_offset(dev), - "snps,dis-u2-freeclk-exists-quirk")) + if (dev_read_bool(dev, "snps,dis-u2-freeclk-exists-quirk")) reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS; - if (fdtdec_get_bool(blob, dev_of_offset(dev), - "snps,dis-u2-susphy-quirk")) + if (dev_read_bool(dev, "snps,dis-u2-susphy-quirk")) reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; writel(reg, &dwc3_reg->g_usb2phycfg[0]);