From: Rafal Jaworowski Date: Tue, 15 Jan 2008 11:52:31 +0000 (+0100) Subject: ppc: Refactor cache routines, so there is only one common set. X-Git-Tag: v1.3.2-rc1~27 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=f57d7d364ce189e39b0a64338d2f8012c074a2bd;p=u-boot ppc: Refactor cache routines, so there is only one common set. Signed-off-by: Rafal Jaworowski --- diff --git a/cpu/mpc512x/start.S b/cpu/mpc512x/start.S index 244c69b812..5a9d8687f5 100644 --- a/cpu/mpc512x/start.S +++ b/cpu/mpc512x/start.S @@ -479,52 +479,6 @@ get_pvr: mfspr r3, PVR blr -/*------------------------------------------------------------------------------- */ -/* Function: ppcDcbf */ -/* Description: Data Cache block flush */ -/* Input: r3 = effective address */ -/* Output: none. */ -/*------------------------------------------------------------------------------- */ - .globl ppcDcbf -ppcDcbf: - dcbf r0,r3 - blr - -/*------------------------------------------------------------------------------- */ -/* Function: ppcDcbi */ -/* Description: Data Cache block Invalidate */ -/* Input: r3 = effective address */ -/* Output: none. */ -/*------------------------------------------------------------------------------- */ - .globl ppcDcbi -ppcDcbi: - dcbi r0,r3 - blr - -/*-------------------------------------------------------------------------- - * Function: ppcDcbz - * Description: Data Cache block zero. - * Input: r3 = effective address - * Output: none. - *-------------------------------------------------------------------------- */ - - .globl ppcDcbz -ppcDcbz: - dcbz r0,r3 - blr - - .globl ppcDWstore -ppcDWstore: - lfd 1, 0(r4) - stfd 1, 0(r3) - blr - - .globl ppcDWload -ppcDWload: - lfd 1, 0(r3) - stfd 1, 0(r4) - blr - /*-------------------------------------------------------------------*/ /* diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S index 1dfbf62239..309eb30e8e 100644 --- a/cpu/mpc83xx/start.S +++ b/cpu/mpc83xx/start.S @@ -840,40 +840,6 @@ get_pvr: mfspr r3, PVR blr -/*------------------------------------------------------------------------------- */ -/* Function: ppcDcbf */ -/* Description: Data Cache block flush */ -/* Input: r3 = effective address */ -/* Output: none. */ -/*------------------------------------------------------------------------------- */ - .globl ppcDcbf -ppcDcbf: - dcbf r0,r3 - blr - -/*------------------------------------------------------------------------------- */ -/* Function: ppcDcbi */ -/* Description: Data Cache block Invalidate */ -/* Input: r3 = effective address */ -/* Output: none. */ -/*------------------------------------------------------------------------------- */ - .globl ppcDcbi -ppcDcbi: - dcbi r0,r3 - blr - -/*-------------------------------------------------------------------------- - * Function: ppcDcbz - * Description: Data Cache block zero. - * Input: r3 = effective address - * Output: none. - *-------------------------------------------------------------------------- */ - - .globl ppcDcbz -ppcDcbz: - dcbz r0,r3 - blr - .globl ppcDWstore ppcDWstore: lfd 1, 0(r4) diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index e8e5eb297d..eb24dbc430 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -757,51 +757,6 @@ in32r: lwbrx r3,r0,r3 blr -/*------------------------------------------------------------------------------- */ -/* Function: ppcDcbf */ -/* Description: Data Cache block flush */ -/* Input: r3 = effective address */ -/* Output: none. */ -/*------------------------------------------------------------------------------- */ - .globl ppcDcbf -ppcDcbf: - dcbf r0,r3 - blr - -/*------------------------------------------------------------------------------- */ -/* Function: ppcDcbi */ -/* Description: Data Cache block Invalidate */ -/* Input: r3 = effective address */ -/* Output: none. */ -/*------------------------------------------------------------------------------- */ - .globl ppcDcbi -ppcDcbi: - dcbi r0,r3 - blr - -/*-------------------------------------------------------------------------- - * Function: ppcDcbz - * Description: Data Cache block zero. - * Input: r3 = effective address - * Output: none. - *-------------------------------------------------------------------------- */ - - .globl ppcDcbz -ppcDcbz: - dcbz r0,r3 - blr - -/*------------------------------------------------------------------------------- */ -/* Function: ppcSync */ -/* Description: Processor Synchronize */ -/* Input: none. */ -/* Output: none. */ -/*------------------------------------------------------------------------------- */ - .globl ppcSync -ppcSync: - sync - blr - /*------------------------------------------------------------------------------*/ /* diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index c83310a333..fa9736bce0 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -707,50 +707,6 @@ in32r: lwbrx r3,r0,r3 blr -/* - * Function: ppcDcbf - * Description: Data Cache block flush - * Input: r3 = effective address - * Output: none. - */ - .globl ppcDcbf -ppcDcbf: - dcbf r0,r3 - blr - -/* - * Function: ppcDcbi - * Description: Data Cache block Invalidate - * Input: r3 = effective address - * Output: none. - */ - .globl ppcDcbi -ppcDcbi: - dcbi r0,r3 - blr - -/* - * Function: ppcDcbz - * Description: Data Cache block zero. - * Input: r3 = effective address - * Output: none. - */ - .globl ppcDcbz -ppcDcbz: - dcbz r0,r3 - blr - -/* - * Function: ppcSync - * Description: Processor Synchronize - * Input: none. - * Output: none. - */ - .globl ppcSync -ppcSync: - sync - blr - /* * void relocate_code (addr_sp, gd, addr_moni) * diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 77c2aa4117..c29c87bfd0 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -1306,39 +1306,6 @@ in32r: lwbrx r3,r0,r3 blr -/*------------------------------------------------------------------------------- */ -/* Function: ppcDcbf */ -/* Description: Data Cache block flush */ -/* Input: r3 = effective address */ -/* Output: none. */ -/*------------------------------------------------------------------------------- */ - .globl ppcDcbf -ppcDcbf: - dcbf r0,r3 - blr - -/*------------------------------------------------------------------------------- */ -/* Function: ppcDcbi */ -/* Description: Data Cache block Invalidate */ -/* Input: r3 = effective address */ -/* Output: none. */ -/*------------------------------------------------------------------------------- */ - .globl ppcDcbi -ppcDcbi: - dcbi r0,r3 - blr - -/*------------------------------------------------------------------------------- */ -/* Function: ppcSync */ -/* Description: Processor Synchronize */ -/* Input: none. */ -/* Output: none. */ -/*------------------------------------------------------------------------------- */ - .globl ppcSync -ppcSync: - sync - blr - /* * void relocate_code (addr_sp, gd, addr_moni) * diff --git a/lib_ppc/Makefile b/lib_ppc/Makefile index 2ba034f1ee..afbd5caf5a 100644 --- a/lib_ppc/Makefile +++ b/lib_ppc/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(ARCH).a -SOBJS = ppcstring.o ticks.o +SOBJS = ppccache.o ppcstring.o ticks.o COBJS = board.o \ bat_rw.o cache.o extable.o kgdb.o time.o interrupts.o diff --git a/lib_ppc/ppccache.S b/lib_ppc/ppccache.S new file mode 100644 index 0000000000..25833ce797 --- /dev/null +++ b/lib_ppc/ppccache.S @@ -0,0 +1,72 @@ +/* + * Copyright (C) 1998 Dan Malek + * Copyright (C) 1999 Magnus Damm + * Copyright (C) 2000, 2001,2002 Wolfgang Denk + * Copyright Freescale Semiconductor, Inc. 2004, 2006. All rights reserved. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +/*------------------------------------------------------------------------------- */ +/* Function: ppcDcbf */ +/* Description: Data Cache block flush */ +/* Input: r3 = effective address */ +/* Output: none. */ +/*------------------------------------------------------------------------------- */ + .globl ppcDcbf +ppcDcbf: + dcbf r0,r3 + blr + +/*------------------------------------------------------------------------------- */ +/* Function: ppcDcbi */ +/* Description: Data Cache block Invalidate */ +/* Input: r3 = effective address */ +/* Output: none. */ +/*------------------------------------------------------------------------------- */ + .globl ppcDcbi +ppcDcbi: + dcbi r0,r3 + blr + +/*-------------------------------------------------------------------------- + * Function: ppcDcbz + * Description: Data Cache block zero. + * Input: r3 = effective address + * Output: none. + *-------------------------------------------------------------------------- */ + + .globl ppcDcbz +ppcDcbz: + dcbz r0,r3 + blr + +/*------------------------------------------------------------------------------- */ +/* Function: ppcSync */ +/* Description: Processor Synchronize */ +/* Input: none. */ +/* Output: none. */ +/*------------------------------------------------------------------------------- */ + .globl ppcSync +ppcSync: + sync + blr