From: David Brownell <dbrownell@users.sourceforge.net>
Date: Sat, 5 Dec 2009 02:57:31 +0000 (-0800)
Subject: ARM11: report watchpoint trigger insn
X-Git-Tag: v0.4.0-rc1~111
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=f67f6fe5bb8a466cc4d49f83608f026c4b233949;p=openocd

ARM11: report watchpoint trigger insn

As with Cortex-A8, the WFAR register holds useful information
that should be recorded and, where relevant, displayed.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
---

diff --git a/src/target/arm11.c b/src/target/arm11.c
index 943ab8ae..0486b04c 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -217,6 +217,19 @@ static int arm11_debug_entry(struct arm11_common *arm11)
 
 	}
 
+	if (arm11->arm.target->debug_reason == DBG_REASON_WATCHPOINT) {
+		uint32_t wfar;
+
+		/* MRC p15, 0, <Rd>, c6, c0, 1 ; Read WFAR */
+		retval = arm11_run_instr_data_from_core_via_r0(arm11,
+				ARMV4_5_MRC(15, 0, 0, 6, 0, 1),
+				&wfar);
+		if (retval != ERROR_OK)
+			return retval;
+		arm_dpm_report_wfar(arm11->arm.dpm, wfar);
+	}
+
+
 	retval = arm11_run_instr_data_finish(arm11);
 	if (retval != ERROR_OK)
 		return retval;
@@ -356,12 +369,17 @@ static int arm11_poll(struct target *target)
 /* architecture specific status reply */
 static int arm11_arch_state(struct target *target)
 {
+	struct arm11_common *arm11 = target_to_arm11(target);
 	int retval;
 
 	retval = armv4_5_arch_state(target);
 
 	/* REVISIT also display ARM11-specific MMU and cache status ... */
 
+	if (target->debug_reason == DBG_REASON_WATCHPOINT)
+		LOG_USER("Watchpoint triggered at PC %#08x",
+				(unsigned) arm11->dpm.wp_pc);
+
 	return retval;
 }