From: rtel Date: Fri, 25 Sep 2015 09:33:37 +0000 (+0000) Subject: Update RX231 projects to blink the LED. X-Git-Tag: V8.2.3~9 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=f7571fe067223bed899053d40e1eb31a4851c97c;p=freertos Update RX231 projects to blink the LED. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2382 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/.cproject b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/.cproject index 8f22596ce..905cdc923 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/.cproject +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/.cproject @@ -45,17 +45,14 @@ @@ -115,35 +112,17 @@ - - - - - - - - - - - - - - - - - + + + + + + + - + diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/.project b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/.project index b6b19c08a..e6ee496da 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/.project +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/.project @@ -31,12 +31,12 @@ FREERTOS_ROOT/FreeRTOS/Source - src/Main_Full/Standard_Demo_Tasks + src/Full_Demo/Standard_Demo_Tasks 2 FREERTOS_ROOT/FreeRTOS/Demo/Common/Minimal - src/Main_Full/Standard_Demo_Tasks/include + src/Full_Demo/Standard_Demo_Tasks/include 2 FREERTOS_ROOT/FreeRTOS/Demo/Common/include @@ -124,12 +124,12 @@ - 1443109933450 - src/Main_Full + 1443173361824 + src/Full_Demo 6 org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-*IAR.* + 1.0-name-matches-false-false-*IAR*.* @@ -151,8 +151,8 @@ - 1442958159158 - src/Main_Full/Standard_Demo_Tasks + 1443172629007 + src/Full_Demo/Standard_Demo_Tasks 5 org.eclipse.ui.ide.multiFilter @@ -160,8 +160,8 @@ - 1442958159162 - src/Main_Full/Standard_Demo_Tasks + 1443172629017 + src/Full_Demo/Standard_Demo_Tasks 5 org.eclipse.ui.ide.multiFilter @@ -169,8 +169,8 @@ - 1442958159166 - src/Main_Full/Standard_Demo_Tasks + 1443172629017 + src/Full_Demo/Standard_Demo_Tasks 5 org.eclipse.ui.ide.multiFilter @@ -178,8 +178,8 @@ - 1442958159170 - src/Main_Full/Standard_Demo_Tasks + 1443172629017 + src/Full_Demo/Standard_Demo_Tasks 5 org.eclipse.ui.ide.multiFilter @@ -187,8 +187,8 @@ - 1442958159175 - src/Main_Full/Standard_Demo_Tasks + 1443172629027 + src/Full_Demo/Standard_Demo_Tasks 5 org.eclipse.ui.ide.multiFilter @@ -196,8 +196,8 @@ - 1442958159180 - src/Main_Full/Standard_Demo_Tasks + 1443172629027 + src/Full_Demo/Standard_Demo_Tasks 5 org.eclipse.ui.ide.multiFilter @@ -205,8 +205,8 @@ - 1442958159185 - src/Main_Full/Standard_Demo_Tasks + 1443172629037 + src/Full_Demo/Standard_Demo_Tasks 5 org.eclipse.ui.ide.multiFilter @@ -214,8 +214,8 @@ - 1442958159190 - src/Main_Full/Standard_Demo_Tasks + 1443172629037 + src/Full_Demo/Standard_Demo_Tasks 5 org.eclipse.ui.ide.multiFilter @@ -223,8 +223,8 @@ - 1442958159195 - src/Main_Full/Standard_Demo_Tasks + 1443172629047 + src/Full_Demo/Standard_Demo_Tasks 5 org.eclipse.ui.ide.multiFilter @@ -232,8 +232,8 @@ - 1442958159200 - src/Main_Full/Standard_Demo_Tasks + 1443172629047 + src/Full_Demo/Standard_Demo_Tasks 5 org.eclipse.ui.ide.multiFilter @@ -241,8 +241,8 @@ - 1442958159205 - src/Main_Full/Standard_Demo_Tasks + 1443172629047 + src/Full_Demo/Standard_Demo_Tasks 5 org.eclipse.ui.ide.multiFilter @@ -250,8 +250,8 @@ - 1442958159209 - src/Main_Full/Standard_Demo_Tasks + 1443172629057 + src/Full_Demo/Standard_Demo_Tasks 5 org.eclipse.ui.ide.multiFilter @@ -259,8 +259,8 @@ - 1442958159214 - src/Main_Full/Standard_Demo_Tasks + 1443172629057 + src/Full_Demo/Standard_Demo_Tasks 5 org.eclipse.ui.ide.multiFilter @@ -268,8 +268,8 @@ - 1442958159219 - src/Main_Full/Standard_Demo_Tasks + 1443172629067 + src/Full_Demo/Standard_Demo_Tasks 5 org.eclipse.ui.ide.multiFilter @@ -277,8 +277,8 @@ - 1442958159224 - src/Main_Full/Standard_Demo_Tasks + 1443172629067 + src/Full_Demo/Standard_Demo_Tasks 5 org.eclipse.ui.ide.multiFilter diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c index 0a919d156..39c267b98 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c @@ -109,6 +109,9 @@ #include "task.h" #include "semphr.h" +/* Renesas includes. */ +#include "rskrx231def.h" + /* Priorities at which the tasks are created. */ #define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) #define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) @@ -221,7 +224,7 @@ const unsigned long ulExpectedValue = 100UL; is it the expected value? If it is, toggle the LED. */ if( ulReceivedValue == ulExpectedValue ) { -//_RB_ LED0 = !LED0; + LED0 = !LED0; ulReceivedValue = 0U; } } diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h index 82f660ee1..e186912f8 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h @@ -94,8 +94,8 @@ #define configUSE_PREEMPTION 1 #define configUSE_IDLE_HOOK 1 #define configUSE_TICK_HOOK 1 -#define configCPU_CLOCK_HZ ( 52000000UL ) /*_RB_ guess*/ -#define configPERIPHERAL_CLOCK_HZ ( 26000000UL ) /*_RB_ guess*/ +#define configCPU_CLOCK_HZ ( 52000000UL ) +#define configPERIPHERAL_CLOCK_HZ ( 26000000UL ) #define configTICK_RATE_HZ ( ( TickType_t ) 1000 ) #define configMINIMAL_STACK_SIZE ( ( unsigned short ) 140 ) #define configTOTAL_HEAP_SIZE ( ( size_t ) ( 40 * 1024 ) ) diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.c new file mode 100644 index 000000000..22bfa70d2 --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.c @@ -0,0 +1,187 @@ +/* + FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd. + All rights reserved + + VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. + + *************************************************************************** + >>! NOTE: The modification to the GPL is included to allow you to !<< + >>! distribute a combined work that includes FreeRTOS without being !<< + >>! obliged to provide the source code for proprietary components !<< + >>! outside of the FreeRTOS kernel. !<< + *************************************************************************** + + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. Full license text is available on the following + link: http://www.freertos.org/a00114.html + + *************************************************************************** + * * + * FreeRTOS provides completely free yet professionally developed, * + * robust, strictly quality controlled, supported, and cross * + * platform software that is more than just the market leader, it * + * is the industry's de facto standard. * + * * + * Help yourself get started quickly while simultaneously helping * + * to support the FreeRTOS project by purchasing a FreeRTOS * + * tutorial book, reference manual, or both: * + * http://www.FreeRTOS.org/Documentation * + * * + *************************************************************************** + + http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading + the FAQ page "My application does not run, what could be wrong?". Have you + defined configASSERT()? + + http://www.FreeRTOS.org/support - In return for receiving this top quality + embedded software for free we request you assist our global community by + participating in the support forum. + + http://www.FreeRTOS.org/training - Investing in training allows your team to + be as productive as possible as early as possible. Now you can receive + FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers + Ltd, and the world's leading authority on the world's leading RTOS. + + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, + including FreeRTOS+Trace - an indispensable productivity tool, a DOS + compatible FAT file system, and our tiny thread aware UDP/IP stack. + + http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. + Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. + + http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High + Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS + licenses offer ticketed support, indemnification and commercial middleware. + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and + mission critical applications that require provable dependability. + + 1 tab == 4 spaces! +*/ + +/* + * This file contains the non-portable and therefore RX62N specific parts of + * the IntQueue standard demo task - namely the configuration of the timers + * that generate the interrupts and the interrupt entry points. + */ + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" + +/* Demo includes. */ +#include "IntQueue.h" +#include "IntQueueTimer.h" + +#define tmrTIMER_0_1_FREQUENCY ( 2000UL ) +#define tmrTIMER_2_3_FREQUENCY ( 2111UL ) + +void vInitialiseTimerForIntQueueTest( void ) +{ + /* Ensure interrupts do not start until full configuration is complete. */ + portENTER_CRITICAL(); + { + /* Give write access. */ + SYSTEM.PRCR.WORD = 0xa502; + + /* Cascade two 8bit timer channels to generate the interrupts. + 8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are + utilised for this test. */ + + /* Enable the timers. */ + SYSTEM.MSTPCRA.BIT.MSTPA5 = 0; + SYSTEM.MSTPCRA.BIT.MSTPA4 = 0; + + /* Enable compare match A interrupt request. */ + TMR0.TCR.BIT.CMIEA = 1; + TMR2.TCR.BIT.CMIEA = 1; + + /* Clear the timer on compare match A. */ + TMR0.TCR.BIT.CCLR = 1; + TMR2.TCR.BIT.CCLR = 1; + + /* Set the compare match value. */ + TMR01.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 ); + TMR23.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 ); + + /* 16 bit operation ( count from timer 1,2 ). */ + TMR0.TCCR.BIT.CSS = 3; + TMR2.TCCR.BIT.CSS = 3; + + /* Use PCLK as the input. */ + TMR1.TCCR.BIT.CSS = 1; + TMR3.TCCR.BIT.CSS = 1; + + /* Divide PCLK by 8. */ + TMR1.TCCR.BIT.CKS = 2; + TMR3.TCCR.BIT.CKS = 2; + + /* Enable TMR 0, 2 interrupts. */ + TMR0.TCR.BIT.CMIEA = 1; + TMR2.TCR.BIT.CMIEA = 1; + + /* Set interrupt priority and enable. */ + IPR( TMR0, CMIA0 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1; + IR( TMR0, CMIA0 ) = 0U; + IEN( TMR0, CMIA0 ) = 1U; + + /* Do the same for TMR2, but to vector 129. */ + IPR( TMR2, CMIA2 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 2; + IR( TMR2, CMIA2 ) = 0U; + IEN( TMR2, CMIA2 ) = 1U; + } + portEXIT_CRITICAL(); +} +/*-----------------------------------------------------------*/ + +#ifdef __GNUC__ + + void vIntQTimerISR0( void ) __attribute__ ((interrupt)); + void vIntQTimerISR1( void ) __attribute__ ((interrupt)); + + void vIntQTimerISR0( void ) + { + /* Enable interrupts to allow interrupt nesting. */ + __asm volatile( "setpsw i" ); + + portYIELD_FROM_ISR( xFirstTimerHandler() ); + } + /*-----------------------------------------------------------*/ + + void vIntQTimerISR1( void ) + { + /* Enable interrupts to allow interrupt nesting. */ + __asm volatile( "setpsw i" ); + + portYIELD_FROM_ISR( xSecondTimerHandler() ); + } + +#endif /* __GNUC__ */ + +#ifdef __ICCRX__ + +#pragma vector = VECT_TMR0_CMIA0 +__interrupt void vT0_1InterruptHandler( void ) +{ + __enable_interrupt(); + portYIELD_FROM_ISR( xFirstTimerHandler() ); +} +/*-----------------------------------------------------------*/ + +#pragma vector = VECT_TMR2_CMIA2 +__interrupt void vT2_3InterruptHandler( void ) +{ + __enable_interrupt(); + portYIELD_FROM_ISR( xSecondTimerHandler() ); +} + +#endif /* __ICCRX__ */ + diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.h new file mode 100644 index 000000000..a26068ccb --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.h @@ -0,0 +1,78 @@ +/* + FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd. + All rights reserved + + VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. + + *************************************************************************** + >>! NOTE: The modification to the GPL is included to allow you to !<< + >>! distribute a combined work that includes FreeRTOS without being !<< + >>! obliged to provide the source code for proprietary components !<< + >>! outside of the FreeRTOS kernel. !<< + *************************************************************************** + + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. Full license text is available on the following + link: http://www.freertos.org/a00114.html + + *************************************************************************** + * * + * FreeRTOS provides completely free yet professionally developed, * + * robust, strictly quality controlled, supported, and cross * + * platform software that is more than just the market leader, it * + * is the industry's de facto standard. * + * * + * Help yourself get started quickly while simultaneously helping * + * to support the FreeRTOS project by purchasing a FreeRTOS * + * tutorial book, reference manual, or both: * + * http://www.FreeRTOS.org/Documentation * + * * + *************************************************************************** + + http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading + the FAQ page "My application does not run, what could be wrong?". Have you + defined configASSERT()? + + http://www.FreeRTOS.org/support - In return for receiving this top quality + embedded software for free we request you assist our global community by + participating in the support forum. + + http://www.FreeRTOS.org/training - Investing in training allows your team to + be as productive as possible as early as possible. Now you can receive + FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers + Ltd, and the world's leading authority on the world's leading RTOS. + + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, + including FreeRTOS+Trace - an indispensable productivity tool, a DOS + compatible FAT file system, and our tiny thread aware UDP/IP stack. + + http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. + Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. + + http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High + Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS + licenses offer ticketed support, indemnification and commercial middleware. + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and + mission critical applications that require provable dependability. + + 1 tab == 4 spaces! +*/ + +#ifndef INT_QUEUE_TIMER_H +#define INT_QUEUE_TIMER_H + +void vInitialiseTimerForIntQueueTest( void ); +BaseType_t xTimer0Handler( void ); +BaseType_t xTimer1Handler( void ); + +#endif + diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_GCC.S b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_GCC.S new file mode 100644 index 000000000..0d8d1e4cf --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_GCC.S @@ -0,0 +1,235 @@ +;/* +; FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd. +; All rights reserved +; +; VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. +; +; *************************************************************************** +; * * +; * FreeRTOS provides completely free yet professionally developed, * +; * robust, strictly quality controlled, supported, and cross * +; * platform software that has become a de facto standard. * +; * * +; * Help yourself get started quickly and support the FreeRTOS * +; * project by purchasing a FreeRTOS tutorial book, reference * +; * manual, or both from: http://www.FreeRTOS.org/Documentation * +; * * +; * Thank you! * +; * * +; *************************************************************************** +; +; This file is part of the FreeRTOS distribution. +; +; FreeRTOS is free software; you can redistribute it and/or modify it under +; the terms of the GNU General Public License (version 2) as published by the +; Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. +; +; >>! NOTE: The modification to the GPL is included to allow you to distribute +; >>! a combined work that includes FreeRTOS without being obliged to provide +; >>! the source code for proprietary components outside of the FreeRTOS +; >>! kernel. +; +; FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY +; WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS +; FOR A PARTICULAR PURPOSE. Full license text is available from the following +; link: http://www.freertos.org/a00114.html +; +; 1 tab == 4 spaces! +; +; *************************************************************************** +; * * +; * Having a problem? Start by reading the FAQ "My application does * +; * not run, what could be wrong?" * +; * * +; * http://www.FreeRTOS.org/FAQHelp.html * +; * * +; *************************************************************************** +; +; http://www.FreeRTOS.org - Documentation, books, training, latest versions, +; license and Real Time Engineers Ltd. contact details.; +; +; http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, +; including FreeRTOS+Trace - an indispensable productivity tool, a DOS +; compatible FAT file system, and our tiny thread aware UDP/IP stack. +; +; http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High +; Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS +; licenses offer ticketed support, indemnification and middleware. +; +; http://www.SafeRTOS.com - High Integrity Systems also provide a safety +; engineered and independently SIL3 certified version for use in safety and +; mission critical applications that require provable dependability. +; +; 1 tab == 4 spaces! +;*/ + + .global _vRegTest1Implementation + .global _vRegTest2Implementation + + .extern _ulRegTest1LoopCounter + .extern _ulRegTest2LoopCounter + + .text + + +;/* This function is explained in the comments at the top of main.c. */ +_vRegTest1Implementation: + + ; Put a known value in each register. + MOV.L #1, R1 + MOV.L #2, R2 + MOV.L #3, R3 + MOV.L #4, R4 + MOV.L #5, R5 + MOV.L #6, R6 + MOV.L #7, R7 + MOV.L #8, R8 + MOV.L #9, R9 + MOV.L #10, R10 + MOV.L #11, R11 + MOV.L #12, R12 + MOV.L #13, R13 + MOV.L #14, R14 + MOV.L #15, R15 + + ; Loop, checking each itteration that each register still contains the + ; expected value. +TestLoop1: + + ; Push the registers that are going to get clobbered. + PUSHM R14-R15 + + ; Increment the loop counter to show this task is still getting CPU time. + MOV.L #_ulRegTest1LoopCounter, R14 + MOV.L [ R14 ], R15 + ADD #1, R15 + MOV.L R15, [ R14 ] + + ; Yield to extend the text coverage. Set the bit in the ITU SWINTR register. + MOV.L #1, R14 + MOV.L #0872E0H, R15 + MOV.B R14, [R15] + NOP + NOP + + ; Restore the clobbered registers. + POPM R14-R15 + + ; Now compare each register to ensure it still contains the value that was + ; set before this loop was entered. + CMP #1, R1 + BNE RegTest1Error + CMP #2, R2 + BNE RegTest1Error + CMP #3, R3 + BNE RegTest1Error + CMP #4, R4 + BNE RegTest1Error + CMP #5, R5 + BNE RegTest1Error + CMP #6, R6 + BNE RegTest1Error + CMP #7, R7 + BNE RegTest1Error + CMP #8, R8 + BNE RegTest1Error + CMP #9, R9 + BNE RegTest1Error + CMP #10, R10 + BNE RegTest1Error + CMP #11, R11 + BNE RegTest1Error + CMP #12, R12 + BNE RegTest1Error + CMP #13, R13 + BNE RegTest1Error + CMP #14, R14 + BNE RegTest1Error + CMP #15, R15 + BNE RegTest1Error + + ; All comparisons passed, start a new itteratio of this loop. + BRA TestLoop1 + +RegTest1Error: + ; A compare failed, just loop here so the loop counter stops incrementing + ; causing the check task to indicate the error. + BRA RegTest1Error +;/*-----------------------------------------------------------*/ + +;/* This function is explained in the comments at the top of main.c. */ +_vRegTest2Implementation: + + ; Put a known value in each register. + MOV.L #10, R1 + MOV.L #20, R2 + MOV.L #30, R3 + MOV.L #40, R4 + MOV.L #50, R5 + MOV.L #60, R6 + MOV.L #70, R7 + MOV.L #80, R8 + MOV.L #90, R9 + MOV.L #100, R10 + MOV.L #110, R11 + MOV.L #120, R12 + MOV.L #130, R13 + MOV.L #140, R14 + MOV.L #150, R15 + + ; Loop, checking on each itteration that each register still contains the + ; expected value. +TestLoop2: + + ; Push the registers that are going to get clobbered. + PUSHM R14-R15 + + ; Increment the loop counter to show this task is still getting CPU time. + MOV.L #_ulRegTest2LoopCounter, R14 + MOV.L [ R14 ], R15 + ADD #1, R15 + MOV.L R15, [ R14 ] + + ; Restore the clobbered registers. + POPM R14-R15 + + CMP #10, R1 + BNE RegTest2Error + CMP #20, R2 + BNE RegTest2Error + CMP #30, R3 + BNE RegTest2Error + CMP #40, R4 + BNE RegTest2Error + CMP #50, R5 + BNE RegTest2Error + CMP #60, R6 + BNE RegTest2Error + CMP #70, R7 + BNE RegTest2Error + CMP #80, R8 + BNE RegTest2Error + CMP #90, R9 + BNE RegTest2Error + CMP #100, R10 + BNE RegTest2Error + CMP #110, R11 + BNE RegTest2Error + CMP #120, R12 + BNE RegTest2Error + CMP #130, R13 + BNE RegTest2Error + CMP #140, R14 + BNE RegTest2Error + CMP #150, R15 + BNE RegTest2Error + + ; All comparisons passed, start a new itteratio of this loop. + BRA TestLoop2 + +RegTest2Error: + ; A compare failed, just loop here so the loop counter stops incrementing + ; - causing the check task to indicate the error. + BRA RegTest2Error + + .END diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s new file mode 100644 index 000000000..af07b4bf0 --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s @@ -0,0 +1,304 @@ +/* + FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd. + All rights reserved + + VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. + + *************************************************************************** + >>! NOTE: The modification to the GPL is included to allow you to !<< + >>! distribute a combined work that includes FreeRTOS without being !<< + >>! obliged to provide the source code for proprietary components !<< + >>! outside of the FreeRTOS kernel. !<< + *************************************************************************** + + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. Full license text is available on the following + link: http://www.freertos.org/a00114.html + + *************************************************************************** + * * + * FreeRTOS provides completely free yet professionally developed, * + * robust, strictly quality controlled, supported, and cross * + * platform software that is more than just the market leader, it * + * is the industry's de facto standard. * + * * + * Help yourself get started quickly while simultaneously helping * + * to support the FreeRTOS project by purchasing a FreeRTOS * + * tutorial book, reference manual, or both: * + * http://www.FreeRTOS.org/Documentation * + * * + *************************************************************************** + + http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading + the FAQ page "My application does not run, what could be wrong?". Have you + defined configASSERT()? + + http://www.FreeRTOS.org/support - In return for receiving this top quality + embedded software for free we request you assist our global community by + participating in the support forum. + + http://www.FreeRTOS.org/training - Investing in training allows your team to + be as productive as possible as early as possible. Now you can receive + FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers + Ltd, and the world's leading authority on the world's leading RTOS. + + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, + including FreeRTOS+Trace - an indispensable productivity tool, a DOS + compatible FAT file system, and our tiny thread aware UDP/IP stack. + + http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. + Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. + + http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High + Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS + licenses offer ticketed support, indemnification and commercial middleware. + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and + mission critical applications that require provable dependability. + + 1 tab == 4 spaces! +*/ + + PUBLIC _vRegTest1Implementation + PUBLIC _vRegTest2Implementation + + EXTERN _ulRegTest1LoopCounter + EXTERN _ulRegTest2LoopCounter + + RSEG CODE:CODE(4) + +/* This function is explained in the comments at the top of main.c. */ +_vRegTest1Implementation: + + ;/* Put a known value in the guard byte of the accumulators. */ + MOV.L #10, R1 + MVTACGU R1, A0 + MOV.L #20, R1 + MVTACGU R1, A1 + + /* Put a known value in each register. */ + MOV #1, R1 + MOV #2, R2 + MOV #3, R3 + MOV #4, R4 + MOV #5, R5 + MOV #6, R6 + MOV #7, R7 + MOV #8, R8 + MOV #9, R9 + MOV #10, R10 + MOV #11, R11 + MOV #12, R12 + MOV #13, R13 + MOV #14, R14 + MOV #15, R15 + + ;/* Put a known value in the hi and low of the accumulators. */ + MVTACHI R1, A0 + MVTACLO R2, A0 + MVTACHI R3, A1 + MVTACLO R4, A1 + /* Loop, checking each itteration that each register still contains the + expected value. */ +TestLoop1: + + /* Push the registers that are going to get clobbered. */ + PUSHM R14-R15 + + /* Increment the loop counter to show this task is still getting CPU time. */ + MOV #_ulRegTest1LoopCounter, R14 + MOV [ R14 ], R15 + ADD #1, R15 + MOV R15, [ R14 ] + + /* Yield to extend the text coverage. Set the bit in the ITU SWINTR register. */ + MOV #1, R14 + MOV #0872E0H, R15 + MOV.B R14, [R15] + NOP + NOP + + ;/* Check accumulators. */ + MVFACHI #0, A0, R15 + CMP #1, R15 + BNE RegTest1Error + MVFACLO #0, A0, R15 + CMP #2, R15 + BNE RegTest1Error + MVFACGU #0, A0, R15 + CMP #10, R15 + BNE RegTest1Error + MVFACHI #0, A1, R15 + CMP #3, R15 + BNE RegTest1Error + MVFACLO #0, A1, R15 + CMP #4, R15 + BNE RegTest1Error + MVFACGU #0, A1, R15 + CMP #20, R15 + BNE RegTest1Error + + /* Restore the clobbered registers. */ + POPM R14-R15 + + /* Now compare each register to ensure it still contains the value that was + set before this loop was entered. */ + CMP #1, R1 + BNE RegTest1Error + CMP #2, R2 + BNE RegTest1Error + CMP #3, R3 + BNE RegTest1Error + CMP #4, R4 + BNE RegTest1Error + CMP #5, R5 + BNE RegTest1Error + CMP #6, R6 + BNE RegTest1Error + CMP #7, R7 + BNE RegTest1Error + CMP #8, R8 + BNE RegTest1Error + CMP #9, R9 + BNE RegTest1Error + CMP #10, R10 + BNE RegTest1Error + CMP #11, R11 + BNE RegTest1Error + CMP #12, R12 + BNE RegTest1Error + CMP #13, R13 + BNE RegTest1Error + CMP #14, R14 + BNE RegTest1Error + CMP #15, R15 + BNE RegTest1Error + + /* All comparisons passed, start a new itteratio of this loop. */ + BRA TestLoop1 + +RegTest1Error: + /* A compare failed, just loop here so the loop counter stops incrementing + - causing the check task to indicate the error. */ + BRA RegTest1Error +/*-----------------------------------------------------------*/ + +/* This function is explained in the comments at the top of main.c. */ +_vRegTest2Implementation: + + ;/* Put a known value in the guard byte of the accumulators. */ + MOV.L #1H, R1 + MVTACGU R1, A0 + MOV.L #2H, R1 + MVTACGU R1, A1 + + /* Put a known value in each register. */ + MOV #10H, R1 + MOV #20H, R2 + MOV #30H, R3 + MOV #40H, R4 + MOV #50H, R5 + MOV #60H, R6 + MOV #70H, R7 + MOV #80H, R8 + MOV #90H, R9 + MOV #100H, R10 + MOV #110H, R11 + MOV #120H, R12 + MOV #130H, R13 + MOV #140H, R14 + MOV #150H, R15 + + ;/* Put a known value in the hi and low of the accumulators. */ + MVTACHI R1, A0 + MVTACLO R2, A0 + MVTACHI R3, A1 + MVTACLO R4, A1 + + /* Loop, checking each itteration that each register still contains the + expected value. */ +TestLoop2: + + /* Push the registers that are going to get clobbered. */ + PUSHM R14-R15 + + /* Increment the loop counter to show this task is still getting CPU time. */ + MOV #_ulRegTest2LoopCounter, R14 + MOV [ R14 ], R15 + ADD #1, R15 + MOV R15, [ R14 ] + + ;/* Check accumulators. */ + MVFACHI #0, A0, R15 + CMP #10H, R15 + BNE RegTest1Error + MVFACLO #0, A0, R15 + CMP #20H, R15 + BNE RegTest1Error + MVFACGU #0, A0, R15 + CMP #1H, R15 + BNE RegTest1Error + MVFACHI #0, A1, R15 + CMP #30H, R15 + BNE RegTest1Error + MVFACLO #0, A1, R15 + CMP #40H, R15 + BNE RegTest1Error + MVFACGU #0, A1, R15 + CMP #2H, R15 + BNE RegTest1Error + + /* Restore the clobbered registers. */ + POPM R14-R15 + + /* Now compare each register to ensure it still contains the value that was + set before this loop was entered. */ + CMP #10H, R1 + BNE RegTest2Error + CMP #20H, R2 + BNE RegTest2Error + CMP #30H, R3 + BNE RegTest2Error + CMP #40H, R4 + BNE RegTest2Error + CMP #50H, R5 + BNE RegTest2Error + CMP #60H, R6 + BNE RegTest2Error + CMP #70H, R7 + BNE RegTest2Error + CMP #80H, R8 + BNE RegTest2Error + CMP #90H, R9 + BNE RegTest2Error + CMP #100H, R10 + BNE RegTest2Error + CMP #110H, R11 + BNE RegTest2Error + CMP #120H, R12 + BNE RegTest2Error + CMP #130H, R13 + BNE RegTest2Error + CMP #140H, R14 + BNE RegTest2Error + CMP #150H, R15 + BNE RegTest2Error + + /* All comparisons passed, start a new itteratio of this loop. */ + BRA TestLoop2 + +RegTest2Error: + /* A compare failed, just loop here so the loop counter stops incrementing + - causing the check task to indicate the error. */ + BRA RegTest2Error + + + END diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c new file mode 100644 index 000000000..4417b3017 --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c @@ -0,0 +1,502 @@ +/* + FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd. + All rights reserved + + VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. + + *************************************************************************** + >>! NOTE: The modification to the GPL is included to allow you to !<< + >>! distribute a combined work that includes FreeRTOS without being !<< + >>! obliged to provide the source code for proprietary components !<< + >>! outside of the FreeRTOS kernel. !<< + *************************************************************************** + + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. Full license text is available on the following + link: http://www.freertos.org/a00114.html + + *************************************************************************** + * * + * FreeRTOS provides completely free yet professionally developed, * + * robust, strictly quality controlled, supported, and cross * + * platform software that is more than just the market leader, it * + * is the industry's de facto standard. * + * * + * Help yourself get started quickly while simultaneously helping * + * to support the FreeRTOS project by purchasing a FreeRTOS * + * tutorial book, reference manual, or both: * + * http://www.FreeRTOS.org/Documentation * + * * + *************************************************************************** + + http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading + the FAQ page "My application does not run, what could be wrong?". Have you + defined configASSERT()? + + http://www.FreeRTOS.org/support - In return for receiving this top quality + embedded software for free we request you assist our global community by + participating in the support forum. + + http://www.FreeRTOS.org/training - Investing in training allows your team to + be as productive as possible as early as possible. Now you can receive + FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers + Ltd, and the world's leading authority on the world's leading RTOS. + + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, + including FreeRTOS+Trace - an indispensable productivity tool, a DOS + compatible FAT file system, and our tiny thread aware UDP/IP stack. + + http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. + Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. + + http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High + Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS + licenses offer ticketed support, indemnification and commercial middleware. + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and + mission critical applications that require provable dependability. + + 1 tab == 4 spaces! +*/ + +/****************************************************************************** + * NOTE 1: This project provides two demo applications. A simple blinky + * style project, and a more comprehensive test and demo application. The + * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to + * select between the two. See the notes on using + * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY in main.c. This file implements the + * comprehensive version. + * + * NOTE 2: This file only contains the source code that is specific to the + * full demo. Generic functions, such FreeRTOS hook functions, and functions + * required to configure the hardware, are defined in main.c. + * + ****************************************************************************** + * + * main_full() creates all the demo application tasks and software timers, then + * starts the scheduler. The web documentation provides more details of the + * standard demo application tasks, which provide no particular functionality, + * but do provide a good example of how to use the FreeRTOS API. + * + * In addition to the standard demo tasks, the following tasks and tests are + * defined and/or created within this file: + * + * "Reg test" tasks - These fill both the core and floating point registers with + * known values, then check that each register maintains its expected value for + * the lifetime of the task. Each task uses a different set of values. The reg + * test tasks execute with a very low priority, so get preempted very + * frequently. A register containing an unexpected value is indicative of an + * error in the context switching mechanism. + * + * "Check" task - The check task period is initially set to three seconds. The + * task checks that all the standard demo tasks, and the register check tasks, + * are not only still executing, but are executing without reporting any errors. + * If the check task discovers that a task has either stalled, or reported an + * error, then it changes its own execution period from the initial three + * seconds, to just 200ms. The check task also toggles an LED each time it is + * called. This provides a visual indication of the system status: If the LED + * toggles every three seconds, then no issues have been discovered. If the LED + * toggles every 200ms, then an issue has been discovered with at least one + * task. + */ + +/* Standard includes. */ +#include + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "timers.h" +#include "semphr.h" + +/* Standard demo application includes. */ +#include "flop.h" +#include "semtest.h" +#include "dynamic.h" +#include "BlockQ.h" +#include "blocktim.h" +#include "countsem.h" +#include "GenQTest.h" +#include "recmutex.h" +#include "death.h" +#include "partest.h" +#include "comtest2.h" +#include "serial.h" +#include "TimerDemo.h" +#include "QueueOverwrite.h" +#include "IntQueue.h" +#include "EventGroupsDemo.h" +#include "TaskNotify.h" +#include "IntSemTest.h" + +/* Renesas includes. */ +#include "rskrx231def.h" + +/* Priorities for the demo application tasks. */ +#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL ) +#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL ) +#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL ) +#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY ) +#define mainUART_COMMAND_CONSOLE_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3UL ) +#define mainCOM_TEST_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 ) +#define mainQUEUE_OVERWRITE_PRIORITY ( tskIDLE_PRIORITY ) + +/* The priority used by the UART command console task. */ +#define mainUART_COMMAND_CONSOLE_TASK_PRIORITY ( configMAX_PRIORITIES - 2 ) + +/* A block time of zero simply means "don't block". */ +#define mainDONT_BLOCK ( 0UL ) + +/* The period after which the check timer will expire, in ms, provided no errors +have been reported by any of the standard demo tasks. ms are converted to the +equivalent in ticks using the portTICK_PERIOD_MS constant. */ +#define mainNO_ERROR_CHECK_TASK_PERIOD ( 3000UL / portTICK_PERIOD_MS ) + +/* The period at which the check timer will expire, in ms, if an error has been +reported in one of the standard demo tasks. ms are converted to the equivalent +in ticks using the portTICK_PERIOD_MS constant. */ +#define mainERROR_CHECK_TASK_PERIOD ( 200UL / portTICK_PERIOD_MS ) + +/* Parameters that are passed into the register check tasks solely for the +purpose of ensuring parameters are passed into tasks correctly. */ +#define mainREG_TEST_1_PARAMETER ( ( void * ) 0x12121212UL ) +#define mainREG_TEST_2_PARAMETER ( ( void * ) 0x12345678UL ) + +/* The base period used by the timer test tasks. */ +#define mainTIMER_TEST_PERIOD ( 50 ) + +/*-----------------------------------------------------------*/ + +/* + * Entry point for the comprehensive demo (as opposed to the simple blinky + * demo). + */ +void main_full( void ); + +/* + * The full demo includes some functionality called from the tick hook. + */ +void vFullDemoTickHook( void ); + + /* + * The check task, as described at the top of this file. + */ +static void prvCheckTask( void *pvParameters ); + +/* + * Register check tasks, and the tasks used to write over and check the contents + * of the registers, as described at the top of this file. The nature of these + * files necessitates that they are written in assembly, but the entry points + * are kept in the C file for the convenience of checking the task parameter. + */ +static void prvRegTest1Task( void *pvParameters ); +static void prvRegTest2Task( void *pvParameters ); +void vRegTest1Implementation( void ); +void vRegTest2Implementation( void ); + +/* + * A high priority task that does nothing other than execute at a pseudo random + * time to ensure the other test tasks don't just execute in a repeating + * pattern. + */ +static void prvPseudoRandomiser( void *pvParameters ); + +/*-----------------------------------------------------------*/ + +/* The following two variables are used to communicate the status of the +register check tasks to the check task. If the variables keep incrementing, +then the register check tasks have not discovered any errors. If a variable +stops incrementing, then an error has been found. */ +volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL; + +/* String for display in the web server. It is set to an error message if the +check task detects an error. */ +const char *pcStatusMessage = "All tasks running without error"; +/*-----------------------------------------------------------*/ + +void main_full( void ) +{ + /* Start all the other standard demo/test tasks. They have no particular + functionality, but do demonstrate how to use the FreeRTOS API and test the + kernel port. */ + vStartInterruptQueueTasks(); + vStartDynamicPriorityTasks(); + vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY ); + vCreateBlockTimeTasks(); + vStartCountingSemaphoreTasks(); + vStartGenericQueueTasks( tskIDLE_PRIORITY ); + vStartRecursiveMutexTasks(); + vStartSemaphoreTasks( mainSEM_TEST_PRIORITY ); + vStartMathTasks( mainFLOP_TASK_PRIORITY ); + vStartTimerDemoTask( mainTIMER_TEST_PERIOD ); + vStartQueueOverwriteTask( mainQUEUE_OVERWRITE_PRIORITY ); + vStartEventGroupTasks(); + vStartTaskNotifyTask(); + vStartInterruptSemaphoreTasks(); + + /* Create the register check tasks, as described at the top of this file */ + xTaskCreate( prvRegTest1Task, "RegTst1", configMINIMAL_STACK_SIZE, mainREG_TEST_1_PARAMETER, tskIDLE_PRIORITY, NULL ); + xTaskCreate( prvRegTest2Task, "RegTst2", configMINIMAL_STACK_SIZE, mainREG_TEST_2_PARAMETER, tskIDLE_PRIORITY, NULL ); + + /* Create the task that just adds a little random behaviour. */ + xTaskCreate( prvPseudoRandomiser, "Rnd", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL ); + + /* Create the task that performs the 'check' functionality, as described at + the top of this file. */ + xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL ); + + /* The set of tasks created by the following function call have to be + created last as they keep account of the number of tasks they expect to see + running. */ + vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY ); + + /* Start the scheduler. */ + vTaskStartScheduler(); + + /* If all is well, the scheduler will now be running, and the following + line will never be reached. If the following line does execute, then + there was either insufficient FreeRTOS heap memory available for the idle + and/or timer tasks to be created, or vTaskStartScheduler() was called from + User mode. See the memory management section on the FreeRTOS web site for + more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The + mode from which main() is called is set in the C start up code and must be + a privileged mode (not user mode). */ + for( ;; ); +} +/*-----------------------------------------------------------*/ + +static void prvCheckTask( void *pvParameters ) +{ +TickType_t xDelayPeriod = mainNO_ERROR_CHECK_TASK_PERIOD; +TickType_t xLastExecutionTime; +static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0; +unsigned long ulErrorFound = pdFALSE; + + /* Just to stop compiler warnings. */ + ( void ) pvParameters; + + /* Initialise xLastExecutionTime so the first call to vTaskDelayUntil() + works correctly. */ + xLastExecutionTime = xTaskGetTickCount(); + + /* Cycle for ever, delaying then checking all the other tasks are still + operating without error. The onboard LED is toggled on each iteration. + If an error is detected then the delay period is decreased from + mainNO_ERROR_CHECK_TASK_PERIOD to mainERROR_CHECK_TASK_PERIOD. This has the + effect of increasing the rate at which the onboard LED toggles, and in so + doing gives visual feedback of the system status. */ + for( ;; ) + { + /* Delay until it is time to execute again. */ + vTaskDelayUntil( &xLastExecutionTime, xDelayPeriod ); + + /* Check all the demo tasks (other than the flash tasks) to ensure + that they are all still running, and that none have detected an error. */ + if( xAreIntQueueTasksStillRunning() != pdTRUE ) + { + ulErrorFound |= 1UL << 0UL; + } + + if( xAreMathsTaskStillRunning() != pdTRUE ) + { + ulErrorFound |= 1UL << 1UL; + } + + if( xAreDynamicPriorityTasksStillRunning() != pdTRUE ) + { + ulErrorFound |= 1UL << 2UL; + } + + if( xAreBlockingQueuesStillRunning() != pdTRUE ) + { + ulErrorFound |= 1UL << 3UL; + } + + if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE ) + { + ulErrorFound |= 1UL << 4UL; + } + + if ( xAreGenericQueueTasksStillRunning() != pdTRUE ) + { + ulErrorFound |= 1UL << 5UL; + } + + if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE ) + { + ulErrorFound |= 1UL << 6UL; + } + + if( xIsCreateTaskStillRunning() != pdTRUE ) + { + ulErrorFound |= 1UL << 7UL; + } + + if( xAreSemaphoreTasksStillRunning() != pdTRUE ) + { + ulErrorFound |= 1UL << 8UL; + } + + if( xAreTimerDemoTasksStillRunning( ( TickType_t ) mainNO_ERROR_CHECK_TASK_PERIOD ) != pdPASS ) + { + ulErrorFound |= 1UL << 9UL; + } + + if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE ) + { + ulErrorFound |= 1UL << 10UL; + } + + if( xIsQueueOverwriteTaskStillRunning() != pdPASS ) + { + ulErrorFound |= 1UL << 11UL; + } + + if( xAreEventGroupTasksStillRunning() != pdPASS ) + { + ulErrorFound |= 1UL << 12UL; + } + + if( xAreTaskNotificationTasksStillRunning() != pdTRUE ) + { + ulErrorFound |= 1UL << 13UL; + } + + if( xAreInterruptSemaphoreTasksStillRunning() != pdTRUE ) + { + ulErrorFound |= 1UL << 14UL; + } + + /* Check that the register test 1 task is still running. */ + if( ulLastRegTest1Value == ulRegTest1LoopCounter ) + { + ulErrorFound |= 1UL << 15UL; + } + ulLastRegTest1Value = ulRegTest1LoopCounter; + + /* Check that the register test 2 task is still running. */ + if( ulLastRegTest2Value == ulRegTest2LoopCounter ) + { + ulErrorFound |= 1UL << 16UL; + } + ulLastRegTest2Value = ulRegTest2LoopCounter; + + /* Toggle the check LED to give an indication of the system status. If + the LED toggles every mainNO_ERROR_CHECK_TASK_PERIOD milliseconds then + everything is ok. A faster toggle indicates an error. */ + LED0 = !LED0; + + if( ulErrorFound != pdFALSE ) + { + /* An error has been detected in one of the tasks - flash the LED + at a higher frequency to give visible feedback that something has + gone wrong (it might just be that the loop back connector required + by the comtest tasks has not been fitted). */ + xDelayPeriod = mainERROR_CHECK_TASK_PERIOD; + pcStatusMessage = "Error found in at least one task."; + } + } +} +/*-----------------------------------------------------------*/ + +static void prvPseudoRandomiser( void *pvParameters ) +{ +const uint32_t ulMultiplier = 0x015a4e35UL, ulIncrement = 1UL, ulMinDelay = ( 35 / portTICK_PERIOD_MS ); +volatile uint32_t ulNextRand = ( uint32_t ) &pvParameters, ulValue; + + /* This task does nothing other than ensure there is a little bit of + disruption in the scheduling pattern of the other tasks. Normally this is + done by generating interrupts at pseudo random times. */ + for( ;; ) + { + ulNextRand = ( ulMultiplier * ulNextRand ) + ulIncrement; + ulValue = ( ulNextRand >> 16UL ) & 0xffUL; + + if( ulValue < ulMinDelay ) + { + ulValue = ulMinDelay; + } + + vTaskDelay( ulValue ); + + while( ulValue > 0 ) + { + __asm volatile( "NOP" ); + __asm volatile( "NOP" ); + __asm volatile( "NOP" ); + __asm volatile( "NOP" ); + __asm volatile( "NOP" ); + __asm volatile( "NOP" ); + __asm volatile( "NOP" ); + + ulValue--; + } + } +} +/*-----------------------------------------------------------*/ + +void vFullDemoTickHook( void ) +{ + /* The full demo includes a software timer demo/test that requires + prodding periodically from the tick interrupt. */ + vTimerPeriodicISRTests(); + + /* Call the periodic queue overwrite from ISR demo. */ + vQueueOverwritePeriodicISRDemo(); + + /* Call the periodic event group from ISR demo. */ + vPeriodicEventGroupsProcessing(); + + /* Use task notifications from an interrupt. */ + xNotifyTaskFromISR(); + + /* Use mutexes from interrupts. */ + vInterruptSemaphorePeriodicTest(); +} +/*-----------------------------------------------------------*/ + +/* This function is explained in the comments at the top of this file. */ +static void prvRegTest1Task( void *pvParameters ) +{ + if( pvParameters != mainREG_TEST_1_PARAMETER ) + { + /* The parameter did not contain the expected value. */ + for( ;; ) + { + /* Stop the tick interrupt so its obvious something has gone wrong. */ + taskDISABLE_INTERRUPTS(); + } + } + + /* This is an inline asm function that never returns. */ + vRegTest1Implementation(); +} +/*-----------------------------------------------------------*/ + +/* This function is explained in the comments at the top of this file. */ +static void prvRegTest2Task( void *pvParameters ) +{ + if( pvParameters != mainREG_TEST_2_PARAMETER ) + { + /* The parameter did not contain the expected value. */ + for( ;; ) + { + /* Stop the tick interrupt so its obvious something has gone wrong. */ + taskDISABLE_INTERRUPTS(); + } + } + + /* This is an inline asm function that never returns. */ + vRegTest2Implementation(); +} +/*-----------------------------------------------------------*/ + diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Main_Full/IntQueueTimer.c b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Main_Full/IntQueueTimer.c deleted file mode 100644 index 5fc16a555..000000000 --- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Main_Full/IntQueueTimer.c +++ /dev/null @@ -1,187 +0,0 @@ -/* - FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -/* - * This file contains the non-portable and therefore RX62N specific parts of - * the IntQueue standard demo task - namely the configuration of the timers - * that generate the interrupts and the interrupt entry points. - */ - -/* Scheduler includes. */ -#include "FreeRTOS.h" -#include "task.h" - -/* Demo includes. */ -#include "IntQueueTimer.h" -#include "IntQueue.h" - -#define tmrTIMER_0_1_FREQUENCY ( 2000UL ) -#define tmrTIMER_2_3_FREQUENCY ( 2111UL ) - -void vInitialiseTimerForIntQueueTest( void ) -{ - /* Ensure interrupts do not start until full configuration is complete. */ - portENTER_CRITICAL(); - { - /* Give write access. */ - SYSTEM.PRCR.WORD = 0xa502; - - /* Cascade two 8bit timer channels to generate the interrupts. - 8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are - utilised for this test. */ - - /* Enable the timers. */ - SYSTEM.MSTPCRA.BIT.MSTPA5 = 0; - SYSTEM.MSTPCRA.BIT.MSTPA4 = 0; - - /* Enable compare match A interrupt request. */ - TMR0.TCR.BIT.CMIEA = 1; - TMR2.TCR.BIT.CMIEA = 1; - - /* Clear the timer on compare match A. */ - TMR0.TCR.BIT.CCLR = 1; - TMR2.TCR.BIT.CCLR = 1; - - /* Set the compare match value. */ - TMR01.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 ); - TMR23.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 ); - - /* 16 bit operation ( count from timer 1,2 ). */ - TMR0.TCCR.BIT.CSS = 3; - TMR2.TCCR.BIT.CSS = 3; - - /* Use PCLK as the input. */ - TMR1.TCCR.BIT.CSS = 1; - TMR3.TCCR.BIT.CSS = 1; - - /* Divide PCLK by 8. */ - TMR1.TCCR.BIT.CKS = 2; - TMR3.TCCR.BIT.CKS = 2; - - /* Enable TMR 0, 2 interrupts. */ - TMR0.TCR.BIT.CMIEA = 1; - TMR2.TCR.BIT.CMIEA = 1; - - /* Set interrupt priority and enable. */ - IPR( TMR0, CMIA0 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1; - IR( TMR0, CMIA0 ) = 0U; - IEN( TMR0, CMIA0 ) = 1U; - - /* Do the same for TMR2, but to vector 129. */ - IPR( TMR2, CMIA2 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 2; - IR( TMR2, CMIA2 ) = 0U; - IEN( TMR2, CMIA2 ) = 1U; - } - portEXIT_CRITICAL(); -} -/*-----------------------------------------------------------*/ - -#ifdef __GNUC__ - - void vIntQTimerISR0( void ) __attribute__ ((interrupt)); - void vIntQTimerISR1( void ) __attribute__ ((interrupt)); - - void vIntQTimerISR0( void ) - { - /* Enable interrupts to allow interrupt nesting. */ - __asm volatile( "setpsw i" ); - - portYIELD_FROM_ISR( xFirstTimerHandler() ); - } - /*-----------------------------------------------------------*/ - - void vIntQTimerISR1( void ) - { - /* Enable interrupts to allow interrupt nesting. */ - __asm volatile( "setpsw i" ); - - portYIELD_FROM_ISR( xSecondTimerHandler() ); - } - -#endif /* __GNUC__ */ - -#ifdef __ICCRX__ - -#pragma vector = VECT_TMR0_CMIA0 -__interrupt void vT0_1InterruptHandler( void ) -{ - __enable_interrupt(); - portYIELD_FROM_ISR( xFirstTimerHandler() ); -} -/*-----------------------------------------------------------*/ - -#pragma vector = VECT_TMR2_CMIA2 -__interrupt void vT2_3InterruptHandler( void ) -{ - __enable_interrupt(); - portYIELD_FROM_ISR( xSecondTimerHandler() ); -} - -#endif /* __ICCRX__ */ - diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Main_Full/IntQueueTimer.h b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Main_Full/IntQueueTimer.h deleted file mode 100644 index fcf9f8c1f..000000000 --- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Main_Full/IntQueueTimer.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef INT_QUEUE_TIMER_H -#define INT_QUEUE_TIMER_H - -void vInitialiseTimerForIntQueueTest( void ); -portBASE_TYPE xTimer0Handler( void ); -portBASE_TYPE xTimer1Handler( void ); - -#endif - diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Main_Full/RegTest_GCC.S b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Main_Full/RegTest_GCC.S deleted file mode 100644 index 0d8d1e4cf..000000000 --- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Main_Full/RegTest_GCC.S +++ /dev/null @@ -1,235 +0,0 @@ -;/* -; FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd. -; All rights reserved -; -; VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. -; -; *************************************************************************** -; * * -; * FreeRTOS provides completely free yet professionally developed, * -; * robust, strictly quality controlled, supported, and cross * -; * platform software that has become a de facto standard. * -; * * -; * Help yourself get started quickly and support the FreeRTOS * -; * project by purchasing a FreeRTOS tutorial book, reference * -; * manual, or both from: http://www.FreeRTOS.org/Documentation * -; * * -; * Thank you! * -; * * -; *************************************************************************** -; -; This file is part of the FreeRTOS distribution. -; -; FreeRTOS is free software; you can redistribute it and/or modify it under -; the terms of the GNU General Public License (version 2) as published by the -; Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. -; -; >>! NOTE: The modification to the GPL is included to allow you to distribute -; >>! a combined work that includes FreeRTOS without being obliged to provide -; >>! the source code for proprietary components outside of the FreeRTOS -; >>! kernel. -; -; FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY -; WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS -; FOR A PARTICULAR PURPOSE. Full license text is available from the following -; link: http://www.freertos.org/a00114.html -; -; 1 tab == 4 spaces! -; -; *************************************************************************** -; * * -; * Having a problem? Start by reading the FAQ "My application does * -; * not run, what could be wrong?" * -; * * -; * http://www.FreeRTOS.org/FAQHelp.html * -; * * -; *************************************************************************** -; -; http://www.FreeRTOS.org - Documentation, books, training, latest versions, -; license and Real Time Engineers Ltd. contact details.; -; -; http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, -; including FreeRTOS+Trace - an indispensable productivity tool, a DOS -; compatible FAT file system, and our tiny thread aware UDP/IP stack. -; -; http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High -; Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS -; licenses offer ticketed support, indemnification and middleware. -; -; http://www.SafeRTOS.com - High Integrity Systems also provide a safety -; engineered and independently SIL3 certified version for use in safety and -; mission critical applications that require provable dependability. -; -; 1 tab == 4 spaces! -;*/ - - .global _vRegTest1Implementation - .global _vRegTest2Implementation - - .extern _ulRegTest1LoopCounter - .extern _ulRegTest2LoopCounter - - .text - - -;/* This function is explained in the comments at the top of main.c. */ -_vRegTest1Implementation: - - ; Put a known value in each register. - MOV.L #1, R1 - MOV.L #2, R2 - MOV.L #3, R3 - MOV.L #4, R4 - MOV.L #5, R5 - MOV.L #6, R6 - MOV.L #7, R7 - MOV.L #8, R8 - MOV.L #9, R9 - MOV.L #10, R10 - MOV.L #11, R11 - MOV.L #12, R12 - MOV.L #13, R13 - MOV.L #14, R14 - MOV.L #15, R15 - - ; Loop, checking each itteration that each register still contains the - ; expected value. -TestLoop1: - - ; Push the registers that are going to get clobbered. - PUSHM R14-R15 - - ; Increment the loop counter to show this task is still getting CPU time. - MOV.L #_ulRegTest1LoopCounter, R14 - MOV.L [ R14 ], R15 - ADD #1, R15 - MOV.L R15, [ R14 ] - - ; Yield to extend the text coverage. Set the bit in the ITU SWINTR register. - MOV.L #1, R14 - MOV.L #0872E0H, R15 - MOV.B R14, [R15] - NOP - NOP - - ; Restore the clobbered registers. - POPM R14-R15 - - ; Now compare each register to ensure it still contains the value that was - ; set before this loop was entered. - CMP #1, R1 - BNE RegTest1Error - CMP #2, R2 - BNE RegTest1Error - CMP #3, R3 - BNE RegTest1Error - CMP #4, R4 - BNE RegTest1Error - CMP #5, R5 - BNE RegTest1Error - CMP #6, R6 - BNE RegTest1Error - CMP #7, R7 - BNE RegTest1Error - CMP #8, R8 - BNE RegTest1Error - CMP #9, R9 - BNE RegTest1Error - CMP #10, R10 - BNE RegTest1Error - CMP #11, R11 - BNE RegTest1Error - CMP #12, R12 - BNE RegTest1Error - CMP #13, R13 - BNE RegTest1Error - CMP #14, R14 - BNE RegTest1Error - CMP #15, R15 - BNE RegTest1Error - - ; All comparisons passed, start a new itteratio of this loop. - BRA TestLoop1 - -RegTest1Error: - ; A compare failed, just loop here so the loop counter stops incrementing - ; causing the check task to indicate the error. - BRA RegTest1Error -;/*-----------------------------------------------------------*/ - -;/* This function is explained in the comments at the top of main.c. */ -_vRegTest2Implementation: - - ; Put a known value in each register. - MOV.L #10, R1 - MOV.L #20, R2 - MOV.L #30, R3 - MOV.L #40, R4 - MOV.L #50, R5 - MOV.L #60, R6 - MOV.L #70, R7 - MOV.L #80, R8 - MOV.L #90, R9 - MOV.L #100, R10 - MOV.L #110, R11 - MOV.L #120, R12 - MOV.L #130, R13 - MOV.L #140, R14 - MOV.L #150, R15 - - ; Loop, checking on each itteration that each register still contains the - ; expected value. -TestLoop2: - - ; Push the registers that are going to get clobbered. - PUSHM R14-R15 - - ; Increment the loop counter to show this task is still getting CPU time. - MOV.L #_ulRegTest2LoopCounter, R14 - MOV.L [ R14 ], R15 - ADD #1, R15 - MOV.L R15, [ R14 ] - - ; Restore the clobbered registers. - POPM R14-R15 - - CMP #10, R1 - BNE RegTest2Error - CMP #20, R2 - BNE RegTest2Error - CMP #30, R3 - BNE RegTest2Error - CMP #40, R4 - BNE RegTest2Error - CMP #50, R5 - BNE RegTest2Error - CMP #60, R6 - BNE RegTest2Error - CMP #70, R7 - BNE RegTest2Error - CMP #80, R8 - BNE RegTest2Error - CMP #90, R9 - BNE RegTest2Error - CMP #100, R10 - BNE RegTest2Error - CMP #110, R11 - BNE RegTest2Error - CMP #120, R12 - BNE RegTest2Error - CMP #130, R13 - BNE RegTest2Error - CMP #140, R14 - BNE RegTest2Error - CMP #150, R15 - BNE RegTest2Error - - ; All comparisons passed, start a new itteratio of this loop. - BRA TestLoop2 - -RegTest2Error: - ; A compare failed, just loop here so the loop counter stops incrementing - ; - causing the check task to indicate the error. - BRA RegTest2Error - - .END diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Main_Full/RegTest_IAR.s b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Main_Full/RegTest_IAR.s deleted file mode 100644 index af07b4bf0..000000000 --- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Main_Full/RegTest_IAR.s +++ /dev/null @@ -1,304 +0,0 @@ -/* - FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - - PUBLIC _vRegTest1Implementation - PUBLIC _vRegTest2Implementation - - EXTERN _ulRegTest1LoopCounter - EXTERN _ulRegTest2LoopCounter - - RSEG CODE:CODE(4) - -/* This function is explained in the comments at the top of main.c. */ -_vRegTest1Implementation: - - ;/* Put a known value in the guard byte of the accumulators. */ - MOV.L #10, R1 - MVTACGU R1, A0 - MOV.L #20, R1 - MVTACGU R1, A1 - - /* Put a known value in each register. */ - MOV #1, R1 - MOV #2, R2 - MOV #3, R3 - MOV #4, R4 - MOV #5, R5 - MOV #6, R6 - MOV #7, R7 - MOV #8, R8 - MOV #9, R9 - MOV #10, R10 - MOV #11, R11 - MOV #12, R12 - MOV #13, R13 - MOV #14, R14 - MOV #15, R15 - - ;/* Put a known value in the hi and low of the accumulators. */ - MVTACHI R1, A0 - MVTACLO R2, A0 - MVTACHI R3, A1 - MVTACLO R4, A1 - /* Loop, checking each itteration that each register still contains the - expected value. */ -TestLoop1: - - /* Push the registers that are going to get clobbered. */ - PUSHM R14-R15 - - /* Increment the loop counter to show this task is still getting CPU time. */ - MOV #_ulRegTest1LoopCounter, R14 - MOV [ R14 ], R15 - ADD #1, R15 - MOV R15, [ R14 ] - - /* Yield to extend the text coverage. Set the bit in the ITU SWINTR register. */ - MOV #1, R14 - MOV #0872E0H, R15 - MOV.B R14, [R15] - NOP - NOP - - ;/* Check accumulators. */ - MVFACHI #0, A0, R15 - CMP #1, R15 - BNE RegTest1Error - MVFACLO #0, A0, R15 - CMP #2, R15 - BNE RegTest1Error - MVFACGU #0, A0, R15 - CMP #10, R15 - BNE RegTest1Error - MVFACHI #0, A1, R15 - CMP #3, R15 - BNE RegTest1Error - MVFACLO #0, A1, R15 - CMP #4, R15 - BNE RegTest1Error - MVFACGU #0, A1, R15 - CMP #20, R15 - BNE RegTest1Error - - /* Restore the clobbered registers. */ - POPM R14-R15 - - /* Now compare each register to ensure it still contains the value that was - set before this loop was entered. */ - CMP #1, R1 - BNE RegTest1Error - CMP #2, R2 - BNE RegTest1Error - CMP #3, R3 - BNE RegTest1Error - CMP #4, R4 - BNE RegTest1Error - CMP #5, R5 - BNE RegTest1Error - CMP #6, R6 - BNE RegTest1Error - CMP #7, R7 - BNE RegTest1Error - CMP #8, R8 - BNE RegTest1Error - CMP #9, R9 - BNE RegTest1Error - CMP #10, R10 - BNE RegTest1Error - CMP #11, R11 - BNE RegTest1Error - CMP #12, R12 - BNE RegTest1Error - CMP #13, R13 - BNE RegTest1Error - CMP #14, R14 - BNE RegTest1Error - CMP #15, R15 - BNE RegTest1Error - - /* All comparisons passed, start a new itteratio of this loop. */ - BRA TestLoop1 - -RegTest1Error: - /* A compare failed, just loop here so the loop counter stops incrementing - - causing the check task to indicate the error. */ - BRA RegTest1Error -/*-----------------------------------------------------------*/ - -/* This function is explained in the comments at the top of main.c. */ -_vRegTest2Implementation: - - ;/* Put a known value in the guard byte of the accumulators. */ - MOV.L #1H, R1 - MVTACGU R1, A0 - MOV.L #2H, R1 - MVTACGU R1, A1 - - /* Put a known value in each register. */ - MOV #10H, R1 - MOV #20H, R2 - MOV #30H, R3 - MOV #40H, R4 - MOV #50H, R5 - MOV #60H, R6 - MOV #70H, R7 - MOV #80H, R8 - MOV #90H, R9 - MOV #100H, R10 - MOV #110H, R11 - MOV #120H, R12 - MOV #130H, R13 - MOV #140H, R14 - MOV #150H, R15 - - ;/* Put a known value in the hi and low of the accumulators. */ - MVTACHI R1, A0 - MVTACLO R2, A0 - MVTACHI R3, A1 - MVTACLO R4, A1 - - /* Loop, checking each itteration that each register still contains the - expected value. */ -TestLoop2: - - /* Push the registers that are going to get clobbered. */ - PUSHM R14-R15 - - /* Increment the loop counter to show this task is still getting CPU time. */ - MOV #_ulRegTest2LoopCounter, R14 - MOV [ R14 ], R15 - ADD #1, R15 - MOV R15, [ R14 ] - - ;/* Check accumulators. */ - MVFACHI #0, A0, R15 - CMP #10H, R15 - BNE RegTest1Error - MVFACLO #0, A0, R15 - CMP #20H, R15 - BNE RegTest1Error - MVFACGU #0, A0, R15 - CMP #1H, R15 - BNE RegTest1Error - MVFACHI #0, A1, R15 - CMP #30H, R15 - BNE RegTest1Error - MVFACLO #0, A1, R15 - CMP #40H, R15 - BNE RegTest1Error - MVFACGU #0, A1, R15 - CMP #2H, R15 - BNE RegTest1Error - - /* Restore the clobbered registers. */ - POPM R14-R15 - - /* Now compare each register to ensure it still contains the value that was - set before this loop was entered. */ - CMP #10H, R1 - BNE RegTest2Error - CMP #20H, R2 - BNE RegTest2Error - CMP #30H, R3 - BNE RegTest2Error - CMP #40H, R4 - BNE RegTest2Error - CMP #50H, R5 - BNE RegTest2Error - CMP #60H, R6 - BNE RegTest2Error - CMP #70H, R7 - BNE RegTest2Error - CMP #80H, R8 - BNE RegTest2Error - CMP #90H, R9 - BNE RegTest2Error - CMP #100H, R10 - BNE RegTest2Error - CMP #110H, R11 - BNE RegTest2Error - CMP #120H, R12 - BNE RegTest2Error - CMP #130H, R13 - BNE RegTest2Error - CMP #140H, R14 - BNE RegTest2Error - CMP #150H, R15 - BNE RegTest2Error - - /* All comparisons passed, start a new itteratio of this loop. */ - BRA TestLoop2 - -RegTest2Error: - /* A compare failed, just loop here so the loop counter stops incrementing - - causing the check task to indicate the error. */ - BRA RegTest2Error - - - END diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Main_Full/main_full.c b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Main_Full/main_full.c deleted file mode 100644 index 8aec86bc7..000000000 --- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Main_Full/main_full.c +++ /dev/null @@ -1,499 +0,0 @@ -/* - FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -/****************************************************************************** - * NOTE 1: This project provides two demo applications. A simple blinky - * style project, and a more comprehensive test and demo application. The - * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to - * select between the two. See the notes on using - * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY in main.c. This file implements the - * comprehensive version. - * - * NOTE 2: This file only contains the source code that is specific to the - * full demo. Generic functions, such FreeRTOS hook functions, and functions - * required to configure the hardware, are defined in main.c. - * - ****************************************************************************** - * - * main_full() creates all the demo application tasks and software timers, then - * starts the scheduler. The web documentation provides more details of the - * standard demo application tasks, which provide no particular functionality, - * but do provide a good example of how to use the FreeRTOS API. - * - * In addition to the standard demo tasks, the following tasks and tests are - * defined and/or created within this file: - * - * "Reg test" tasks - These fill both the core and floating point registers with - * known values, then check that each register maintains its expected value for - * the lifetime of the task. Each task uses a different set of values. The reg - * test tasks execute with a very low priority, so get preempted very - * frequently. A register containing an unexpected value is indicative of an - * error in the context switching mechanism. - * - * "Check" task - The check task period is initially set to three seconds. The - * task checks that all the standard demo tasks, and the register check tasks, - * are not only still executing, but are executing without reporting any errors. - * If the check task discovers that a task has either stalled, or reported an - * error, then it changes its own execution period from the initial three - * seconds, to just 200ms. The check task also toggles an LED each time it is - * called. This provides a visual indication of the system status: If the LED - * toggles every three seconds, then no issues have been discovered. If the LED - * toggles every 200ms, then an issue has been discovered with at least one - * task. - */ - -/* Standard includes. */ -#include - -/* Kernel includes. */ -#include "FreeRTOS.h" -#include "task.h" -#include "timers.h" -#include "semphr.h" - -/* Standard demo application includes. */ -#include "flop.h" -#include "semtest.h" -#include "dynamic.h" -#include "BlockQ.h" -#include "blocktim.h" -#include "countsem.h" -#include "GenQTest.h" -#include "recmutex.h" -#include "death.h" -#include "partest.h" -#include "comtest2.h" -#include "serial.h" -#include "TimerDemo.h" -#include "QueueOverwrite.h" -#include "IntQueue.h" -#include "EventGroupsDemo.h" -#include "TaskNotify.h" -#include "IntSemTest.h" - -/* Priorities for the demo application tasks. */ -#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL ) -#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL ) -#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL ) -#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY ) -#define mainUART_COMMAND_CONSOLE_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3UL ) -#define mainCOM_TEST_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) -#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 ) -#define mainQUEUE_OVERWRITE_PRIORITY ( tskIDLE_PRIORITY ) - -/* The priority used by the UART command console task. */ -#define mainUART_COMMAND_CONSOLE_TASK_PRIORITY ( configMAX_PRIORITIES - 2 ) - -/* A block time of zero simply means "don't block". */ -#define mainDONT_BLOCK ( 0UL ) - -/* The period after which the check timer will expire, in ms, provided no errors -have been reported by any of the standard demo tasks. ms are converted to the -equivalent in ticks using the portTICK_PERIOD_MS constant. */ -#define mainNO_ERROR_CHECK_TASK_PERIOD ( 3000UL / portTICK_PERIOD_MS ) - -/* The period at which the check timer will expire, in ms, if an error has been -reported in one of the standard demo tasks. ms are converted to the equivalent -in ticks using the portTICK_PERIOD_MS constant. */ -#define mainERROR_CHECK_TASK_PERIOD ( 200UL / portTICK_PERIOD_MS ) - -/* Parameters that are passed into the register check tasks solely for the -purpose of ensuring parameters are passed into tasks correctly. */ -#define mainREG_TEST_1_PARAMETER ( ( void * ) 0x12121212UL ) -#define mainREG_TEST_2_PARAMETER ( ( void * ) 0x12345678UL ) - -/* The base period used by the timer test tasks. */ -#define mainTIMER_TEST_PERIOD ( 50 ) - -/*-----------------------------------------------------------*/ - -/* - * Entry point for the comprehensive demo (as opposed to the simple blinky - * demo). - */ -void main_full( void ); - -/* - * The full demo includes some functionality called from the tick hook. - */ -void vFullDemoTickHook( void ); - - /* - * The check task, as described at the top of this file. - */ -static void prvCheckTask( void *pvParameters ); - -/* - * Register check tasks, and the tasks used to write over and check the contents - * of the registers, as described at the top of this file. The nature of these - * files necessitates that they are written in assembly, but the entry points - * are kept in the C file for the convenience of checking the task parameter. - */ -static void prvRegTest1Task( void *pvParameters ); -static void prvRegTest2Task( void *pvParameters ); -void vRegTest1Implementation( void ); -void vRegTest2Implementation( void ); - -/* - * A high priority task that does nothing other than execute at a pseudo random - * time to ensure the other test tasks don't just execute in a repeating - * pattern. - */ -static void prvPseudoRandomiser( void *pvParameters ); - -/*-----------------------------------------------------------*/ - -/* The following two variables are used to communicate the status of the -register check tasks to the check task. If the variables keep incrementing, -then the register check tasks have not discovered any errors. If a variable -stops incrementing, then an error has been found. */ -volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL; - -/* String for display in the web server. It is set to an error message if the -check task detects an error. */ -const char *pcStatusMessage = "All tasks running without error"; -/*-----------------------------------------------------------*/ - -void main_full( void ) -{ - /* Start all the other standard demo/test tasks. They have no particular - functionality, but do demonstrate how to use the FreeRTOS API and test the - kernel port. */ - vStartInterruptQueueTasks(); - vStartDynamicPriorityTasks(); - vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY ); - vCreateBlockTimeTasks(); - vStartCountingSemaphoreTasks(); - vStartGenericQueueTasks( tskIDLE_PRIORITY ); - vStartRecursiveMutexTasks(); - vStartSemaphoreTasks( mainSEM_TEST_PRIORITY ); - vStartMathTasks( mainFLOP_TASK_PRIORITY ); - vStartTimerDemoTask( mainTIMER_TEST_PERIOD ); - vStartQueueOverwriteTask( mainQUEUE_OVERWRITE_PRIORITY ); - vStartEventGroupTasks(); - vStartTaskNotifyTask(); - vStartInterruptSemaphoreTasks(); - - /* Create the register check tasks, as described at the top of this file */ - xTaskCreate( prvRegTest1Task, "RegTst1", configMINIMAL_STACK_SIZE, mainREG_TEST_1_PARAMETER, tskIDLE_PRIORITY, NULL ); - xTaskCreate( prvRegTest2Task, "RegTst2", configMINIMAL_STACK_SIZE, mainREG_TEST_2_PARAMETER, tskIDLE_PRIORITY, NULL ); - - /* Create the task that just adds a little random behaviour. */ - xTaskCreate( prvPseudoRandomiser, "Rnd", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL ); - - /* Create the task that performs the 'check' functionality, as described at - the top of this file. */ - xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL ); - - /* The set of tasks created by the following function call have to be - created last as they keep account of the number of tasks they expect to see - running. */ - vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY ); - - /* Start the scheduler. */ - vTaskStartScheduler(); - - /* If all is well, the scheduler will now be running, and the following - line will never be reached. If the following line does execute, then - there was either insufficient FreeRTOS heap memory available for the idle - and/or timer tasks to be created, or vTaskStartScheduler() was called from - User mode. See the memory management section on the FreeRTOS web site for - more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The - mode from which main() is called is set in the C start up code and must be - a privileged mode (not user mode). */ - for( ;; ); -} -/*-----------------------------------------------------------*/ - -static void prvCheckTask( void *pvParameters ) -{ -TickType_t xDelayPeriod = mainNO_ERROR_CHECK_TASK_PERIOD; -TickType_t xLastExecutionTime; -static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0; -unsigned long ulErrorFound = pdFALSE; - - /* Just to stop compiler warnings. */ - ( void ) pvParameters; - - /* Initialise xLastExecutionTime so the first call to vTaskDelayUntil() - works correctly. */ - xLastExecutionTime = xTaskGetTickCount(); - - /* Cycle for ever, delaying then checking all the other tasks are still - operating without error. The onboard LED is toggled on each iteration. - If an error is detected then the delay period is decreased from - mainNO_ERROR_CHECK_TASK_PERIOD to mainERROR_CHECK_TASK_PERIOD. This has the - effect of increasing the rate at which the onboard LED toggles, and in so - doing gives visual feedback of the system status. */ - for( ;; ) - { - /* Delay until it is time to execute again. */ - vTaskDelayUntil( &xLastExecutionTime, xDelayPeriod ); - - /* Check all the demo tasks (other than the flash tasks) to ensure - that they are all still running, and that none have detected an error. */ - if( xAreIntQueueTasksStillRunning() != pdTRUE ) - { - ulErrorFound |= 1UL << 0UL; - } - - if( xAreMathsTaskStillRunning() != pdTRUE ) - { - ulErrorFound |= 1UL << 1UL; - } - - if( xAreDynamicPriorityTasksStillRunning() != pdTRUE ) - { - ulErrorFound |= 1UL << 2UL; - } - - if( xAreBlockingQueuesStillRunning() != pdTRUE ) - { - ulErrorFound |= 1UL << 3UL; - } - - if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE ) - { - ulErrorFound |= 1UL << 4UL; - } - - if ( xAreGenericQueueTasksStillRunning() != pdTRUE ) - { - ulErrorFound |= 1UL << 5UL; - } - - if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE ) - { - ulErrorFound |= 1UL << 6UL; - } - - if( xIsCreateTaskStillRunning() != pdTRUE ) - { - ulErrorFound |= 1UL << 7UL; - } - - if( xAreSemaphoreTasksStillRunning() != pdTRUE ) - { - ulErrorFound |= 1UL << 8UL; - } - - if( xAreTimerDemoTasksStillRunning( ( TickType_t ) mainNO_ERROR_CHECK_TASK_PERIOD ) != pdPASS ) - { - ulErrorFound |= 1UL << 9UL; - } - - if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE ) - { - ulErrorFound |= 1UL << 10UL; - } - - if( xIsQueueOverwriteTaskStillRunning() != pdPASS ) - { - ulErrorFound |= 1UL << 11UL; - } - - if( xAreEventGroupTasksStillRunning() != pdPASS ) - { - ulErrorFound |= 1UL << 12UL; - } - - if( xAreTaskNotificationTasksStillRunning() != pdTRUE ) - { - ulErrorFound |= 1UL << 13UL; - } - - if( xAreInterruptSemaphoreTasksStillRunning() != pdTRUE ) - { - ulErrorFound |= 1UL << 14UL; - } - - /* Check that the register test 1 task is still running. */ - if( ulLastRegTest1Value == ulRegTest1LoopCounter ) - { - ulErrorFound |= 1UL << 15UL; - } - ulLastRegTest1Value = ulRegTest1LoopCounter; - - /* Check that the register test 2 task is still running. */ - if( ulLastRegTest2Value == ulRegTest2LoopCounter ) - { - ulErrorFound |= 1UL << 16UL; - } - ulLastRegTest2Value = ulRegTest2LoopCounter; - - /* Toggle the check LED to give an indication of the system status. If - the LED toggles every mainNO_ERROR_CHECK_TASK_PERIOD milliseconds then - everything is ok. A faster toggle indicates an error. */ -//_RB_ LED0 = !LED0; - - if( ulErrorFound != pdFALSE ) - { - /* An error has been detected in one of the tasks - flash the LED - at a higher frequency to give visible feedback that something has - gone wrong (it might just be that the loop back connector required - by the comtest tasks has not been fitted). */ - xDelayPeriod = mainERROR_CHECK_TASK_PERIOD; - pcStatusMessage = "Error found in at least one task."; - } - } -} -/*-----------------------------------------------------------*/ - -static void prvPseudoRandomiser( void *pvParameters ) -{ -const uint32_t ulMultiplier = 0x015a4e35UL, ulIncrement = 1UL, ulMinDelay = ( 35 / portTICK_PERIOD_MS ); -volatile uint32_t ulNextRand = ( uint32_t ) &pvParameters, ulValue; - - /* This task does nothing other than ensure there is a little bit of - disruption in the scheduling pattern of the other tasks. Normally this is - done by generating interrupts at pseudo random times. */ - for( ;; ) - { - ulNextRand = ( ulMultiplier * ulNextRand ) + ulIncrement; - ulValue = ( ulNextRand >> 16UL ) & 0xffUL; - - if( ulValue < ulMinDelay ) - { - ulValue = ulMinDelay; - } - - vTaskDelay( ulValue ); - - while( ulValue > 0 ) - { - __asm volatile( "NOP" ); - __asm volatile( "NOP" ); - __asm volatile( "NOP" ); - __asm volatile( "NOP" ); - __asm volatile( "NOP" ); - __asm volatile( "NOP" ); - __asm volatile( "NOP" ); - - ulValue--; - } - } -} -/*-----------------------------------------------------------*/ - -void vFullDemoTickHook( void ) -{ - /* The full demo includes a software timer demo/test that requires - prodding periodically from the tick interrupt. */ - vTimerPeriodicISRTests(); - - /* Call the periodic queue overwrite from ISR demo. */ - vQueueOverwritePeriodicISRDemo(); - - /* Call the periodic event group from ISR demo. */ - vPeriodicEventGroupsProcessing(); - - /* Use task notifications from an interrupt. */ - xNotifyTaskFromISR(); - - /* Use mutexes from interrupts. */ - vInterruptSemaphorePeriodicTest(); -} -/*-----------------------------------------------------------*/ - -/* This function is explained in the comments at the top of this file. */ -static void prvRegTest1Task( void *pvParameters ) -{ - if( pvParameters != mainREG_TEST_1_PARAMETER ) - { - /* The parameter did not contain the expected value. */ - for( ;; ) - { - /* Stop the tick interrupt so its obvious something has gone wrong. */ - taskDISABLE_INTERRUPTS(); - } - } - - /* This is an inline asm function that never returns. */ - vRegTest1Implementation(); -} -/*-----------------------------------------------------------*/ - -/* This function is explained in the comments at the top of this file. */ -static void prvRegTest2Task( void *pvParameters ) -{ - if( pvParameters != mainREG_TEST_2_PARAMETER ) - { - /* The parameter did not contain the expected value. */ - for( ;; ) - { - /* Stop the tick interrupt so its obvious something has gone wrong. */ - taskDISABLE_INTERRUPTS(); - } - } - - /* This is an inline asm function that never returns. */ - vRegTest2Implementation(); -} -/*-----------------------------------------------------------*/ - diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_cgc.c b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_cgc.c index 1e082fac8..2e065eb1b 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_cgc.c +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_cgc.c @@ -21,9 +21,9 @@ * File Name : r_cg_cgc.c * Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015] * Device(s) : R5F52318AxFP -* Tool-Chain : GCCRX +* Tool-Chain : CCRX * Description : This file implements device driver for CGC module. -* Creation Date: 23/09/2015 +* Creation Date: 2015/08/17 ***********************************************************************************************************************/ /*********************************************************************************************************************** @@ -56,11 +56,12 @@ Global variables and functions void R_CGC_Create(void) { uint32_t sckcr_dummy; + uint32_t w_count; volatile uint32_t memorywaitcycle; /* Set main clock control registers */ SYSTEM.MOFCR.BYTE = _00_CGC_MAINOSC_RESONATOR | _00_CGC_MAINOSC_UNDER10M; - SYSTEM.MOSCWTCR.BYTE = _06_CGC_OSC_WAIT_CYCLE_32768; + SYSTEM.MOSCWTCR.BYTE = _04_CGC_OSC_WAIT_CYCLE_8192; /* Set main clock operation */ SYSTEM.MOSCCR.BIT.MOSTP = 0U; @@ -69,31 +70,55 @@ void R_CGC_Create(void) while (1U != SYSTEM.OSCOVFSR.BIT.MOOVF); /* Set system clock */ - sckcr_dummy = _00000000_CGC_PCLKD_DIV_1 | _00000100_CGC_PCLKB_DIV_2 | _00001000_CGC_PCLKA_DIV_2 | + sckcr_dummy = _00000000_CGC_PCLKD_DIV_1 | _00000100_CGC_PCLKB_DIV_2 | _00000000_CGC_PCLKA_DIV_1 | _00010000_CGC_BCLK_DIV_2 | _00000000_CGC_ICLK_DIV_1 | _10000000_CGC_FCLK_DIV_2; SYSTEM.SCKCR.LONG = sckcr_dummy; while (SYSTEM.SCKCR.LONG != sckcr_dummy); /* Set PLL circuit */ - SYSTEM.PLLCR.WORD = _0000_CGC_PLL_FREQ_DIV_1 | _0C00_CGC_PLL_FREQ_MUL_6_5; + SYSTEM.PLLCR.WORD = _0001_CGC_PLL_FREQ_DIV_2 | _1A00_CGC_PLL_FREQ_MUL_13_5; SYSTEM.PLLCR2.BIT.PLLEN = 0U; /* Wait for PLL wait counter overflow */ while (1U != SYSTEM.OSCOVFSR.BIT.PLOVF); - /* Disable sub-clock */ + /* Stop sub-clock */ SYSTEM.SOSCCR.BIT.SOSTP = 1U; /* Wait for the register modification to complete */ while (1U != SYSTEM.SOSCCR.BIT.SOSTP); - /* Disable sub-clock */ + /* Stop sub-clock */ RTC.RCR3.BIT.RTCEN = 0U; /* Wait for the register modification to complete */ while (0U != RTC.RCR3.BIT.RTCEN); + /* Wait for 5 sub-clock cycles */ + for (w_count = 0U; w_count < _007B_CGC_SUBSTPWT_WAIT; w_count++) + { + nop(); + } + + /* Set sub-clock drive capacity */ + RTC.RCR3.BIT.RTCDV = 1U; + + /* Wait for the register modification to complete */ + while (1U != RTC.RCR3.BIT.RTCDV); + + /* Set sub-clock */ + SYSTEM.SOSCCR.BIT.SOSTP = 0U; + + /* Wait for the register modification to complete */ + while (0U != SYSTEM.SOSCCR.BIT.SOSTP); + + /* Wait for sub-clock to be stable */ + for (w_count = 0U; w_count < _00061A81_CGC_SUBOSCWT_WAIT; w_count++) + { + nop(); + } + /* Set BCLK */ SYSTEM.SCKCR.BIT.PSTOP1 = 1U; diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_cgc.h b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_cgc.h index 7732241d2..be05a6453 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_cgc.h +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_cgc.h @@ -21,9 +21,9 @@ * File Name : r_cg_cgc.h * Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015] * Device(s) : R5F52318AxFP -* Tool-Chain : GCCRX +* Tool-Chain : CCRX * Description : This file implements device driver for CGC module. -* Creation Date: 23/09/2015 +* Creation Date: 2015/08/17 ***********************************************************************************************************************/ #ifndef CGC_H #define CGC_H @@ -212,6 +212,8 @@ Macro definitions (Register bit) /*********************************************************************************************************************** Macro definitions ***********************************************************************************************************************/ +#define _007B_CGC_SUBSTPWT_WAIT (0x007BU) /* Wait time for 5 sub clock cycles */ +#define _00061A81_CGC_SUBOSCWT_WAIT (0x00061A81U) /* Wait time for sub clock stable */ /*********************************************************************************************************************** Typedef definitions diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_cgc_user.c b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_cgc_user.c index 611001e2a..58780c931 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_cgc_user.c +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_cgc_user.c @@ -21,9 +21,9 @@ * File Name : r_cg_cgc_user.c * Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015] * Device(s) : R5F52318AxFP -* Tool-Chain : GCCRX +* Tool-Chain : CCRX * Description : This file implements device driver for CGC module. -* Creation Date: 23/09/2015 +* Creation Date: 2015/08/17 ***********************************************************************************************************************/ /*********************************************************************************************************************** diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_hardware_setup.c b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_hardware_setup.c index f1bd64fd1..b8d79ab49 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_hardware_setup.c +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_hardware_setup.c @@ -37,6 +37,9 @@ Includes ***********************************************************************************************************************/ #include "r_cg_macrodriver.h" #include "r_cg_cgc.h" +#include "r_cg_icu.h" +#include "r_cg_port.h" + /* Start user code for include. Do not edit comment generated here */ /* End user code. Do not edit comment generated here */ #include "r_cg_userdefine.h" @@ -67,6 +70,8 @@ void R_Systeminit(void) /* Set peripheral settings */ R_CGC_Create(); + R_ICU_Create(); + R_PORT_Create(); /* Disable writing to MPC pin function control registers */ MPC.PWPR.BIT.PFSWE = 0U; diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_icu.c b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_icu.c new file mode 100644 index 000000000..e4d5e68f5 --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_icu.c @@ -0,0 +1,203 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_icu.c +* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015] +* Device(s) : R5F52318AxFP +* Tool-Chain : CCRX +* Description : This file implements device driver for ICU module. +* Creation Date: 2015/08/17 +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Pragma directive +***********************************************************************************************************************/ +/* Start user code for pragma. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +Includes +***********************************************************************************************************************/ +#include "r_cg_macrodriver.h" +#include "r_cg_icu.h" +/* Start user code for include. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#include "r_cg_userdefine.h" + +/*********************************************************************************************************************** +Global variables and functions +***********************************************************************************************************************/ +/* Start user code for global. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +* Function Name: R_ICU_Create +* Description : This function initializes ICU module. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_ICU_Create(void) +{ + /* Disable IRQ0~7 interrupts */ + ICU.IER[0x08].BYTE = _00_ICU_IRQ0_DISABLE | _00_ICU_IRQ1_DISABLE | _00_ICU_IRQ2_DISABLE | _00_ICU_IRQ3_DISABLE | + _00_ICU_IRQ4_DISABLE | _00_ICU_IRQ5_DISABLE | _00_ICU_IRQ6_DISABLE | _00_ICU_IRQ7_DISABLE; + + /* Set IRQ settings */ + ICU.IRQCR[1].BYTE = _04_ICU_IRQ_EDGE_FALLING; + ICU.IRQCR[4].BYTE = _04_ICU_IRQ_EDGE_FALLING; + + /* Set IRQ1 priority level */ + IPR(ICU,IRQ1) = _0F_ICU_PRIORITY_LEVEL15; + + /* Set IRQ4 priority level */ + IPR(ICU,IRQ4) = _0F_ICU_PRIORITY_LEVEL15; + + /* Set IRQ1 pin */ + MPC.P31PFS.BYTE = 0x40U; + PORT3.PDR.BYTE &= 0xFDU; + PORT3.PMR.BYTE &= 0xFDU; + + /* Set IRQ4 pin */ + MPC.P34PFS.BYTE = 0x40U; + PORT3.PDR.BYTE &= 0xEFU; + PORT3.PMR.BYTE &= 0xEFU; +} +/*********************************************************************************************************************** +* Function Name: R_ICU_IRQ1_Start +* Description : This function enables IRQ1 interrupt. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_ICU_IRQ1_Start(void) +{ + /* Enable IRQ1 interrupt */ + IEN(ICU,IRQ1) = 1U; +} +/*********************************************************************************************************************** +* Function Name: R_ICU_IRQ1_Stop +* Description : This function disables IRQ1 interrupt. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_ICU_IRQ1_Stop(void) +{ + /* Disable IRQ1 interrupt */ + IEN(ICU,IRQ1) = 0U; +} +/*********************************************************************************************************************** +* Function Name: R_ICU_IRQ4_Start +* Description : This function enables IRQ4 interrupt. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_ICU_IRQ4_Start(void) +{ + /* Enable IRQ4 interrupt */ + IEN(ICU,IRQ4) = 1U; +} +/*********************************************************************************************************************** +* Function Name: R_ICU_IRQ4_Stop +* Description : This function disables IRQ4 interrupt. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_ICU_IRQ4_Stop(void) +{ + /* Disable IRQ4 interrupt */ + IEN(ICU,IRQ4) = 0U; +} + +/* Start user code for adding. Do not edit comment generated here */ + +/******************************************************************************* +* Function Name: R_ICU_IRQIsFallingEdge +* Description : This function returns 1 if the specified ICU_IRQ is set to +* falling edge triggered, otherwise 0. +* Arguments : uint8_t irq_no +* Return Value : 1 if falling edge triggered, 0 if not +*******************************************************************************/ +uint8_t R_ICU_IRQIsFallingEdge (const uint8_t irq_no) +{ + uint8_t falling_edge_trig = 0x0; + + if (ICU.IRQCR[irq_no].BYTE & _04_ICU_IRQ_EDGE_FALLING) + { + falling_edge_trig = 1; + } + + return falling_edge_trig; + +} + +/******************************************************************************* +* End of function R_ICU_IRQIsFallingEdge +*******************************************************************************/ + +/******************************************************************************* +* Function Name: R_ICU_IRQSetFallingEdge +* Description : This function sets/clears the falling edge trigger for the +* specified ICU_IRQ. +* Arguments : uint8_t irq_no +* uint8_t set_f_edge, 1 if setting falling edge triggered, 0 if +* clearing +* Return Value : None +*******************************************************************************/ +void R_ICU_IRQSetFallingEdge (const uint8_t irq_no, const uint8_t set_f_edge) +{ + if (1 == set_f_edge) + { + ICU.IRQCR[irq_no].BYTE |= _04_ICU_IRQ_EDGE_FALLING; + } + else + { + ICU.IRQCR[irq_no].BYTE &= (uint8_t) ~_04_ICU_IRQ_EDGE_FALLING; + } +} + +/****************************************************************************** +* End of function R_ICU_IRQSetFallingEdge +*******************************************************************************/ + +/******************************************************************************* +* Function Name: R_ICU_IRQSetRisingEdge +* Description : This function sets/clear the rising edge trigger for the +* specified ICU_IRQ. +* Arguments : uint8_t irq_no +* uint8_t set_r_edge, 1 if setting rising edge triggered, 0 if +* clearing +* Return Value : None +*******************************************************************************/ +void R_ICU_IRQSetRisingEdge (const uint8_t irq_no, const uint8_t set_r_edge) +{ + if (1 == set_r_edge) + { + ICU.IRQCR[irq_no].BYTE |= _08_ICU_IRQ_EDGE_RISING; + } + else + { + ICU.IRQCR[irq_no].BYTE &= (uint8_t) ~_08_ICU_IRQ_EDGE_RISING; + } +} + +/****************************************************************************** +* End of function R_ICU_IRQSetRisingEdge +*******************************************************************************/ + +/* End user code. Do not edit comment generated here */ diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_icu.h b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_icu.h new file mode 100644 index 000000000..268b62eb1 --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_icu.h @@ -0,0 +1,185 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_icu.h +* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015] +* Device(s) : R5F52318AxFP +* Tool-Chain : CCRX +* Description : This file implements device driver for ICU module. +* Creation Date: 2015/08/17 +***********************************************************************************************************************/ +#ifndef ICU_H +#define ICU_H + +/*********************************************************************************************************************** +Macro definitions (Register bit) +***********************************************************************************************************************/ +/* + Interrupt Request Enable Register 08 (IER08) +*/ +/*Interrupt Request Enable/Disable(IENn) */ +#define _00_ICU_IRQ0_DISABLE (0x00U) /* IRQ0 interrupt request is disabled */ +#define _01_ICU_IRQ0_ENABLE (0x01U) /* IRQ0 interrupt request is enabled */ +#define _00_ICU_IRQ1_DISABLE (0x00U) /* IRQ1 interrupt request is disabled */ +#define _02_ICU_IRQ1_ENABLE (0x02U) /* IRQ1 interrupt request is enabled */ +#define _00_ICU_IRQ2_DISABLE (0x00U) /* IRQ2 interrupt request is disabled */ +#define _04_ICU_IRQ2_ENABLE (0x04U) /* IRQ2 interrupt request is enabled */ +#define _00_ICU_IRQ3_DISABLE (0x00U) /* IRQ3 interrupt request is disabled */ +#define _08_ICU_IRQ3_ENABLE (0x08U) /* IRQ3 interrupt request is enabled */ +#define _00_ICU_IRQ4_DISABLE (0x00U) /* IRQ4 interrupt request is disabled */ +#define _10_ICU_IRQ4_ENABLE (0x10U) /* IRQ4 interrupt request is enabled */ +#define _00_ICU_IRQ5_DISABLE (0x00U) /* IRQ5 interrupt request is disabled */ +#define _20_ICU_IRQ5_ENABLE (0x20U) /* IRQ5 interrupt request is enabled */ +#define _00_ICU_IRQ6_DISABLE (0x00U) /* IRQ6 interrupt request is disabled */ +#define _40_ICU_IRQ6_ENABLE (0x40U) /* IRQ6 interrupt request is enabled */ +#define _00_ICU_IRQ7_DISABLE (0x00U) /* IRQ7 interrupt request is disabled */ +#define _80_ICU_IRQ7_ENABLE (0x80U) /* IRQ7 interrupt request is enabled */ + +/* + Interrupt Source Priority Register n (IPRn) +*/ +/* Interrupt Priority Level Select (IPR[3:0]) */ +#define _00_ICU_PRIORITY_LEVEL0 (0x00U) /* Level 0 (interrupt disabled) */ +#define _01_ICU_PRIORITY_LEVEL1 (0x01U) /* Level 1 */ +#define _02_ICU_PRIORITY_LEVEL2 (0x02U) /* Level 2 */ +#define _03_ICU_PRIORITY_LEVEL3 (0x03U) /* Level 3 */ +#define _04_ICU_PRIORITY_LEVEL4 (0x04U) /* Level 4 */ +#define _05_ICU_PRIORITY_LEVEL5 (0x05U) /* Level 5 */ +#define _06_ICU_PRIORITY_LEVEL6 (0x06U) /* Level 6 */ +#define _07_ICU_PRIORITY_LEVEL7 (0x07U) /* Level 7 */ +#define _08_ICU_PRIORITY_LEVEL8 (0x08U) /* Level 8 */ +#define _09_ICU_PRIORITY_LEVEL9 (0x09U) /* Level 9 */ +#define _0A_ICU_PRIORITY_LEVEL10 (0x0AU) /* Level 10 */ +#define _0B_ICU_PRIORITY_LEVEL11 (0x0BU) /* Level 11 */ +#define _0C_ICU_PRIORITY_LEVEL12 (0x0CU) /* Level 12 */ +#define _0D_ICU_PRIORITY_LEVEL13 (0x0DU) /* Level 13 */ +#define _0E_ICU_PRIORITY_LEVEL14 (0x0EU) /* Level 14 */ +#define _0F_ICU_PRIORITY_LEVEL15 (0x0FU) /* Level 15 (highest) */ + +/* + Fast Interrupt Set Register (FIR) +*/ +/* Fast Interrupt Enable (FIEN) */ +#define _0000_ICU_FAST_INTERRUPT_DISABLE (0x0000U) /* Fast interrupt is disabled */ +#define _8000_ICU_FAST_INTERRUPT_ENABLE (0x8000U) /* Fast interrupt is enabled */ + +/* + IRQ Control Register i (IRQCRi) (i = 0 to 7) +*/ +/* IRQ Detection Sense Select (IRQMD[1:0]) */ +#define _00_ICU_IRQ_EDGE_LOW_LEVEL (0x00U) /* Low level */ +#define _04_ICU_IRQ_EDGE_FALLING (0x04U) /* Falling edge */ +#define _08_ICU_IRQ_EDGE_RISING (0x08U) /* Rising edge */ +#define _0C_ICU_IRQ_EDGE_BOTH (0x0CU) /* Rising and falling edge */ + +/* + IRQ Pin Digital Filter Enable Register 0 (IRQFLTE0) +*/ +/* Digital Filter Enable (FLTEN0n) */ +#define _00_ICU_IRQn_FILTER_DISABLE (0x00U) /* IRQn digital filter is disabled */ +#define _01_ICU_IRQ0_FILTER_ENABLE (0x01U) /* IRQ0 digital filter is enabled */ +#define _02_ICU_IRQ1_FILTER_ENABLE (0x02U) /* IRQ1 digital filter is enabled */ +#define _04_ICU_IRQ2_FILTER_ENABLE (0x04U) /* IRQ2 digital filter is enabled */ +#define _08_ICU_IRQ3_FILTER_ENABLE (0x08U) /* IRQ3 digital filter is enabled */ +#define _10_ICU_IRQ4_FILTER_ENABLE (0x10U) /* IRQ4 digital filter is enabled */ +#define _20_ICU_IRQ5_FILTER_ENABLE (0x20U) /* IRQ5 digital filter is enabled */ +#define _40_ICU_IRQ6_FILTER_ENABLE (0x40U) /* IRQ6 digital filter is enabled */ +#define _80_ICU_IRQ7_FILTER_ENABLE (0x80U) /* IRQ7 digital filter is enabled */ + +/* + IRQ Pin Digital Filter Setting Register 0 (IRQFLTC0) +*/ +/* IRQn Digital Filter Sampling Clock (FCLKSELn) */ +#define _0000_ICU_IRQ0_FILTER_PCLK (0x0000U) /* IRQ0 sample clock is run at every PCLK cycle */ +#define _0001_ICU_IRQ0_FILTER_PCLK_8 (0x0001U) /* IRQ0 sample clock is run at every PCLK/8 cycle */ +#define _0002_ICU_IRQ0_FILTER_PCLK_32 (0x0002U) /* IRQ0 sample clock is run at every PCLK/32 cycle */ +#define _0003_ICU_IRQ0_FILTER_PCLK_64 (0x0003U) /* IRQ0 sample clock is run at every PCLK/64 cycle */ +#define _0000_ICU_IRQ1_FILTER_PCLK (0x0000U) /* IRQ1 sample clock is run at every PCLK cycle */ +#define _0004_ICU_IRQ1_FILTER_PCLK_8 (0x0004U) /* IRQ1 sample clock is run at every PCLK/8 cycle */ +#define _0008_ICU_IRQ1_FILTER_PCLK_32 (0x0008U) /* IRQ1 sample clock is run at every PCLK/32 cycle */ +#define _000C_ICU_IRQ1_FILTER_PCLK_64 (0x000CU) /* IRQ1 sample clock is run at every PCLK/64 cycle */ +#define _0000_ICU_IRQ2_FILTER_PCLK (0x0000U) /* IRQ2 sample clock is run at every PCLK cycle */ +#define _0010_ICU_IRQ2_FILTER_PCLK_8 (0x0010U) /* IRQ2 sample clock is run at every PCLK/8 cycle */ +#define _0020_ICU_IRQ2_FILTER_PCLK_32 (0x0020U) /* IRQ2 sample clock is run at every PCLK/32 cycle */ +#define _0030_ICU_IRQ2_FILTER_PCLK_64 (0x0030U) /* IRQ2 sample clock is run at every PCLK/64 cycle */ +#define _0000_ICU_IRQ3_FILTER_PCLK (0x0000U) /* IRQ3 sample clock is run at every PCLK cycle */ +#define _0040_ICU_IRQ3_FILTER_PCLK_8 (0x0040U) /* IRQ3 sample clock is run at every PCLK/8 cycle */ +#define _0080_ICU_IRQ3_FILTER_PCLK_32 (0x0080U) /* IRQ3 sample clock is run at every PCLK/32 cycle */ +#define _00C0_ICU_IRQ3_FILTER_PCLK_64 (0x00C0U) /* IRQ3 sample clock is run at every PCLK/64 cycle */ +#define _0000_ICU_IRQ4_FILTER_PCLK (0x0000U) /* IRQ4 sample clock is run at every PCLK cycle */ +#define _0100_ICU_IRQ4_FILTER_PCLK_8 (0x0100U) /* IRQ4 sample clock is run at every PCLK/8 cycle */ +#define _0200_ICU_IRQ4_FILTER_PCLK_32 (0x0200U) /* IRQ4 sample clock is run at every PCLK/32 cycle */ +#define _0300_ICU_IRQ4_FILTER_PCLK_64 (0x0300U) /* IRQ4 sample clock is run at every PCLK/64 cycle */ +#define _0000_ICU_IRQ5_FILTER_PCLK (0x0000U) /* IRQ5 sample clock is run at every PCLK cycle */ +#define _0400_ICU_IRQ5_FILTER_PCLK_8 (0x0400U) /* IRQ5 sample clock is run at every PCLK/8 cycle */ +#define _0800_ICU_IRQ5_FILTER_PCLK_32 (0x0800U) /* IRQ5 sample clock is run at every PCLK/32 cycle */ +#define _0C00_ICU_IRQ5_FILTER_PCLK_64 (0x0C00U) /* IRQ5 sample clock is run at every PCLK/64 cycle */ +#define _0000_ICU_IRQ6_FILTER_PCLK (0x0000U) /* IRQ6 sample clock is run at every PCLK cycle */ +#define _1000_ICU_IRQ6_FILTER_PCLK_8 (0x1000U) /* IRQ6 sample clock is run at every PCLK/8 cycle */ +#define _2000_ICU_IRQ6_FILTER_PCLK_32 (0x2000U) /* IRQ6 sample clock is run at every PCLK/32 cycle */ +#define _3000_ICU_IRQ6_FILTER_PCLK_64 (0x3000U) /* IRQ6 sample clock is run at every PCLK/64 cycle */ +#define _0000_ICU_IRQ7_FILTER_PCLK (0x0000U) /* IRQ7 sample clock is run at every PCLK cycle */ +#define _4000_ICU_IRQ7_FILTER_PCLK_8 (0x4000U) /* IRQ7 sample clock is run at every PCLK/8 cycle */ +#define _8000_ICU_IRQ7_FILTER_PCLK_32 (0x8000U) /* IRQ7 sample clock is run at every PCLK/32 cycle */ +#define _C000_ICU_IRQ7_FILTER_PCLK_64 (0xC000U) /* IRQ7 sample clock is run at every PCLK/64 cycle */ + +/* + NMI Pin Interrupt Control Register (NMICR) +*/ +/* NMI Digital Filter Sampling Clock (NMIMD) */ +#define _00_ICU_NMI_EDGE_FALLING (0x00U) /* Falling edge */ +#define _08_ICU_NMI_EDGE_RISING (0x08U) /* Rising edge */ + +/* + NMI Pin Digital Filter Setting Register (NMIFLTC) +*/ +/* NMI Digital Filter Sampling Clock (NFCLKSEL[1:0]) */ +#define _00_ICU_NMI_FILTER_PCLK (0x00U) /* NMI sample clock is run at every PCLK cycle */ +#define _01_ICU_NMI_FILTER_PCLK_8 (0x01U) /* NMI sample clock is run at every PCLK/8 cycle */ +#define _02_ICU_NMI_FILTER_PCLK_32 (0x02U) /* NMI sample clock is run at every PCLK/32 cycle */ +#define _03_ICU_NMI_FILTER_PCLK_64 (0x03U) /* NMI sample clock is run at every PCLK/64 cycle */ + + +/*********************************************************************************************************************** +Macro definitions +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Typedef definitions +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Global functions +***********************************************************************************************************************/ +void R_ICU_Create(void); +void R_ICU_IRQ1_Start(void); +void R_ICU_IRQ1_Stop(void); +void R_ICU_IRQ4_Start(void); +void R_ICU_IRQ4_Stop(void); + +/* Start user code for function. Do not edit comment generated here */ + +/* Function prototypes for detecting and setting the edge trigger of ICU_IRQ */ +uint8_t R_ICU_IRQIsFallingEdge(const uint8_t irq_no); +void R_ICU_IRQSetFallingEdge(const uint8_t irq_no, const uint8_t set_f_edge); +void R_ICU_IRQSetRisingEdge(const uint8_t irq_no, const uint8_t set_r_edge); + +/* End user code. Do not edit comment generated here */ +#endif \ No newline at end of file diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_port.c b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_port.c new file mode 100644 index 000000000..e284f6baf --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_port.c @@ -0,0 +1,69 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_port.c +* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015] +* Device(s) : R5F52318AxFP +* Tool-Chain : CCRX +* Description : This file implements device driver for Port module. +* Creation Date: 2015/08/17 +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Pragma directive +***********************************************************************************************************************/ +/* Start user code for pragma. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +Includes +***********************************************************************************************************************/ +#include "r_cg_macrodriver.h" +#include "r_cg_port.h" +/* Start user code for include. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#include "r_cg_userdefine.h" + +/*********************************************************************************************************************** +Global variables and functions +***********************************************************************************************************************/ +/* Start user code for global. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +* Function Name: R_PORT_Create +* Description : This function initializes the Port I/O. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_PORT_Create(void) +{ + PORT1.PODR.BYTE = _80_Pm7_OUTPUT_1; + PORT3.PODR.BYTE = _08_Pm3_OUTPUT_1; + PORT5.PODR.BYTE = _01_Pm0_OUTPUT_1 | _02_Pm1_OUTPUT_1 | _04_Pm2_OUTPUT_1; + PORTE.PODR.BYTE = _08_Pm3_OUTPUT_1 | _80_Pm7_OUTPUT_1; + PORT1.PDR.BYTE = _80_Pm7_MODE_OUTPUT; + PORT3.PDR.BYTE = _08_Pm3_MODE_OUTPUT; + PORT5.PDR.BYTE = _01_Pm0_MODE_OUTPUT | _02_Pm1_MODE_OUTPUT | _04_Pm2_MODE_OUTPUT; + PORTE.PDR.BYTE = _08_Pm3_MODE_OUTPUT | _10_Pm4_MODE_OUTPUT | _80_Pm7_MODE_OUTPUT; +} + +/* Start user code for adding. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_port.h b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_port.h new file mode 100644 index 000000000..acf2cb591 --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_port.h @@ -0,0 +1,170 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_port.h +* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015] +* Device(s) : R5F52318AxFP +* Tool-Chain : CCRX +* Description : This file implements device driver for Port module. +* Creation Date: 2015/08/17 +***********************************************************************************************************************/ +#ifndef PORT_H +#define PORT_H + +/*********************************************************************************************************************** +Macro definitions (Register bit) +***********************************************************************************************************************/ +/* + Port Direction Register (PDR) +*/ +/* Pmn Direction Control (B7 - B0) */ +#define _00_Pm0_MODE_NOT_USED (0x00U) /* Pm0 not used */ +#define _00_Pm0_MODE_INPUT (0x00U) /* Pm0 as input */ +#define _01_Pm0_MODE_OUTPUT (0x01U) /* Pm0 as output */ +#define _00_Pm1_MODE_NOT_USED (0x00U) /* Pm1 not used */ +#define _00_Pm1_MODE_INPUT (0x00U) /* Pm1 as input */ +#define _02_Pm1_MODE_OUTPUT (0x02U) /* Pm1 as output */ +#define _00_Pm2_MODE_NOT_USED (0x00U) /* Pm2 not used */ +#define _00_Pm2_MODE_INPUT (0x00U) /* Pm2 as input */ +#define _04_Pm2_MODE_OUTPUT (0x04U) /* Pm2 as output */ +#define _00_Pm3_MODE_NOT_USED (0x00U) /* Pm3 not used */ +#define _00_Pm3_MODE_INPUT (0x00U) /* Pm3 as input */ +#define _08_Pm3_MODE_OUTPUT (0x08U) /* Pm3 as output */ +#define _00_Pm4_MODE_NOT_USED (0x00U) /* Pm4 not used */ +#define _00_Pm4_MODE_INPUT (0x00U) /* Pm4 as input */ +#define _10_Pm4_MODE_OUTPUT (0x10U) /* Pm4 as output */ +#define _00_Pm5_MODE_NOT_USED (0x00U) /* Pm5 not used */ +#define _00_Pm5_MODE_INPUT (0x00U) /* Pm5 as input */ +#define _20_Pm5_MODE_OUTPUT (0x20U) /* Pm5 as output */ +#define _00_Pm6_MODE_NOT_USED (0x00U) /* Pm6 not used */ +#define _00_Pm6_MODE_INPUT (0x00U) /* Pm6 as input */ +#define _40_Pm6_MODE_OUTPUT (0x40U) /* Pm6 as output */ +#define _00_Pm7_MODE_NOT_USED (0x00U) /* Pm7 not used */ +#define _00_Pm7_MODE_INPUT (0x00U) /* Pm7 as input */ +#define _80_Pm7_MODE_OUTPUT (0x80U) /* Pm7 as output */ + +/* + Port Output Data Register (PODR) +*/ +/* Pmn Output Data Store (B7 - B0) */ +#define _00_Pm0_OUTPUT_0 (0x00U) /* output low at B0 */ +#define _01_Pm0_OUTPUT_1 (0x01U) /* output high at B0 */ +#define _00_Pm1_OUTPUT_0 (0x00U) /* output low at B1 */ +#define _02_Pm1_OUTPUT_1 (0x02U) /* output high at B1 */ +#define _00_Pm2_OUTPUT_0 (0x00U) /* output low at B2 */ +#define _04_Pm2_OUTPUT_1 (0x04U) /* output high at B2 */ +#define _00_Pm3_OUTPUT_0 (0x00U) /* output low at B3 */ +#define _08_Pm3_OUTPUT_1 (0x08U) /* output high at B3 */ +#define _00_Pm4_OUTPUT_0 (0x00U) /* output low at B4 */ +#define _10_Pm4_OUTPUT_1 (0x10U) /* output high at B4 */ +#define _00_Pm5_OUTPUT_0 (0x00U) /* output low at B5 */ +#define _20_Pm5_OUTPUT_1 (0x20U) /* output high at B5 */ +#define _00_Pm6_OUTPUT_0 (0x00U) /* output low at B6 */ +#define _40_Pm6_OUTPUT_1 (0x40U) /* output high at B6 */ +#define _00_Pm7_OUTPUT_0 (0x00U) /* output low at B7 */ +#define _80_Pm7_OUTPUT_1 (0x80U) /* output high at B7 */ + +/* + Open Drain Control Register 0 (ODR0) +*/ +/* Pmn Output Type Select (Pm0 to Pm3) */ +#define _00_Pm0_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _01_Pm0_NCH_OPEN_DRAIN (0x01U) /* N-channel open-drain output */ +#define _00_Pm1_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _04_Pm1_NCH_OPEN_DRAIN (0x04U) /* N-channel open-drain output */ +#define _08_Pm1_PCH_OPEN_DRAIN (0x08U) /* PMOS open-drain output, for PE1 only*/ +#define _00_Pm2_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _10_Pm2_NCH_OPEN_DRAIN (0x10U) /* N-channel open-drain output */ +#define _00_Pm3_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _40_Pm3_NCH_OPEN_DRAIN (0x40U) /* N-channel open-drain output */ + +/* + Open Drain Control Register 1 (ODR1) +*/ +/* Pmn Output Type Select (Pm4 to Pm7) */ +#define _00_Pm4_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _01_Pm4_NCH_OPEN_DRAIN (0x01U) /* N-channel open-drain output */ +#define _00_Pm5_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _04_Pm5_NCH_OPEN_DRAIN (0x04U) /* N-channel open-drain output */ +#define _00_Pm6_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _10_Pm6_NCH_OPEN_DRAIN (0x10U) /* N-channel open-drain output */ +#define _00_Pm7_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _40_Pm7_NCH_OPEN_DRAIN (0x40U) /* N-channel open-drain output */ + +/* + Pull-Up Control Register (PCR) +*/ +/* Pmn Input Pull-Up Resistor Control (B7 - B0) */ +#define _00_Pm0_PULLUP_OFF (0x00U) /* Pm0 pull-up resistor not connected */ +#define _01_Pm0_PULLUP_ON (0x01U) /* Pm0 pull-up resistor connected */ +#define _00_Pm1_PULLUP_OFF (0x00U) /* Pm1 pull-up resistor not connected */ +#define _02_Pm1_PULLUP_ON (0x02U) /* Pm1 pull-up resistor connected */ +#define _00_Pm2_PULLUP_OFF (0x00U) /* Pm2 Pull-up resistor not connected */ +#define _04_Pm2_PULLUP_ON (0x04U) /* Pm2 pull-up resistor connected */ +#define _00_Pm3_PULLUP_OFF (0x00U) /* Pm3 pull-up resistor not connected */ +#define _08_Pm3_PULLUP_ON (0x08U) /* Pm3 pull-up resistor connected */ +#define _00_Pm4_PULLUP_OFF (0x00U) /* Pm4 pull-up resistor not connected */ +#define _10_Pm4_PULLUP_ON (0x10U) /* Pm4 pull-up resistor connected */ +#define _00_Pm5_PULLUP_OFF (0x00U) /* Pm5 pull-up resistor not connected */ +#define _20_Pm5_PULLUP_ON (0x20U) /* Pm5 pull-up resistor connected */ +#define _00_Pm6_PULLUP_OFF (0x00U) /* Pm6 pull-up resistor not connected */ +#define _40_Pm6_PULLUP_ON (0x40U) /* Pm6 pull-up resistor connected */ +#define _00_Pm7_PULLUP_OFF (0x00U) /* Pm7 pull-up resistor not connected */ +#define _80_Pm7_PULLUP_ON (0x80U) /* Pm7 pull-up resistor connected */ + +/* + Drive Capacity Control Register (DSCR) +*/ +/* Pmn Drive Capacity Control (B7 - B0) */ +#define _00_Pm0_HIDRV_OFF (0x00U) /* Pm0 Normal drive output */ +#define _01_Pm0_HIDRV_ON (0x01U) /* Pm0 High-drive output */ +#define _00_Pm1_HIDRV_OFF (0x00U) /* Pm1 Normal drive output */ +#define _02_Pm1_HIDRV_ON (0x02U) /* Pm1 High-drive output */ +#define _00_Pm2_HIDRV_OFF (0x00U) /* Pm2 Normal drive output */ +#define _04_Pm2_HIDRV_ON (0x04U) /* Pm2 High-drive output */ +#define _00_Pm3_HIDRV_OFF (0x00U) /* Pm3 Normal drive output */ +#define _08_Pm3_HIDRV_ON (0x08U) /* Pm3 High-drive output */ +#define _00_Pm4_HIDRV_OFF (0x00U) /* Pm4 Normal drive output */ +#define _10_Pm4_HIDRV_ON (0x10U) /* Pm4 High-drive output */ +#define _00_Pm5_HIDRV_OFF (0x00U) /* Pm5 Normal drive output */ +#define _20_Pm5_HIDRV_ON (0x20U) /* Pm5 High-drive output */ +#define _00_Pm6_HIDRV_OFF (0x00U) /* Pm6 Normal drive output */ +#define _40_Pm6_HIDRV_ON (0x40U) /* Pm6 High-drive output */ +#define _00_Pm7_HIDRV_OFF (0x00U) /* Pm7 Normal drive output */ +#define _80_Pm7_HIDRV_ON (0x80U) /* Pm7 High-drive output */ + + +/*********************************************************************************************************************** +Macro definitions +***********************************************************************************************************************/ + + +/*********************************************************************************************************************** +Typedef definitions +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Global functions +***********************************************************************************************************************/ +void R_PORT_Create(void); + +/* Start user code for function. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#endif \ No newline at end of file diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_userdefine.h b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_userdefine.h index 02e722de2..46d6d5e98 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_userdefine.h +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/cg_src/r_cg_userdefine.h @@ -21,9 +21,9 @@ * File Name : r_cg_userdefine.h * Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015] * Device(s) : R5F52318AxFP -* Tool-Chain : GCCRX +* Tool-Chain : CCRX * Description : This file includes user definition. -* Creation Date: 23/09/2015 +* Creation Date: 2015/08/17 ***********************************************************************************************************************/ #ifndef _USER_DEF_H #define _USER_DEF_H @@ -31,7 +31,14 @@ /*********************************************************************************************************************** User definitions ***********************************************************************************************************************/ +#define FAST_INTERRUPT_VECTOR 0 /* Start user code for function. Do not edit comment generated here */ + +#define TRUE (1) +#define FALSE (0) + +extern volatile uint8_t g_adc_trigger; + /* End user code. Do not edit comment generated here */ #endif \ No newline at end of file diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/rskrx231def.h b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/rskrx231def.h new file mode 100644 index 000000000..d7b568eee --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/rskrx231def.h @@ -0,0 +1,71 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No +* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM +* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES +* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS +* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of +* this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ +/*********************************************************************************************************************** +* File Name : rskrx231def.h +* Device(s) : R5F52318AxFP +* Tool-Chain : CCRX +* H/W Platform : RSKRX231 +* Description : Defines macros relating to the RSKRX231 user LEDs and switches +***********************************************************************************************************************/ +/********************************************************************************************************************** +* History : DD.MM.YYYY Version Description +* : 01.06.2015 1.00 First Release +***********************************************************************************************************************/ + + +/*********************************************************************************************************************** +Macro definitions +***********************************************************************************************************************/ +#ifndef RSKRX231_H +#define RSKRX231_H + + +/* General Values */ +#define LED_ON (0) +#define LED_OFF (1) +#define SET_BIT_HIGH (1) +#define SET_BIT_LOW (0) +#define SET_BYTE_HIGH (0xFF) +#define SET_BYTE_LOW (0x00) + +/* Switches */ +#define SW1 (PORT3.PIDR.BIT.B1) +#define SW2 (PORT3.PIDR.BIT.B4) +#define SW3 (PORT0.PIDR.BIT.B7) + +/* LED port settings */ +#define LED0 (PORT1.PODR.BIT.B7) +#define LED1 (PORT5.PODR.BIT.B0) +#define LED2 (PORT5.PODR.BIT.B1) +#define LED3 (PORT5.PODR.BIT.B2) + +/*********************************************************************************************************************** +Typedef definitions +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Exported global variables +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Exported global functions (to be accessed by other files) +***********************************************************************************************************************/ + +#endif + diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c index 0a919d156..39c267b98 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c +++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c @@ -109,6 +109,9 @@ #include "task.h" #include "semphr.h" +/* Renesas includes. */ +#include "rskrx231def.h" + /* Priorities at which the tasks are created. */ #define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) #define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) @@ -221,7 +224,7 @@ const unsigned long ulExpectedValue = 100UL; is it the expected value? If it is, toggle the LED. */ if( ulReceivedValue == ulExpectedValue ) { -//_RB_ LED0 = !LED0; + LED0 = !LED0; ulReceivedValue = 0U; } } diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/FreeRTOSConfig.h b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/FreeRTOSConfig.h index ff23b62c2..1e516142f 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/FreeRTOSConfig.h +++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/FreeRTOSConfig.h @@ -88,8 +88,8 @@ #define configUSE_PREEMPTION 1 #define configUSE_IDLE_HOOK 1 #define configUSE_TICK_HOOK 1 -#define configCPU_CLOCK_HZ ( 52000000UL ) /*_RB_ guess*/ -#define configPERIPHERAL_CLOCK_HZ ( 26000000UL ) /*_RB_ guess*/ +#define configCPU_CLOCK_HZ ( 52000000UL ) +#define configPERIPHERAL_CLOCK_HZ ( 26000000UL ) #define configTICK_RATE_HZ ( ( TickType_t ) 1000 ) #define configMINIMAL_STACK_SIZE ( ( unsigned short ) 140 ) #define configTOTAL_HEAP_SIZE ( ( size_t ) ( 40 * 1024 ) ) diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/main_full.c b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/main_full.c index 4df406c7f..3a879d48e 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/main_full.c +++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/main_full.c @@ -137,6 +137,9 @@ #include "TaskNotify.h" #include "IntSemTest.h" +/* Renesas includes. */ +#include "rskrx231def.h" + /* Priorities for the demo application tasks. */ #define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL ) #define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL ) @@ -390,7 +393,7 @@ unsigned long ulErrorFound = pdFALSE; /* Toggle the check LED to give an indication of the system status. If the LED toggles every mainNO_ERROR_CHECK_TASK_PERIOD milliseconds then everything is ok. A faster toggle indicates an error. */ -//_RB_ LED0 = !LED0; + LED0 = !LED0; if( ulErrorFound != pdFALSE ) { diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_cgc.c b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_cgc.c index 7a23f21fe..2e065eb1b 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_cgc.c +++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_cgc.c @@ -23,7 +23,7 @@ * Device(s) : R5F52318AxFP * Tool-Chain : CCRX * Description : This file implements device driver for CGC module. -* Creation Date: 23/09/2015 +* Creation Date: 2015/08/17 ***********************************************************************************************************************/ /*********************************************************************************************************************** @@ -56,11 +56,12 @@ Global variables and functions void R_CGC_Create(void) { uint32_t sckcr_dummy; + uint32_t w_count; volatile uint32_t memorywaitcycle; /* Set main clock control registers */ SYSTEM.MOFCR.BYTE = _00_CGC_MAINOSC_RESONATOR | _00_CGC_MAINOSC_UNDER10M; - SYSTEM.MOSCWTCR.BYTE = _06_CGC_OSC_WAIT_CYCLE_32768; + SYSTEM.MOSCWTCR.BYTE = _04_CGC_OSC_WAIT_CYCLE_8192; /* Set main clock operation */ SYSTEM.MOSCCR.BIT.MOSTP = 0U; @@ -69,31 +70,55 @@ void R_CGC_Create(void) while (1U != SYSTEM.OSCOVFSR.BIT.MOOVF); /* Set system clock */ - sckcr_dummy = _00000000_CGC_PCLKD_DIV_1 | _00000100_CGC_PCLKB_DIV_2 | _00001000_CGC_PCLKA_DIV_2 | + sckcr_dummy = _00000000_CGC_PCLKD_DIV_1 | _00000100_CGC_PCLKB_DIV_2 | _00000000_CGC_PCLKA_DIV_1 | _00010000_CGC_BCLK_DIV_2 | _00000000_CGC_ICLK_DIV_1 | _10000000_CGC_FCLK_DIV_2; SYSTEM.SCKCR.LONG = sckcr_dummy; while (SYSTEM.SCKCR.LONG != sckcr_dummy); /* Set PLL circuit */ - SYSTEM.PLLCR.WORD = _0000_CGC_PLL_FREQ_DIV_1 | _0C00_CGC_PLL_FREQ_MUL_6_5; + SYSTEM.PLLCR.WORD = _0001_CGC_PLL_FREQ_DIV_2 | _1A00_CGC_PLL_FREQ_MUL_13_5; SYSTEM.PLLCR2.BIT.PLLEN = 0U; /* Wait for PLL wait counter overflow */ while (1U != SYSTEM.OSCOVFSR.BIT.PLOVF); - /* Disable sub-clock */ + /* Stop sub-clock */ SYSTEM.SOSCCR.BIT.SOSTP = 1U; /* Wait for the register modification to complete */ while (1U != SYSTEM.SOSCCR.BIT.SOSTP); - /* Disable sub-clock */ + /* Stop sub-clock */ RTC.RCR3.BIT.RTCEN = 0U; /* Wait for the register modification to complete */ while (0U != RTC.RCR3.BIT.RTCEN); + /* Wait for 5 sub-clock cycles */ + for (w_count = 0U; w_count < _007B_CGC_SUBSTPWT_WAIT; w_count++) + { + nop(); + } + + /* Set sub-clock drive capacity */ + RTC.RCR3.BIT.RTCDV = 1U; + + /* Wait for the register modification to complete */ + while (1U != RTC.RCR3.BIT.RTCDV); + + /* Set sub-clock */ + SYSTEM.SOSCCR.BIT.SOSTP = 0U; + + /* Wait for the register modification to complete */ + while (0U != SYSTEM.SOSCCR.BIT.SOSTP); + + /* Wait for sub-clock to be stable */ + for (w_count = 0U; w_count < _00061A81_CGC_SUBOSCWT_WAIT; w_count++) + { + nop(); + } + /* Set BCLK */ SYSTEM.SCKCR.BIT.PSTOP1 = 1U; diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_cgc.h b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_cgc.h index 59e2c6850..be05a6453 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_cgc.h +++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_cgc.h @@ -23,7 +23,7 @@ * Device(s) : R5F52318AxFP * Tool-Chain : CCRX * Description : This file implements device driver for CGC module. -* Creation Date: 23/09/2015 +* Creation Date: 2015/08/17 ***********************************************************************************************************************/ #ifndef CGC_H #define CGC_H @@ -212,6 +212,8 @@ Macro definitions (Register bit) /*********************************************************************************************************************** Macro definitions ***********************************************************************************************************************/ +#define _007B_CGC_SUBSTPWT_WAIT (0x007BU) /* Wait time for 5 sub clock cycles */ +#define _00061A81_CGC_SUBOSCWT_WAIT (0x00061A81U) /* Wait time for sub clock stable */ /*********************************************************************************************************************** Typedef definitions diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_cgc_user.c b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_cgc_user.c index 4b653fff0..58780c931 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_cgc_user.c +++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_cgc_user.c @@ -23,7 +23,7 @@ * Device(s) : R5F52318AxFP * Tool-Chain : CCRX * Description : This file implements device driver for CGC module. -* Creation Date: 23/09/2015 +* Creation Date: 2015/08/17 ***********************************************************************************************************************/ /*********************************************************************************************************************** diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_hardware_setup.c b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_hardware_setup.c index 30fdc9df3..b8d79ab49 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_hardware_setup.c +++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_hardware_setup.c @@ -21,7 +21,7 @@ * File Name : r_cg_hardware_setup.c * Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015] * Device(s) : R5F52318AxFP -* Tool-Chain : CCRX +* Tool-Chain : GCCRX * Description : This file implements system initializing function. * Creation Date: 23/09/2015 ***********************************************************************************************************************/ @@ -37,6 +37,9 @@ Includes ***********************************************************************************************************************/ #include "r_cg_macrodriver.h" #include "r_cg_cgc.h" +#include "r_cg_icu.h" +#include "r_cg_port.h" + /* Start user code for include. Do not edit comment generated here */ /* End user code. Do not edit comment generated here */ #include "r_cg_userdefine.h" @@ -47,6 +50,9 @@ Global variables and functions /* Start user code for global. Do not edit comment generated here */ /* End user code. Do not edit comment generated here */ +int HardwareSetup(void); +void R_Systeminit(void); + /*********************************************************************************************************************** * Function Name: R_Systeminit * Description : This function initializes every macro. @@ -64,6 +70,8 @@ void R_Systeminit(void) /* Set peripheral settings */ R_CGC_Create(); + R_ICU_Create(); + R_PORT_Create(); /* Disable writing to MPC pin function control registers */ MPC.PWPR.BIT.PFSWE = 0U; @@ -78,9 +86,11 @@ void R_Systeminit(void) * Arguments : None * Return Value : None ***********************************************************************************************************************/ -void HardwareSetup(void) +int HardwareSetup(void) { R_Systeminit(); + + return (1U); } /* Start user code for adding. Do not edit comment generated here */ diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_icu.c b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_icu.c new file mode 100644 index 000000000..e4d5e68f5 --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_icu.c @@ -0,0 +1,203 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_icu.c +* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015] +* Device(s) : R5F52318AxFP +* Tool-Chain : CCRX +* Description : This file implements device driver for ICU module. +* Creation Date: 2015/08/17 +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Pragma directive +***********************************************************************************************************************/ +/* Start user code for pragma. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +Includes +***********************************************************************************************************************/ +#include "r_cg_macrodriver.h" +#include "r_cg_icu.h" +/* Start user code for include. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#include "r_cg_userdefine.h" + +/*********************************************************************************************************************** +Global variables and functions +***********************************************************************************************************************/ +/* Start user code for global. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +* Function Name: R_ICU_Create +* Description : This function initializes ICU module. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_ICU_Create(void) +{ + /* Disable IRQ0~7 interrupts */ + ICU.IER[0x08].BYTE = _00_ICU_IRQ0_DISABLE | _00_ICU_IRQ1_DISABLE | _00_ICU_IRQ2_DISABLE | _00_ICU_IRQ3_DISABLE | + _00_ICU_IRQ4_DISABLE | _00_ICU_IRQ5_DISABLE | _00_ICU_IRQ6_DISABLE | _00_ICU_IRQ7_DISABLE; + + /* Set IRQ settings */ + ICU.IRQCR[1].BYTE = _04_ICU_IRQ_EDGE_FALLING; + ICU.IRQCR[4].BYTE = _04_ICU_IRQ_EDGE_FALLING; + + /* Set IRQ1 priority level */ + IPR(ICU,IRQ1) = _0F_ICU_PRIORITY_LEVEL15; + + /* Set IRQ4 priority level */ + IPR(ICU,IRQ4) = _0F_ICU_PRIORITY_LEVEL15; + + /* Set IRQ1 pin */ + MPC.P31PFS.BYTE = 0x40U; + PORT3.PDR.BYTE &= 0xFDU; + PORT3.PMR.BYTE &= 0xFDU; + + /* Set IRQ4 pin */ + MPC.P34PFS.BYTE = 0x40U; + PORT3.PDR.BYTE &= 0xEFU; + PORT3.PMR.BYTE &= 0xEFU; +} +/*********************************************************************************************************************** +* Function Name: R_ICU_IRQ1_Start +* Description : This function enables IRQ1 interrupt. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_ICU_IRQ1_Start(void) +{ + /* Enable IRQ1 interrupt */ + IEN(ICU,IRQ1) = 1U; +} +/*********************************************************************************************************************** +* Function Name: R_ICU_IRQ1_Stop +* Description : This function disables IRQ1 interrupt. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_ICU_IRQ1_Stop(void) +{ + /* Disable IRQ1 interrupt */ + IEN(ICU,IRQ1) = 0U; +} +/*********************************************************************************************************************** +* Function Name: R_ICU_IRQ4_Start +* Description : This function enables IRQ4 interrupt. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_ICU_IRQ4_Start(void) +{ + /* Enable IRQ4 interrupt */ + IEN(ICU,IRQ4) = 1U; +} +/*********************************************************************************************************************** +* Function Name: R_ICU_IRQ4_Stop +* Description : This function disables IRQ4 interrupt. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_ICU_IRQ4_Stop(void) +{ + /* Disable IRQ4 interrupt */ + IEN(ICU,IRQ4) = 0U; +} + +/* Start user code for adding. Do not edit comment generated here */ + +/******************************************************************************* +* Function Name: R_ICU_IRQIsFallingEdge +* Description : This function returns 1 if the specified ICU_IRQ is set to +* falling edge triggered, otherwise 0. +* Arguments : uint8_t irq_no +* Return Value : 1 if falling edge triggered, 0 if not +*******************************************************************************/ +uint8_t R_ICU_IRQIsFallingEdge (const uint8_t irq_no) +{ + uint8_t falling_edge_trig = 0x0; + + if (ICU.IRQCR[irq_no].BYTE & _04_ICU_IRQ_EDGE_FALLING) + { + falling_edge_trig = 1; + } + + return falling_edge_trig; + +} + +/******************************************************************************* +* End of function R_ICU_IRQIsFallingEdge +*******************************************************************************/ + +/******************************************************************************* +* Function Name: R_ICU_IRQSetFallingEdge +* Description : This function sets/clears the falling edge trigger for the +* specified ICU_IRQ. +* Arguments : uint8_t irq_no +* uint8_t set_f_edge, 1 if setting falling edge triggered, 0 if +* clearing +* Return Value : None +*******************************************************************************/ +void R_ICU_IRQSetFallingEdge (const uint8_t irq_no, const uint8_t set_f_edge) +{ + if (1 == set_f_edge) + { + ICU.IRQCR[irq_no].BYTE |= _04_ICU_IRQ_EDGE_FALLING; + } + else + { + ICU.IRQCR[irq_no].BYTE &= (uint8_t) ~_04_ICU_IRQ_EDGE_FALLING; + } +} + +/****************************************************************************** +* End of function R_ICU_IRQSetFallingEdge +*******************************************************************************/ + +/******************************************************************************* +* Function Name: R_ICU_IRQSetRisingEdge +* Description : This function sets/clear the rising edge trigger for the +* specified ICU_IRQ. +* Arguments : uint8_t irq_no +* uint8_t set_r_edge, 1 if setting rising edge triggered, 0 if +* clearing +* Return Value : None +*******************************************************************************/ +void R_ICU_IRQSetRisingEdge (const uint8_t irq_no, const uint8_t set_r_edge) +{ + if (1 == set_r_edge) + { + ICU.IRQCR[irq_no].BYTE |= _08_ICU_IRQ_EDGE_RISING; + } + else + { + ICU.IRQCR[irq_no].BYTE &= (uint8_t) ~_08_ICU_IRQ_EDGE_RISING; + } +} + +/****************************************************************************** +* End of function R_ICU_IRQSetRisingEdge +*******************************************************************************/ + +/* End user code. Do not edit comment generated here */ diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_icu.h b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_icu.h new file mode 100644 index 000000000..268b62eb1 --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_icu.h @@ -0,0 +1,185 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_icu.h +* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015] +* Device(s) : R5F52318AxFP +* Tool-Chain : CCRX +* Description : This file implements device driver for ICU module. +* Creation Date: 2015/08/17 +***********************************************************************************************************************/ +#ifndef ICU_H +#define ICU_H + +/*********************************************************************************************************************** +Macro definitions (Register bit) +***********************************************************************************************************************/ +/* + Interrupt Request Enable Register 08 (IER08) +*/ +/*Interrupt Request Enable/Disable(IENn) */ +#define _00_ICU_IRQ0_DISABLE (0x00U) /* IRQ0 interrupt request is disabled */ +#define _01_ICU_IRQ0_ENABLE (0x01U) /* IRQ0 interrupt request is enabled */ +#define _00_ICU_IRQ1_DISABLE (0x00U) /* IRQ1 interrupt request is disabled */ +#define _02_ICU_IRQ1_ENABLE (0x02U) /* IRQ1 interrupt request is enabled */ +#define _00_ICU_IRQ2_DISABLE (0x00U) /* IRQ2 interrupt request is disabled */ +#define _04_ICU_IRQ2_ENABLE (0x04U) /* IRQ2 interrupt request is enabled */ +#define _00_ICU_IRQ3_DISABLE (0x00U) /* IRQ3 interrupt request is disabled */ +#define _08_ICU_IRQ3_ENABLE (0x08U) /* IRQ3 interrupt request is enabled */ +#define _00_ICU_IRQ4_DISABLE (0x00U) /* IRQ4 interrupt request is disabled */ +#define _10_ICU_IRQ4_ENABLE (0x10U) /* IRQ4 interrupt request is enabled */ +#define _00_ICU_IRQ5_DISABLE (0x00U) /* IRQ5 interrupt request is disabled */ +#define _20_ICU_IRQ5_ENABLE (0x20U) /* IRQ5 interrupt request is enabled */ +#define _00_ICU_IRQ6_DISABLE (0x00U) /* IRQ6 interrupt request is disabled */ +#define _40_ICU_IRQ6_ENABLE (0x40U) /* IRQ6 interrupt request is enabled */ +#define _00_ICU_IRQ7_DISABLE (0x00U) /* IRQ7 interrupt request is disabled */ +#define _80_ICU_IRQ7_ENABLE (0x80U) /* IRQ7 interrupt request is enabled */ + +/* + Interrupt Source Priority Register n (IPRn) +*/ +/* Interrupt Priority Level Select (IPR[3:0]) */ +#define _00_ICU_PRIORITY_LEVEL0 (0x00U) /* Level 0 (interrupt disabled) */ +#define _01_ICU_PRIORITY_LEVEL1 (0x01U) /* Level 1 */ +#define _02_ICU_PRIORITY_LEVEL2 (0x02U) /* Level 2 */ +#define _03_ICU_PRIORITY_LEVEL3 (0x03U) /* Level 3 */ +#define _04_ICU_PRIORITY_LEVEL4 (0x04U) /* Level 4 */ +#define _05_ICU_PRIORITY_LEVEL5 (0x05U) /* Level 5 */ +#define _06_ICU_PRIORITY_LEVEL6 (0x06U) /* Level 6 */ +#define _07_ICU_PRIORITY_LEVEL7 (0x07U) /* Level 7 */ +#define _08_ICU_PRIORITY_LEVEL8 (0x08U) /* Level 8 */ +#define _09_ICU_PRIORITY_LEVEL9 (0x09U) /* Level 9 */ +#define _0A_ICU_PRIORITY_LEVEL10 (0x0AU) /* Level 10 */ +#define _0B_ICU_PRIORITY_LEVEL11 (0x0BU) /* Level 11 */ +#define _0C_ICU_PRIORITY_LEVEL12 (0x0CU) /* Level 12 */ +#define _0D_ICU_PRIORITY_LEVEL13 (0x0DU) /* Level 13 */ +#define _0E_ICU_PRIORITY_LEVEL14 (0x0EU) /* Level 14 */ +#define _0F_ICU_PRIORITY_LEVEL15 (0x0FU) /* Level 15 (highest) */ + +/* + Fast Interrupt Set Register (FIR) +*/ +/* Fast Interrupt Enable (FIEN) */ +#define _0000_ICU_FAST_INTERRUPT_DISABLE (0x0000U) /* Fast interrupt is disabled */ +#define _8000_ICU_FAST_INTERRUPT_ENABLE (0x8000U) /* Fast interrupt is enabled */ + +/* + IRQ Control Register i (IRQCRi) (i = 0 to 7) +*/ +/* IRQ Detection Sense Select (IRQMD[1:0]) */ +#define _00_ICU_IRQ_EDGE_LOW_LEVEL (0x00U) /* Low level */ +#define _04_ICU_IRQ_EDGE_FALLING (0x04U) /* Falling edge */ +#define _08_ICU_IRQ_EDGE_RISING (0x08U) /* Rising edge */ +#define _0C_ICU_IRQ_EDGE_BOTH (0x0CU) /* Rising and falling edge */ + +/* + IRQ Pin Digital Filter Enable Register 0 (IRQFLTE0) +*/ +/* Digital Filter Enable (FLTEN0n) */ +#define _00_ICU_IRQn_FILTER_DISABLE (0x00U) /* IRQn digital filter is disabled */ +#define _01_ICU_IRQ0_FILTER_ENABLE (0x01U) /* IRQ0 digital filter is enabled */ +#define _02_ICU_IRQ1_FILTER_ENABLE (0x02U) /* IRQ1 digital filter is enabled */ +#define _04_ICU_IRQ2_FILTER_ENABLE (0x04U) /* IRQ2 digital filter is enabled */ +#define _08_ICU_IRQ3_FILTER_ENABLE (0x08U) /* IRQ3 digital filter is enabled */ +#define _10_ICU_IRQ4_FILTER_ENABLE (0x10U) /* IRQ4 digital filter is enabled */ +#define _20_ICU_IRQ5_FILTER_ENABLE (0x20U) /* IRQ5 digital filter is enabled */ +#define _40_ICU_IRQ6_FILTER_ENABLE (0x40U) /* IRQ6 digital filter is enabled */ +#define _80_ICU_IRQ7_FILTER_ENABLE (0x80U) /* IRQ7 digital filter is enabled */ + +/* + IRQ Pin Digital Filter Setting Register 0 (IRQFLTC0) +*/ +/* IRQn Digital Filter Sampling Clock (FCLKSELn) */ +#define _0000_ICU_IRQ0_FILTER_PCLK (0x0000U) /* IRQ0 sample clock is run at every PCLK cycle */ +#define _0001_ICU_IRQ0_FILTER_PCLK_8 (0x0001U) /* IRQ0 sample clock is run at every PCLK/8 cycle */ +#define _0002_ICU_IRQ0_FILTER_PCLK_32 (0x0002U) /* IRQ0 sample clock is run at every PCLK/32 cycle */ +#define _0003_ICU_IRQ0_FILTER_PCLK_64 (0x0003U) /* IRQ0 sample clock is run at every PCLK/64 cycle */ +#define _0000_ICU_IRQ1_FILTER_PCLK (0x0000U) /* IRQ1 sample clock is run at every PCLK cycle */ +#define _0004_ICU_IRQ1_FILTER_PCLK_8 (0x0004U) /* IRQ1 sample clock is run at every PCLK/8 cycle */ +#define _0008_ICU_IRQ1_FILTER_PCLK_32 (0x0008U) /* IRQ1 sample clock is run at every PCLK/32 cycle */ +#define _000C_ICU_IRQ1_FILTER_PCLK_64 (0x000CU) /* IRQ1 sample clock is run at every PCLK/64 cycle */ +#define _0000_ICU_IRQ2_FILTER_PCLK (0x0000U) /* IRQ2 sample clock is run at every PCLK cycle */ +#define _0010_ICU_IRQ2_FILTER_PCLK_8 (0x0010U) /* IRQ2 sample clock is run at every PCLK/8 cycle */ +#define _0020_ICU_IRQ2_FILTER_PCLK_32 (0x0020U) /* IRQ2 sample clock is run at every PCLK/32 cycle */ +#define _0030_ICU_IRQ2_FILTER_PCLK_64 (0x0030U) /* IRQ2 sample clock is run at every PCLK/64 cycle */ +#define _0000_ICU_IRQ3_FILTER_PCLK (0x0000U) /* IRQ3 sample clock is run at every PCLK cycle */ +#define _0040_ICU_IRQ3_FILTER_PCLK_8 (0x0040U) /* IRQ3 sample clock is run at every PCLK/8 cycle */ +#define _0080_ICU_IRQ3_FILTER_PCLK_32 (0x0080U) /* IRQ3 sample clock is run at every PCLK/32 cycle */ +#define _00C0_ICU_IRQ3_FILTER_PCLK_64 (0x00C0U) /* IRQ3 sample clock is run at every PCLK/64 cycle */ +#define _0000_ICU_IRQ4_FILTER_PCLK (0x0000U) /* IRQ4 sample clock is run at every PCLK cycle */ +#define _0100_ICU_IRQ4_FILTER_PCLK_8 (0x0100U) /* IRQ4 sample clock is run at every PCLK/8 cycle */ +#define _0200_ICU_IRQ4_FILTER_PCLK_32 (0x0200U) /* IRQ4 sample clock is run at every PCLK/32 cycle */ +#define _0300_ICU_IRQ4_FILTER_PCLK_64 (0x0300U) /* IRQ4 sample clock is run at every PCLK/64 cycle */ +#define _0000_ICU_IRQ5_FILTER_PCLK (0x0000U) /* IRQ5 sample clock is run at every PCLK cycle */ +#define _0400_ICU_IRQ5_FILTER_PCLK_8 (0x0400U) /* IRQ5 sample clock is run at every PCLK/8 cycle */ +#define _0800_ICU_IRQ5_FILTER_PCLK_32 (0x0800U) /* IRQ5 sample clock is run at every PCLK/32 cycle */ +#define _0C00_ICU_IRQ5_FILTER_PCLK_64 (0x0C00U) /* IRQ5 sample clock is run at every PCLK/64 cycle */ +#define _0000_ICU_IRQ6_FILTER_PCLK (0x0000U) /* IRQ6 sample clock is run at every PCLK cycle */ +#define _1000_ICU_IRQ6_FILTER_PCLK_8 (0x1000U) /* IRQ6 sample clock is run at every PCLK/8 cycle */ +#define _2000_ICU_IRQ6_FILTER_PCLK_32 (0x2000U) /* IRQ6 sample clock is run at every PCLK/32 cycle */ +#define _3000_ICU_IRQ6_FILTER_PCLK_64 (0x3000U) /* IRQ6 sample clock is run at every PCLK/64 cycle */ +#define _0000_ICU_IRQ7_FILTER_PCLK (0x0000U) /* IRQ7 sample clock is run at every PCLK cycle */ +#define _4000_ICU_IRQ7_FILTER_PCLK_8 (0x4000U) /* IRQ7 sample clock is run at every PCLK/8 cycle */ +#define _8000_ICU_IRQ7_FILTER_PCLK_32 (0x8000U) /* IRQ7 sample clock is run at every PCLK/32 cycle */ +#define _C000_ICU_IRQ7_FILTER_PCLK_64 (0xC000U) /* IRQ7 sample clock is run at every PCLK/64 cycle */ + +/* + NMI Pin Interrupt Control Register (NMICR) +*/ +/* NMI Digital Filter Sampling Clock (NMIMD) */ +#define _00_ICU_NMI_EDGE_FALLING (0x00U) /* Falling edge */ +#define _08_ICU_NMI_EDGE_RISING (0x08U) /* Rising edge */ + +/* + NMI Pin Digital Filter Setting Register (NMIFLTC) +*/ +/* NMI Digital Filter Sampling Clock (NFCLKSEL[1:0]) */ +#define _00_ICU_NMI_FILTER_PCLK (0x00U) /* NMI sample clock is run at every PCLK cycle */ +#define _01_ICU_NMI_FILTER_PCLK_8 (0x01U) /* NMI sample clock is run at every PCLK/8 cycle */ +#define _02_ICU_NMI_FILTER_PCLK_32 (0x02U) /* NMI sample clock is run at every PCLK/32 cycle */ +#define _03_ICU_NMI_FILTER_PCLK_64 (0x03U) /* NMI sample clock is run at every PCLK/64 cycle */ + + +/*********************************************************************************************************************** +Macro definitions +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Typedef definitions +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Global functions +***********************************************************************************************************************/ +void R_ICU_Create(void); +void R_ICU_IRQ1_Start(void); +void R_ICU_IRQ1_Stop(void); +void R_ICU_IRQ4_Start(void); +void R_ICU_IRQ4_Stop(void); + +/* Start user code for function. Do not edit comment generated here */ + +/* Function prototypes for detecting and setting the edge trigger of ICU_IRQ */ +uint8_t R_ICU_IRQIsFallingEdge(const uint8_t irq_no); +void R_ICU_IRQSetFallingEdge(const uint8_t irq_no, const uint8_t set_f_edge); +void R_ICU_IRQSetRisingEdge(const uint8_t irq_no, const uint8_t set_r_edge); + +/* End user code. Do not edit comment generated here */ +#endif \ No newline at end of file diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_interrupt_handlers.h b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_interrupt_handlers.h new file mode 100644 index 000000000..c306c8b2e --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_interrupt_handlers.h @@ -0,0 +1,72 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_interrupt_handlers.h +* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015] +* Device(s) : R5F52318AxFP +* Tool-Chain : GCCRX +* Description : This file declares interrupt handlers. +* Creation Date: 23/09/2015 +***********************************************************************************************************************/ +#ifndef INTERRUPT_HANDLERS_H +#define INTERRUPT_HANDLERS_H + +/*********************************************************************************************************************** +Macro definitions (Register bit) +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Macro definitions +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Typedef definitions +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Global functions +***********************************************************************************************************************/ + +/* Undefined */ +void r_undefined_exception(void) __attribute__ ((interrupt)); + +/* Access Exception */ +void r_access_exception(void) __attribute__ ((interrupt)); + +/* Privileged Instruction Exception */ +void r_privileged_exception(void) __attribute__ ((interrupt)); + +/* Floating Point Exception */ +void r_floatingpoint_exception(void) __attribute__ ((interrupt)); + +/* NMI */ +void r_nmi_exception(void) __attribute__ ((interrupt)); + +/* BRK */ +void r_brk_exception(void) __attribute__ ((interrupt)); + +/* Hardware Vectors */ +void PowerON_Reset(void) __attribute__ ((interrupt)); + +/* Idle Vectors */ +void r_undefined_exception(void) __attribute__ ((interrupt)); +void r_reserved_exception(void) __attribute__ ((interrupt)); + +#endif \ No newline at end of file diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_macrodriver.h b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_macrodriver.h index fde1c5181..830f871f0 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_macrodriver.h +++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_macrodriver.h @@ -2,15 +2,15 @@ * DISCLAIMER * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. * No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all -* applicable laws, including copyright laws. +* applicable laws, including copyright laws. * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY * LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, * INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR * ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability -* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the * following link: * http://www.renesas.com/disclaimer * @@ -21,7 +21,7 @@ * File Name : r_cg_macrodriver.h * Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015] * Device(s) : R5F52318AxFP -* Tool-Chain : CCRX +* Tool-Chain : GCCRX * Description : This file implements general head file. * Creation Date: 23/09/2015 ***********************************************************************************************************************/ @@ -79,22 +79,18 @@ Typedef definitions typedef signed long int32_t; typedef unsigned long uint32_t; - typedef signed char int_least8_t; - typedef signed short int_least16_t; - typedef signed long int_least32_t; - typedef unsigned char uint_least8_t; - typedef unsigned short uint_least16_t; - typedef unsigned long uint_least32_t; + typedef signed char int_least8_t; + typedef signed short int_least16_t; + typedef signed long int_least32_t; + typedef unsigned char uint_least8_t; + typedef unsigned short uint_least16_t; + typedef unsigned long uint_least32_t; #endif typedef unsigned short MD_STATUS; #define __TYPEDEF__ #endif -/*********************************************************************************************************************** -Global functions -***********************************************************************************************************************/ -void HardwareSetup(void); -void R_Systeminit(void); -#endif \ No newline at end of file + +#endif diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_port.c b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_port.c new file mode 100644 index 000000000..e284f6baf --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_port.c @@ -0,0 +1,69 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_port.c +* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015] +* Device(s) : R5F52318AxFP +* Tool-Chain : CCRX +* Description : This file implements device driver for Port module. +* Creation Date: 2015/08/17 +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Pragma directive +***********************************************************************************************************************/ +/* Start user code for pragma. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +Includes +***********************************************************************************************************************/ +#include "r_cg_macrodriver.h" +#include "r_cg_port.h" +/* Start user code for include. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#include "r_cg_userdefine.h" + +/*********************************************************************************************************************** +Global variables and functions +***********************************************************************************************************************/ +/* Start user code for global. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +* Function Name: R_PORT_Create +* Description : This function initializes the Port I/O. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_PORT_Create(void) +{ + PORT1.PODR.BYTE = _80_Pm7_OUTPUT_1; + PORT3.PODR.BYTE = _08_Pm3_OUTPUT_1; + PORT5.PODR.BYTE = _01_Pm0_OUTPUT_1 | _02_Pm1_OUTPUT_1 | _04_Pm2_OUTPUT_1; + PORTE.PODR.BYTE = _08_Pm3_OUTPUT_1 | _80_Pm7_OUTPUT_1; + PORT1.PDR.BYTE = _80_Pm7_MODE_OUTPUT; + PORT3.PDR.BYTE = _08_Pm3_MODE_OUTPUT; + PORT5.PDR.BYTE = _01_Pm0_MODE_OUTPUT | _02_Pm1_MODE_OUTPUT | _04_Pm2_MODE_OUTPUT; + PORTE.PDR.BYTE = _08_Pm3_MODE_OUTPUT | _10_Pm4_MODE_OUTPUT | _80_Pm7_MODE_OUTPUT; +} + +/* Start user code for adding. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_port.h b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_port.h new file mode 100644 index 000000000..acf2cb591 --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_port.h @@ -0,0 +1,170 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_port.h +* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015] +* Device(s) : R5F52318AxFP +* Tool-Chain : CCRX +* Description : This file implements device driver for Port module. +* Creation Date: 2015/08/17 +***********************************************************************************************************************/ +#ifndef PORT_H +#define PORT_H + +/*********************************************************************************************************************** +Macro definitions (Register bit) +***********************************************************************************************************************/ +/* + Port Direction Register (PDR) +*/ +/* Pmn Direction Control (B7 - B0) */ +#define _00_Pm0_MODE_NOT_USED (0x00U) /* Pm0 not used */ +#define _00_Pm0_MODE_INPUT (0x00U) /* Pm0 as input */ +#define _01_Pm0_MODE_OUTPUT (0x01U) /* Pm0 as output */ +#define _00_Pm1_MODE_NOT_USED (0x00U) /* Pm1 not used */ +#define _00_Pm1_MODE_INPUT (0x00U) /* Pm1 as input */ +#define _02_Pm1_MODE_OUTPUT (0x02U) /* Pm1 as output */ +#define _00_Pm2_MODE_NOT_USED (0x00U) /* Pm2 not used */ +#define _00_Pm2_MODE_INPUT (0x00U) /* Pm2 as input */ +#define _04_Pm2_MODE_OUTPUT (0x04U) /* Pm2 as output */ +#define _00_Pm3_MODE_NOT_USED (0x00U) /* Pm3 not used */ +#define _00_Pm3_MODE_INPUT (0x00U) /* Pm3 as input */ +#define _08_Pm3_MODE_OUTPUT (0x08U) /* Pm3 as output */ +#define _00_Pm4_MODE_NOT_USED (0x00U) /* Pm4 not used */ +#define _00_Pm4_MODE_INPUT (0x00U) /* Pm4 as input */ +#define _10_Pm4_MODE_OUTPUT (0x10U) /* Pm4 as output */ +#define _00_Pm5_MODE_NOT_USED (0x00U) /* Pm5 not used */ +#define _00_Pm5_MODE_INPUT (0x00U) /* Pm5 as input */ +#define _20_Pm5_MODE_OUTPUT (0x20U) /* Pm5 as output */ +#define _00_Pm6_MODE_NOT_USED (0x00U) /* Pm6 not used */ +#define _00_Pm6_MODE_INPUT (0x00U) /* Pm6 as input */ +#define _40_Pm6_MODE_OUTPUT (0x40U) /* Pm6 as output */ +#define _00_Pm7_MODE_NOT_USED (0x00U) /* Pm7 not used */ +#define _00_Pm7_MODE_INPUT (0x00U) /* Pm7 as input */ +#define _80_Pm7_MODE_OUTPUT (0x80U) /* Pm7 as output */ + +/* + Port Output Data Register (PODR) +*/ +/* Pmn Output Data Store (B7 - B0) */ +#define _00_Pm0_OUTPUT_0 (0x00U) /* output low at B0 */ +#define _01_Pm0_OUTPUT_1 (0x01U) /* output high at B0 */ +#define _00_Pm1_OUTPUT_0 (0x00U) /* output low at B1 */ +#define _02_Pm1_OUTPUT_1 (0x02U) /* output high at B1 */ +#define _00_Pm2_OUTPUT_0 (0x00U) /* output low at B2 */ +#define _04_Pm2_OUTPUT_1 (0x04U) /* output high at B2 */ +#define _00_Pm3_OUTPUT_0 (0x00U) /* output low at B3 */ +#define _08_Pm3_OUTPUT_1 (0x08U) /* output high at B3 */ +#define _00_Pm4_OUTPUT_0 (0x00U) /* output low at B4 */ +#define _10_Pm4_OUTPUT_1 (0x10U) /* output high at B4 */ +#define _00_Pm5_OUTPUT_0 (0x00U) /* output low at B5 */ +#define _20_Pm5_OUTPUT_1 (0x20U) /* output high at B5 */ +#define _00_Pm6_OUTPUT_0 (0x00U) /* output low at B6 */ +#define _40_Pm6_OUTPUT_1 (0x40U) /* output high at B6 */ +#define _00_Pm7_OUTPUT_0 (0x00U) /* output low at B7 */ +#define _80_Pm7_OUTPUT_1 (0x80U) /* output high at B7 */ + +/* + Open Drain Control Register 0 (ODR0) +*/ +/* Pmn Output Type Select (Pm0 to Pm3) */ +#define _00_Pm0_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _01_Pm0_NCH_OPEN_DRAIN (0x01U) /* N-channel open-drain output */ +#define _00_Pm1_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _04_Pm1_NCH_OPEN_DRAIN (0x04U) /* N-channel open-drain output */ +#define _08_Pm1_PCH_OPEN_DRAIN (0x08U) /* PMOS open-drain output, for PE1 only*/ +#define _00_Pm2_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _10_Pm2_NCH_OPEN_DRAIN (0x10U) /* N-channel open-drain output */ +#define _00_Pm3_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _40_Pm3_NCH_OPEN_DRAIN (0x40U) /* N-channel open-drain output */ + +/* + Open Drain Control Register 1 (ODR1) +*/ +/* Pmn Output Type Select (Pm4 to Pm7) */ +#define _00_Pm4_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _01_Pm4_NCH_OPEN_DRAIN (0x01U) /* N-channel open-drain output */ +#define _00_Pm5_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _04_Pm5_NCH_OPEN_DRAIN (0x04U) /* N-channel open-drain output */ +#define _00_Pm6_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _10_Pm6_NCH_OPEN_DRAIN (0x10U) /* N-channel open-drain output */ +#define _00_Pm7_CMOS_OUTPUT (0x00U) /* CMOS output */ +#define _40_Pm7_NCH_OPEN_DRAIN (0x40U) /* N-channel open-drain output */ + +/* + Pull-Up Control Register (PCR) +*/ +/* Pmn Input Pull-Up Resistor Control (B7 - B0) */ +#define _00_Pm0_PULLUP_OFF (0x00U) /* Pm0 pull-up resistor not connected */ +#define _01_Pm0_PULLUP_ON (0x01U) /* Pm0 pull-up resistor connected */ +#define _00_Pm1_PULLUP_OFF (0x00U) /* Pm1 pull-up resistor not connected */ +#define _02_Pm1_PULLUP_ON (0x02U) /* Pm1 pull-up resistor connected */ +#define _00_Pm2_PULLUP_OFF (0x00U) /* Pm2 Pull-up resistor not connected */ +#define _04_Pm2_PULLUP_ON (0x04U) /* Pm2 pull-up resistor connected */ +#define _00_Pm3_PULLUP_OFF (0x00U) /* Pm3 pull-up resistor not connected */ +#define _08_Pm3_PULLUP_ON (0x08U) /* Pm3 pull-up resistor connected */ +#define _00_Pm4_PULLUP_OFF (0x00U) /* Pm4 pull-up resistor not connected */ +#define _10_Pm4_PULLUP_ON (0x10U) /* Pm4 pull-up resistor connected */ +#define _00_Pm5_PULLUP_OFF (0x00U) /* Pm5 pull-up resistor not connected */ +#define _20_Pm5_PULLUP_ON (0x20U) /* Pm5 pull-up resistor connected */ +#define _00_Pm6_PULLUP_OFF (0x00U) /* Pm6 pull-up resistor not connected */ +#define _40_Pm6_PULLUP_ON (0x40U) /* Pm6 pull-up resistor connected */ +#define _00_Pm7_PULLUP_OFF (0x00U) /* Pm7 pull-up resistor not connected */ +#define _80_Pm7_PULLUP_ON (0x80U) /* Pm7 pull-up resistor connected */ + +/* + Drive Capacity Control Register (DSCR) +*/ +/* Pmn Drive Capacity Control (B7 - B0) */ +#define _00_Pm0_HIDRV_OFF (0x00U) /* Pm0 Normal drive output */ +#define _01_Pm0_HIDRV_ON (0x01U) /* Pm0 High-drive output */ +#define _00_Pm1_HIDRV_OFF (0x00U) /* Pm1 Normal drive output */ +#define _02_Pm1_HIDRV_ON (0x02U) /* Pm1 High-drive output */ +#define _00_Pm2_HIDRV_OFF (0x00U) /* Pm2 Normal drive output */ +#define _04_Pm2_HIDRV_ON (0x04U) /* Pm2 High-drive output */ +#define _00_Pm3_HIDRV_OFF (0x00U) /* Pm3 Normal drive output */ +#define _08_Pm3_HIDRV_ON (0x08U) /* Pm3 High-drive output */ +#define _00_Pm4_HIDRV_OFF (0x00U) /* Pm4 Normal drive output */ +#define _10_Pm4_HIDRV_ON (0x10U) /* Pm4 High-drive output */ +#define _00_Pm5_HIDRV_OFF (0x00U) /* Pm5 Normal drive output */ +#define _20_Pm5_HIDRV_ON (0x20U) /* Pm5 High-drive output */ +#define _00_Pm6_HIDRV_OFF (0x00U) /* Pm6 Normal drive output */ +#define _40_Pm6_HIDRV_ON (0x40U) /* Pm6 High-drive output */ +#define _00_Pm7_HIDRV_OFF (0x00U) /* Pm7 Normal drive output */ +#define _80_Pm7_HIDRV_ON (0x80U) /* Pm7 High-drive output */ + + +/*********************************************************************************************************************** +Macro definitions +***********************************************************************************************************************/ + + +/*********************************************************************************************************************** +Typedef definitions +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Global functions +***********************************************************************************************************************/ +void R_PORT_Create(void); + +/* Start user code for function. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#endif \ No newline at end of file diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_userdefine.h b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_userdefine.h index 767d34492..46d6d5e98 100644 --- a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_userdefine.h +++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/cg_src/r_cg_userdefine.h @@ -23,7 +23,7 @@ * Device(s) : R5F52318AxFP * Tool-Chain : CCRX * Description : This file includes user definition. -* Creation Date: 23/09/2015 +* Creation Date: 2015/08/17 ***********************************************************************************************************************/ #ifndef _USER_DEF_H #define _USER_DEF_H @@ -34,5 +34,11 @@ User definitions #define FAST_INTERRUPT_VECTOR 0 /* Start user code for function. Do not edit comment generated here */ + +#define TRUE (1) +#define FALSE (0) + +extern volatile uint8_t g_adc_trigger; + /* End user code. Do not edit comment generated here */ #endif \ No newline at end of file diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/rskrx231def.h b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/rskrx231def.h new file mode 100644 index 000000000..d7b568eee --- /dev/null +++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/rskrx231def.h @@ -0,0 +1,71 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No +* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM +* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES +* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS +* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of +* this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ +/*********************************************************************************************************************** +* File Name : rskrx231def.h +* Device(s) : R5F52318AxFP +* Tool-Chain : CCRX +* H/W Platform : RSKRX231 +* Description : Defines macros relating to the RSKRX231 user LEDs and switches +***********************************************************************************************************************/ +/********************************************************************************************************************** +* History : DD.MM.YYYY Version Description +* : 01.06.2015 1.00 First Release +***********************************************************************************************************************/ + + +/*********************************************************************************************************************** +Macro definitions +***********************************************************************************************************************/ +#ifndef RSKRX231_H +#define RSKRX231_H + + +/* General Values */ +#define LED_ON (0) +#define LED_OFF (1) +#define SET_BIT_HIGH (1) +#define SET_BIT_LOW (0) +#define SET_BYTE_HIGH (0xFF) +#define SET_BYTE_LOW (0x00) + +/* Switches */ +#define SW1 (PORT3.PIDR.BIT.B1) +#define SW2 (PORT3.PIDR.BIT.B4) +#define SW3 (PORT0.PIDR.BIT.B7) + +/* LED port settings */ +#define LED0 (PORT1.PODR.BIT.B7) +#define LED1 (PORT5.PODR.BIT.B0) +#define LED2 (PORT5.PODR.BIT.B1) +#define LED3 (PORT5.PODR.BIT.B2) + +/*********************************************************************************************************************** +Typedef definitions +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Exported global variables +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Exported global functions (to be accessed by other files) +***********************************************************************************************************************/ + +#endif +