From: Nobuhiro Iwamatsu Date: Tue, 4 Nov 2014 00:15:48 +0000 (+0900) Subject: net: sh-eth: Add cache writeback control after setting bit of DMA descriptor X-Git-Tag: v2015.01-rc1~38^2 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=f7ca1f76fd01f3fc7e75fb3fd801c7bef16598db;p=u-boot net: sh-eth: Add cache writeback control after setting bit of DMA descriptor A bit field of DMA descriptor is on memory area of DMA. If we set data to bit of DMA descriptor, we must be writeback data of DMA descriptor. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index d1d3b6898d..4bf493ed45 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -2,9 +2,9 @@ * sh_eth.c - Driver for Renesas ethernet controler. * * Copyright (C) 2008, 2011 Renesas Solutions Corp. - * Copyright (c) 2008, 2011 Nobuhiro Iwamatsu + * Copyright (c) 2008, 2011, 2014 2014 Nobuhiro Iwamatsu * Copyright (c) 2007 Carlos Munoz - * Copyright (C) 2013 Renesas Electronics Corporation + * Copyright (C) 2013, 2014 Renesas Electronics Corporation * * SPDX-License-Identifier: GPL-2.0+ */ @@ -83,6 +83,8 @@ int sh_eth_send(struct eth_device *dev, void *packet, int len) else port_info->tx_desc_cur->td0 = TD_TACT | TD_TFP; + flush_cache_wback(port_info->tx_desc_cur, sizeof(struct tx_desc_s)); + /* Restart the transmitter if disabled */ if (!(sh_eth_read(eth, EDTRR) & EDTRR_TRNS)) sh_eth_write(eth, EDTRR_TRNS, EDTRR); @@ -133,6 +135,10 @@ int sh_eth_recv(struct eth_device *dev) port_info->rx_desc_cur->rd0 = RD_RACT | RD_RDLE; else port_info->rx_desc_cur->rd0 = RD_RACT; + + flush_cache_wback(port_info->rx_desc_cur, + sizeof(struct rx_desc_s)); + /* Point to the next descriptor */ port_info->rx_desc_cur++; if (port_info->rx_desc_cur >=