From: richardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Date: Mon, 25 Feb 2008 09:56:56 +0000 (+0000)
Subject: Work in progress, for backup purposes only.
X-Git-Tag: V4.8.0~63
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=f82a90987f0bf537f1e22d2a5484bfa5ec688cc1;p=freertos

Work in progress, for backup purposes only.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@218 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
---

diff --git a/Source/portable/GCC/PPC405/port.c b/Source/portable/GCC/PPC405/port.c
index 8801d7294..1455b037b 100644
--- a/Source/portable/GCC/PPC405/port.c
+++ b/Source/portable/GCC/PPC405/port.c
@@ -63,6 +63,7 @@
 #define portMACHINE_CHECK_ENABLE		( 1UL << 19UL )
 #define portINITIAL_MSR		( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE )
 
+
 /*
  */
 static void prvSetupTimerInterrupt( void );
@@ -84,9 +85,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
 	*pxTopOfStack = 0xDEADBEEF;
 	*pxTopOfStack--;
 
-	*pxTopOfStack = 0x10000001UL;;	/* R0. */
-	pxTopOfStack--;
-									/* SP. */
+	/* EABI stack frame. */
 	*pxTopOfStack = 0x31313131UL;	/* R31. */
 	pxTopOfStack--;
 	*pxTopOfStack = 0x30303030UL;	/* R30. */
@@ -147,20 +146,26 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
 	pxTopOfStack--;
 	*pxTopOfStack = 0x02020202UL;	/* R2. */
 	pxTopOfStack--;
-	*pxTopOfStack = 0x00000000;		/* CR. */
+	*pxTopOfStack = 0x10000001UL;;	/* R0. */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x00000000UL;	/* USPRG0. */
 	pxTopOfStack--;
-	*pxTopOfStack = 0x00000000;		/* XER. */
+	*pxTopOfStack = 0x00000000UL;	/* CR. */
 	pxTopOfStack--;
-	*pxTopOfStack = 0x00000000;		/* LR. */
+	*pxTopOfStack = 0x00000000UL;	/* XER. */
 	pxTopOfStack--;
-	*pxTopOfStack = 0x00000000;		/* CTR. */
+	*pxTopOfStack = 0x00000000UL;	/* CTR. */
 	pxTopOfStack--;
-	*pxTopOfStack = 0x00000000;		/* USPRG0. */
+	*pxTopOfStack = ( portSTACK_TYPE ) vStartFirstTask;	/* LR. */
 	pxTopOfStack--;
 	*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* SRR0. */
 	pxTopOfStack--;
 	*pxTopOfStack = portINITIAL_MSR;/* SRR1. */
 	pxTopOfStack--;
+	*pxTopOfStack = 0x00000000UL;/* Next LR. */
+	pxTopOfStack--;
+	*pxTopOfStack = portINITIAL_MSR;/* Backchain. */
+//	pxTopOfStack--;
 
 	return pxTopOfStack;
 }
@@ -170,7 +175,13 @@ portBASE_TYPE xPortStartScheduler( void )
 {
 extern void *pxCurrentTCB;
 
-	prvSetupTimerInterrupt();
+	XExc_Init();
+	XExc_mDisableExceptions( XEXC_NON_CRITICAL ) ;	
+
+//	prvSetupTimerInterrupt();
+	XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );
+	XExc_mEnableExceptions( XEXC_NON_CRITICAL ) ;
+
 	vStartFirstTask();
 	
 	/* Should not get here as the tasks are now running! */
@@ -191,17 +202,11 @@ static void prvSetupTimerInterrupt( void )
 {
 const unsigned portLONG ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
 
-	XExc_Init();
-	XExc_mDisableExceptions( XEXC_NON_CRITICAL ) ;	
 	XExc_RegisterHandler( XEXC_ID_PIT_INT, ( XExceptionHandler ) prvTickISR, ( void * ) 0 );
-	XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );
 
 	XTime_PITEnableAutoReload();
-	XTime_PITEnableInterrupt();
 	XTime_PITSetInterval( ulInterval );
 	XTime_PITEnableInterrupt();
-	
-	XExc_mEnableExceptions( XEXC_NON_CRITICAL ) ;
 }
 /*-----------------------------------------------------------*/
 
@@ -222,6 +227,3 @@ static unsigned portLONG ulTicks = 0;
 }
 /*-----------------------------------------------------------*/
 
-
-
-
diff --git a/Source/portable/GCC/PPC405/portasm.s b/Source/portable/GCC/PPC405/portasm.s
index 6849a8d98..43dfeb221 100644
--- a/Source/portable/GCC/PPC405/portasm.s
+++ b/Source/portable/GCC/PPC405/portasm.s
@@ -1,3 +1,5 @@
+#include "xreg405.h"
+
 	.extern pxCurrentTCB
 	.extern vTaskSwitchContext
 
@@ -15,6 +17,22 @@
 .set portSRR0_OFFSET, 8
 .set portSRR1_OFFSET, 4
 
+
+.set	BChainField, 0
+.set	NextLRField, BChainField + 4
+.set	MSRField,    NextLRField + 4
+.set	PCField,     MSRField    + 4
+.set	LRField,     PCField     + 4
+.set	CTRField,    LRField     + 4
+.set	XERField,    CTRField    + 4
+.set	CRField,     XERField    + 4
+.set	USPRG0Field, CRField     + 4
+.set	r0Field,     USPRG0Field + 4
+.set	r2Field,     r0Field     + 4
+.set	r3r31Field,  r2Field     + 4
+.set	IFrameSize,  r3r31Field  + ( ( 31 - 3 ) + 1 ) * 4
+
+
 .macro portRESTORE_CONTEXT
 
 	# Get the address of the TCB.
@@ -88,17 +106,104 @@
 
 	.endm
 
+
+.macro int_epilogue
+
+	# Get the address of the TCB.
+	xor		R0, R0, R0
+    addis   SP, R0, pxCurrentTCB@ha
+    lwz		SP,	pxCurrentTCB@l( SP )
+
+	# Get the task stack pointer from the TCB.
+	lwz		SP, 0( SP )
+	
+	# Restore MSR register to SRR1.
+	lwz	R0,MSRField(R1)
+	mtsrr1	R0
+	
+	# Restore current PC location to SRR0.
+	lwz	R0,PCField(R1)
+	mtsrr0	R0
+
+	# Save USPRG0 register
+	lwz	R0,USPRG0Field(R1)
+	mtspr	0x100,R0
+	
+	# Restore Condition register
+	lwz	R0,CRField(R1)
+	mtcr	R0
+	
+	# Restore Fixed Point Exception register
+	lwz	R0,XERField(R1)
+	mtxer	R0
+	
+	# Restore Counter register
+	lwz	R0,CTRField(R1)
+	mtctr	R0
+	
+	# Restore Link register
+	lwz	R0,LRField(R1)
+	mtlr	R0
+	
+	# Restore remaining GPR registers.
+	lmw	R3,r3r31Field(R1)
+	
+	# Restore r0 and r2.
+	lwz	R0,r0Field(R1)
+	lwz	R2,r2Field(R1)
+	
+	# Remove frame from stack
+	addi	R1,R1,IFrameSize
+	
+.endm
+
+.macro portENTER_SWITCHING_ISR
+
+	# Get the address of the TCB.				
+	xor		R0, R0, R0
+	addis	R2, R0, pxCurrentTCB@ha
+	lwz		R2,	pxCurrentTCB@l( R2 )
+
+	# Store the stack pointer into the TCB
+	stw		SP,	0( R2 )
+
+.endm
+
+.macro portEXIT_SWITCHING_ISR
+
+	# Get the address of the TCB.
+	xor		R0, R0, R0
+	addis   SP, R0, pxCurrentTCB@ha
+	lwz		SP,	pxCurrentTCB@l( R1 )
+
+	# Get the task stack pointer from the TCB.
+	lwz		SP, 0( SP )
+
+	# Load up the LR for the correct return.
+	lwz	R0,LRField(R1)
+	mtlr	R0
+
+
+.endm
+
+
 vStartFirstTask:
-	portRESTORE_CONTEXT
+
+	int_epilogue
 	rfi
 
+#vStartFirstTask:
+#	portRESTORE_CONTEXT
+#	rfi
+
 
 
 vPortYield:
 
-	portSAVE_CONTEXT
+	portENTER_SWITCHING_ISR
 	bl vTaskSwitchContext
-	portRESTORE_CONTEXT
+	portEXIT_SWITCHING_ISR
+	blr
 
 	NOP
 	NOP