From: Ed Swarthout <Ed.Swarthout@freescale.com>
Date: Fri, 25 Apr 2008 06:08:32 +0000 (-0500)
Subject: MPC8544DS: decode pcie3 end-point configuration correctly.
X-Git-Tag: v1.3.3-rc1~4
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=f97abbfb47d9e407354e157cae3f6369e460cd37;p=u-boot

MPC8544DS: decode pcie3 end-point configuration correctly.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---

diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 81070164c1..dd10af8092 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -163,7 +163,7 @@ pci_init_board(void)
 	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCIE3_ADDR;
 	extern void fsl_pci_init(struct pci_controller *hose);
 	struct pci_controller *hose = &pcie3_hose;
-	int pcie_ep = (host_agent == 3);
+	int pcie_ep = (host_agent == 1);
 	int pcie_configured  = io_sel >= 1;
 
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){