From: Marek Vasut Date: Sat, 18 Jul 2015 23:34:43 +0000 (+0200) Subject: ddr: altera: Extract scc_mgr_set_hhp_extras() X-Git-Tag: v2015.10-rc2~319 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=fa5d821b6b5aa09d1e1222ecb7bd1abbab0acf5c;p=u-boot ddr: altera: Extract scc_mgr_set_hhp_extras() Move scc_mgr_set_hhp_extras() out of scc_set_bypass_mode() as it has nothing to do in there. Instead, invoke it from mem_calibrate() just before invoking scc_set_bypass_mode(). Signed-off-by: Marek Vasut --- diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index baa6868c2d..8020651f88 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -527,10 +527,6 @@ static void scc_mgr_zero_all(void) */ static void scc_set_bypass_mode(const u32 write_group) { - /* Only needed once to set all groups, pins, DQ, DQS, DM. */ - if (write_group == 0) - scc_mgr_set_hhp_extras(); - /* Multicast to all DQ enables. */ writel(0xff, &sdr_scc_mgr->dq_ena); writel(0xff, &sdr_scc_mgr->dm_ena); @@ -3332,6 +3328,10 @@ static uint32_t mem_calibrate(void) for (i = 0; i < RW_MGR_MEM_IF_READ_DQS_WIDTH; i++) { writel(i, SDR_PHYGRP_SCCGRP_ADDRESS | SCC_MGR_GROUP_COUNTER_OFFSET); + /* Only needed once to set all groups, pins, DQ, DQS, DM. */ + if (i == 0) + scc_mgr_set_hhp_extras(); + scc_set_bypass_mode(i); }