From: Stefan Roese Date: Tue, 11 Aug 2015 15:12:44 +0000 (+0200) Subject: net: e1000: Increase autoneg timeout to 8 seconds X-Git-Tag: v2015.10-rc2~61^2 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=faa765d40760d84bff0de26a5a5f605621dbff39;p=u-boot net: e1000: Increase autoneg timeout to 8 seconds The current 4.5 timeout for the autonegotiation are not enough to complete it on my platform. Using the Intel E1000 PCIe card in the Marvell db-mv784mp-gp eval board. So lets increase the timeout to 8 seconds. Signed-off-by: Stefan Roese Cc: Joe Hershberger Cc: Simon Glass --- diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index ecd1a52e47..d5d48b1e7d 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -4017,7 +4017,7 @@ e1000_wait_autoneg(struct e1000_hw *hw) DEBUGFUNC(); DEBUGOUT("Waiting for Auto-Neg to complete.\n"); - /* We will wait for autoneg to complete or 4.5 seconds to expire. */ + /* We will wait for autoneg to complete or timeout to expire. */ for (i = PHY_AUTO_NEG_TIME; i > 0; i--) { /* Read the MII Status Register and wait for Auto-Neg * Complete bit to be set. diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h index 232c95d2a4..23a81e6c2d 100644 --- a/drivers/net/e1000.h +++ b/drivers/net/e1000.h @@ -2460,7 +2460,7 @@ struct e1000_hw { #define MII_CR_SPEED_100 0x2000 #define MII_CR_SPEED_10 0x0000 #define E1000_PHY_ADDRESS 0x01 -#define PHY_AUTO_NEG_TIME 45 /* 4.5 Seconds */ +#define PHY_AUTO_NEG_TIME 80 /* 8.0 Seconds */ #define PHY_FORCE_TIME 20 /* 2.0 Seconds */ #define PHY_REVISION_MASK 0xFFFFFFF0 #define DEVICE_SPEED_MASK 0x00000300 /* Device Ctrl Reg Speed Mask */