From: Benoît Monin <bmonin@adeneo.eu>
Date: Fri, 8 Jun 2007 07:55:24 +0000 (+0200)
Subject: [PATCH] fix gpio setting when using CFG_440_GPIO_TABLE
X-Git-Tag: v1.3.0-rc1~66
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=fba3fb0449b8a54542aed1e729de76e7f5a2ff1b;p=u-boot

[PATCH] fix gpio setting when using CFG_440_GPIO_TABLE

Set the correct value in GPIOx_TCR when configuring the gpio
with CFG_440_GPIO_TABLE.

Signed-off-by: Benoit Monin <bmonin@adeneo.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
---

diff --git a/cpu/ppc4xx/gpio.c b/cpu/ppc4xx/gpio.c
index dd84e58a1f..fb0f575eaf 100644
--- a/cpu/ppc4xx/gpio.c
+++ b/cpu/ppc4xx/gpio.c
@@ -157,12 +157,12 @@ void gpio_set_chip_configuration(void)
 				switch (gpio_tab[gpio_core][i].alt_nb) {
 				case GPIO_SEL:
 					if (gpio_core == GPIO0) {
-						reg = in32(GPIO0_TCR) | (0x80000000 >> (j));
+						reg = in32(GPIO0_TCR) | (0x80000000 >> (i));
 						out32(GPIO0_TCR, reg);
 					}
 
 					if (gpio_core == GPIO1) {
-						reg = in32(GPIO1_TCR) | (0x80000000 >> (j));
+						reg = in32(GPIO1_TCR) | (0x80000000 >> (i));
 						out32(GPIO1_TCR, reg);
 					}