From: Stefan Roese Date: Fri, 1 Feb 2008 08:38:29 +0000 (+0100) Subject: ppc4xx: Fix ndfc HW ECC byte order X-Git-Tag: v1.3.2-rc1~7^2^2^2~2 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=ff02f139804f3cb61414f7bbcbfdaa0279e3efae;p=u-boot ppc4xx: Fix ndfc HW ECC byte order The current ndfc HW ECC implementation swaps the first two ECC bytes. But the 4xx NDFC already uses the SMC (Smart Media Card) ECC ordering, so this swapping in the HW ECC driver is bogus. This patch fixes this problem and now really uses the SMC ECC byte order. Thanks to Sean MacLennan for pointing this out. Signed-off-by: Stefan Roese --- diff --git a/cpu/ppc4xx/ndfc.c b/cpu/ppc4xx/ndfc.c index ec1b38cffa..9e2229daf9 100644 --- a/cpu/ppc4xx/ndfc.c +++ b/cpu/ppc4xx/ndfc.c @@ -121,8 +121,8 @@ static int ndfc_calculate_ecc(struct mtd_info *mtdinfo, /* The NDFC uses Smart Media (SMC) bytes order */ - ecc_code[0] = p[2]; - ecc_code[1] = p[1]; + ecc_code[0] = p[1]; + ecc_code[1] = p[2]; ecc_code[2] = p[3]; return 0;