From: rtel Date: Mon, 25 Apr 2016 12:03:47 +0000 (+0000) Subject: Remove obsolete MPU demos. X-Git-Tag: V9.0.0~13 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=ffbb863873d5aa4082ef7691c26c6702ae0939cb;p=freertos Remove obsolete MPU demos. Separate the MPU wrappers into their own file so they can be used from future MPU ports. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2450 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- diff --git a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/FreeRTOSConfig.h deleted file mode 100644 index 531f4f5e0..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/FreeRTOSConfig.h +++ /dev/null @@ -1,137 +0,0 @@ -/* - FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. - * - * See http://www.freertos.org/a00110.html. - *----------------------------------------------------------*/ - -#define configUSE_PREEMPTION 1 -#define configUSE_IDLE_HOOK 1 -#define configUSE_TICK_HOOK 1 -#define configCPU_CLOCK_HZ ( ( unsigned long ) 50000000 ) -#define configTICK_RATE_HZ ( ( TickType_t ) 1000 ) -#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 100 ) -#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 2560 ) ) -#define configMAX_TASK_NAME_LEN ( 12 ) -#define configUSE_TRACE_FACILITY 0 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 0 -#define configUSE_CO_ROUTINES 0 -#define configUSE_MUTEXES 0 -#define configUSE_COUNTING_SEMAPHORES 0 -#define configCHECK_FOR_STACK_OVERFLOW 0 -#define configUSE_RECURSIVE_MUTEXES 0 -#define configQUEUE_REGISTRY_SIZE 0 -#define configGENERATE_RUN_TIME_STATS 0 -#define configUSE_MALLOC_FAILED_HOOK 1 - -#define configMAX_PRIORITIES ( 5 ) -#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) - -/* Set the following definitions to 1 to include the API function, or zero -to exclude the API function. */ - -#define INCLUDE_vTaskPrioritySet 0 -#define INCLUDE_uxTaskPriorityGet 0 -#define INCLUDE_vTaskDelete 1 -#define INCLUDE_vTaskCleanUpResources 0 -#define INCLUDE_vTaskSuspend 0 -#define INCLUDE_vTaskDelayUntil 0 -#define INCLUDE_vTaskDelay 0 -#define INCLUDE_uxTaskGetStackHighWaterMark 0 - -#ifdef __NVIC_PRIO_BITS - #define configPRIO_BITS __NVIC_PRIO_BITS -#else - #define configPRIO_BITS 3 -#endif -#define configUNUSED_PRIO_BITS ( ( unsigned char ) ( 8 - configPRIO_BITS ) ) - -#define configKERNEL_INTERRUPT_PRIORITY ( ( unsigned char ) 7 << configUNUSED_PRIO_BITS ) /* Priority 7, or 255 as only the top three bits are implemented. This is the lowest priority. */ -/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! -See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ -#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( ( unsigned char ) 5 << configUNUSED_PRIO_BITS ) /* Priority 5, or 160 as only the top three bits are implemented. */ - -/* The debug_printf() function uses RAM that is outside of the control of the -application writer. Therefore the application_defined_privileged_functions.h -header file is used to provide a version that executes with privileges. */ -#define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 1 - -#endif /* FREERTOS_CONFIG_H */ diff --git a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/LM3S_Startup.s b/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/LM3S_Startup.s deleted file mode 100644 index cbf6ecf8c..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/LM3S_Startup.s +++ /dev/null @@ -1,196 +0,0 @@ -/***************************************************************************** - * Copyright (c) 2006 Rowley Associates Limited. * - * * - * This file may be distributed under the terms of the License Agreement * - * provided with this software. * - * * - * THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE * - * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. * - *****************************************************************************/ - -/***************************************************************************** - * Preprocessor Definitions - * ------------------------ - * - * STARTUP_FROM_RESET - * - * If defined, the program will startup from power-on/reset. If not defined - * the program will just loop endlessly from power-on/reset. - * - * This definition is not defined by default on this target because the - * debugger is unable to reset this target and maintain control of it over the - * JTAG interface. The advantage of doing this is that it allows the debugger - * to reset the CPU and run programs from a known reset CPU state on each run. - * It also acts as a safety net if you accidently download a program in FLASH - * that crashes and prevents the debugger from taking control over JTAG - * rendering the target unusable over JTAG. The obvious disadvantage of doing - * this is that your application will not startup without the debugger. - * - * We advise that on this target you keep STARTUP_FROM_RESET undefined whilst - * you are developing and only define STARTUP_FROM_RESET when development is - * complete. - * - *****************************************************************************/ - -.extern xPortPendSVHandler -.extern xPortSysTickHandler -.extern vPortSVCHandler - -.global reset_handler - -.macro DEFAULT_ISR_HANDLER name= - .thumb_func - .weak \name -\name: -1: b 1b /* endless loop */ -.endm - - .section .vectors, "ax" - .code 16 - .align 0 - .global _vectors - -_vectors: - .word __stack_end__ -#ifdef STARTUP_FROM_RESET - .word reset_handler -#else - .word reset_wait -#endif /* STARTUP_FROM_RESET */ - .word Nmi_ISR - .word Fault_ISR - .word MPU_Fault_ISR - .word 0 /* Populate if using Bus fault */ - .word 0 /* Populate if using Usage fault */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word vPortSVCHandler - .word 0 /* Populate if using a debug monitor */ - .word 0 /* Reserved */ - .word xPortPendSVHandler - .word xPortSysTickHandler - .word GPIO_Port_A_ISR - .word GPIO_Port_B_ISR - .word GPIO_Port_C_ISR - .word GPIO_Port_D_ISR - .word GPIO_Port_E_ISR - .word UART0_ISR - .word UART1_ISR - .word SSI_ISR - .word I2C_ISR - .word PWM_Fault_ISR - .word PWM_Generator_0_ISR - .word PWM_Generator_1_ISR - .word PWM_Generator_2_ISR - .word QEI_ISR - .word ADC_Sequence_0_ISR - .word ADC_Sequence_1_ISR - .word ADC_Sequence_2_ISR - .word ADC_Sequence_3_ISR - .word Watchdog_Timer_ISR - .word Timer0A_ISR - .word Timer0B_ISR - .word Timer1A_ISR - .word Timer1B_ISR - .word Timer2A_ISR - .word Timer2B_ISR - .word Analog_Comparator_0_ISR - .word Analog_Comparator_1_ISR - .word Analog_Comparator_2_ISR - .word System_Control_ISR - .word FLASH_Control_ISR - .word GPIO_Port_F_ISR - .word GPIO_Port_G_ISR - .word GPIO_Port_H_ISR - .word UART2_ISR - .word SSI1_ISR - .word Timer3A_ISR - .word Timer3B_ISR - .word I2C1_ISR - .word QEI1_ISR - .word CAN0_ISR - .word CAN1_ISR - .word CAN2_ISR - .word EMAC_ISR - .word HIBERNATE_ISR - .word USB0_ISR - .word PWM_Generator_3_ISR - .word uDMA_Software_Transfer_ISR - .word uDMA_Error_ISR -_vectors_end: - - .section .init, "ax" - .thumb_func - -reset_handler: -#ifdef __RAM_BUILD - /* If this is a RAM build, configure vector table offset register to point - to the RAM vector table. */ - ldr r0, =0xE000ED08 - ldr r1, =_vectors - str r1, [r0] -#endif - b _start - -DEFAULT_ISR_HANDLER Nmi_ISR -/*DEFAULT_ISR_HANDLER Fault_ISR*/ -/*DEFAULT_ISR_HANDLER MPU_Fault_ISR*/ -DEFAULT_ISR_HANDLER SVCall_ISR -DEFAULT_ISR_HANDLER SysTick_ISR -DEFAULT_ISR_HANDLER PendSV_ISR -DEFAULT_ISR_HANDLER GPIO_Port_A_ISR -DEFAULT_ISR_HANDLER GPIO_Port_B_ISR -DEFAULT_ISR_HANDLER GPIO_Port_C_ISR -DEFAULT_ISR_HANDLER GPIO_Port_D_ISR -DEFAULT_ISR_HANDLER GPIO_Port_E_ISR -DEFAULT_ISR_HANDLER UART0_ISR -DEFAULT_ISR_HANDLER UART1_ISR -DEFAULT_ISR_HANDLER SSI_ISR -DEFAULT_ISR_HANDLER I2C_ISR -DEFAULT_ISR_HANDLER PWM_Fault_ISR -DEFAULT_ISR_HANDLER PWM_Generator_0_ISR -DEFAULT_ISR_HANDLER PWM_Generator_1_ISR -DEFAULT_ISR_HANDLER PWM_Generator_2_ISR -DEFAULT_ISR_HANDLER QEI_ISR -DEFAULT_ISR_HANDLER ADC_Sequence_0_ISR -DEFAULT_ISR_HANDLER ADC_Sequence_1_ISR -DEFAULT_ISR_HANDLER ADC_Sequence_2_ISR -DEFAULT_ISR_HANDLER ADC_Sequence_3_ISR -DEFAULT_ISR_HANDLER Watchdog_Timer_ISR -DEFAULT_ISR_HANDLER Timer0A_ISR -DEFAULT_ISR_HANDLER Timer0B_ISR -DEFAULT_ISR_HANDLER Timer1A_ISR -DEFAULT_ISR_HANDLER Timer1B_ISR -DEFAULT_ISR_HANDLER Timer2A_ISR -DEFAULT_ISR_HANDLER Timer2B_ISR -DEFAULT_ISR_HANDLER Analog_Comparator_0_ISR -DEFAULT_ISR_HANDLER Analog_Comparator_1_ISR -DEFAULT_ISR_HANDLER Analog_Comparator_2_ISR -DEFAULT_ISR_HANDLER System_Control_ISR -DEFAULT_ISR_HANDLER FLASH_Control_ISR -DEFAULT_ISR_HANDLER GPIO_Port_F_ISR -DEFAULT_ISR_HANDLER GPIO_Port_G_ISR -DEFAULT_ISR_HANDLER GPIO_Port_H_ISR -DEFAULT_ISR_HANDLER UART2_ISR -DEFAULT_ISR_HANDLER SSI1_ISR -DEFAULT_ISR_HANDLER Timer3A_ISR -DEFAULT_ISR_HANDLER Timer3B_ISR -DEFAULT_ISR_HANDLER I2C1_ISR -DEFAULT_ISR_HANDLER QEI1_ISR -DEFAULT_ISR_HANDLER CAN0_ISR -DEFAULT_ISR_HANDLER CAN1_ISR -DEFAULT_ISR_HANDLER CAN2_ISR -DEFAULT_ISR_HANDLER ETHERNET_ISR -DEFAULT_ISR_HANDLER HIBERNATE_ISR -DEFAULT_ISR_HANDLER USB0_ISR -DEFAULT_ISR_HANDLER PWM_Generator_3_ISR -DEFAULT_ISR_HANDLER uDMA_Software_Transfer_ISR -DEFAULT_ISR_HANDLER uDMA_Error_ISR -DEFAULT_ISR_HANDLER EMAC_ISR - -#ifndef STARTUP_FROM_RESET -DEFAULT_ISR_HANDLER reset_wait -#endif /* STARTUP_FROM_RESET */ - diff --git a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/LM3S_Target.js b/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/LM3S_Target.js deleted file mode 100644 index 55a9c2c7c..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/LM3S_Target.js +++ /dev/null @@ -1,28 +0,0 @@ -/****************************************************************************** - Target Script for LM3S. - - Copyright (c) 2006 Rowley Associates Limited. - - This file may be distributed under the terms of the License Agreement - provided with this software. - - THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE - WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - ******************************************************************************/ - -function Reset() -{ - TargetInterface.resetAndStop(1000); -} - -function RAMReset() -{ - Reset(); -} - -function FLASHReset() -{ - Reset(); -} - - diff --git a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/RTOSDemo.hzp b/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/RTOSDemo.hzp deleted file mode 100644 index 646bbdf5a..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/RTOSDemo.hzp +++ /dev/null @@ -1,52 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/RTOSDemo.hzs b/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/RTOSDemo.hzs deleted file mode 100644 index 6086e553a..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/RTOSDemo.hzs +++ /dev/null @@ -1,60 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/ReadMe.txt b/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/ReadMe.txt new file mode 100644 index 000000000..ad84b2770 --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/ReadMe.txt @@ -0,0 +1,3 @@ +If you need the demo that used to be in this directory then download FreeRTOS V8.2.3 +from http://sourceforge.net/projects/freertos/files/FreeRTOS/ + diff --git a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/application_defined_privileged_functions.h b/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/application_defined_privileged_functions.h deleted file mode 100644 index 9c8e7cab2..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/application_defined_privileged_functions.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS_H -#define APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS_H - -/* The Rowley library function debug_printf() uses data that is out of the -control of the kernel, so run the function in a privileged mode. */ -int MPU_debug_printf( const char *pcMessage ) -{ -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - debug_printf( pcMessage ); - - portRESET_PRIVILEGE( xRunningPrivileged ); - - return 0; -} - -#endif /* APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS_H */ diff --git a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/flash_placement.xml b/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/flash_placement.xml deleted file mode 100644 index 800479d00..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/flash_placement.xml +++ /dev/null @@ -1,24 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/main.c b/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/main.c deleted file mode 100644 index adce9251c..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/main.c +++ /dev/null @@ -1,990 +0,0 @@ -/* - FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - - -/* - * This file demonstrates the use of FreeRTOS-MPU. It creates tasks in both - * User mode and Privileged mode, and using both the original xTaskCreate() and - * the new xTaskCreateRestricted() API functions. The purpose of each created - * task is documented in the comments above the task function prototype (in - * this file), with the task behaviour demonstrated and documented within the - * task function itself. In addition a queue is used to demonstrate passing - * data between protected/restricted tasks as well as passing data between an - * interrupt and a protected/restricted task. - */ - - - -/* Standard includes. */ -#include -#include <__cross_studio_io.h> - -/* Scheduler includes. */ -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" -#include "semphr.h" - -/* Hardware library includes. */ -#include "hw_types.h" -#include "hw_sysctl.h" -#include "sysctl.h" - -/*-----------------------------------------------------------*/ - -/* Misc constants. */ -#define mainDONT_BLOCK ( 0 ) - -/* Definitions for the messages that can be sent to the check task. */ -#define mainREG_TEST_1_STILL_EXECUTING ( 0 ) -#define mainREG_TEST_2_STILL_EXECUTING ( 1 ) -#define mainPRINT_SYSTEM_STATUS ( 2 ) - -/* GCC specifics. */ -#define mainALIGN_TO( x ) __attribute__((aligned(x))) - - -/*-----------------------------------------------------------*/ -/* Prototypes for functions that implement tasks. -----------*/ -/*-----------------------------------------------------------*/ - -/* - * Prototype for the reg test tasks. Amongst other things, these fill the CPU - * registers with known values before checking that the registers still contain - * the expected values. Each of the two tasks use different values so an error - * in the context switch mechanism can be caught. Both reg test tasks execute - * at the idle priority so will get preempted regularly. Each task repeatedly - * sends a message on a queue so long as it remains functioning correctly. If - * an error is detected within the task the task is simply deleted. - */ -static void prvRegTest1Task( void *pvParameters ); -static void prvRegTest2Task( void *pvParameters ); - -/* - * Prototype for the check task. The check task demonstrates various features - * of the MPU before entering a loop where it waits for messages to arrive on a - * queue. - * - * Two types of messages can be processes: - * - * 1) "I'm Alive" messages sent from the reg test tasks, indicating that the - * task is still operational. - * - * 2) "Print Status commands" sent periodically by the tick hook function (and - * therefore from within an interrupt) which command the check task to write - * either pass or fail to the terminal, depending on the status of the reg - * test tasks. - */ -static void prvCheckTask( void *pvParameters ); - -/* - * Prototype for a task created in User mode using the original vTaskCreate() - * API function. The task demonstrates the characteristics of such a task, - * before simply deleting itself. - */ -static void prvOldStyleUserModeTask( void *pvParameters ); - -/* - * Prototype for a task created in Privileged mode using the original - * vTaskCreate() API function. The task demonstrates the characteristics of - * such a task, before simply deleting itself. - */ -static void prvOldStylePrivilegedModeTask( void *pvParameters ); - - -/*-----------------------------------------------------------*/ -/* Prototypes for other misc functions. --------------------*/ -/*-----------------------------------------------------------*/ - -/* - * Just configures any clocks and IO necessary. - */ -static void prvSetupHardware( void ); - -/* - * Simply deletes the calling task. The function is provided only because it - * is simpler to call from asm code than the normal vTaskDelete() API function. - * It has the noinline attribute because it is called from asm code. - */ -static void prvDeleteMe( void ) __attribute__((noinline)); - -/* - * Used by both reg test tasks to send messages to the check task. The message - * just lets the check task know that the task is still functioning correctly. - * If a reg test task detects an error it will delete itself, and in so doing - * prevent itself from sending any more 'I'm Alive' messages to the check task. - */ -static void prvSendImAlive( QueueHandle_t xHandle, unsigned long ulTaskNumber ); - -/* - * The check task is created with access to three memory regions (plus its - * stack). Each memory region is configured with different parameters and - * prvTestMemoryRegions() demonstrates what can and cannot be accessed for each - * region. prvTestMemoryRegions() also demonstrates a task that was created - * as a privileged task settings its own privilege level down to that of a user - * task. - */ -static void prvTestMemoryRegions( void ); - -/*-----------------------------------------------------------*/ - -/* The handle of the queue used to communicate between tasks and between tasks -and interrupts. Note that this is a file scope variable that falls outside of -any MPU region. As such other techniques have to be used to allow the tasks -to gain access to the queue. See the comments in the tasks themselves for -further information. */ -static QueueHandle_t xFileScopeCheckQueue = NULL; - - -/*-----------------------------------------------------------*/ -/* Data used by the 'check' task. ---------------------------*/ -/*-----------------------------------------------------------*/ - -/* Define the constants used to allocate the check task stack. Note that the -stack size is defined in words, not bytes. */ -#define mainCHECK_TASK_STACK_SIZE_WORDS 128 -#define mainCHECK_TASK_STACK_ALIGNMENT ( mainCHECK_TASK_STACK_SIZE_WORDS * sizeof( portSTACK_TYPE ) ) - -/* Declare the stack that will be used by the check task. The kernel will - automatically create an MPU region for the stack. The stack alignment must - match its size, so if 128 words are reserved for the stack then it must be - aligned to ( 128 * 4 ) bytes. */ -static portSTACK_TYPE xCheckTaskStack[ mainCHECK_TASK_STACK_SIZE_WORDS ] mainALIGN_TO( mainCHECK_TASK_STACK_ALIGNMENT ); - -/* Declare three arrays - an MPU region will be created for each array -using the TaskParameters_t structure below. THIS IS JUST TO DEMONSTRATE THE -MPU FUNCTIONALITY, the data is not used by the check tasks primary function -of monitoring the reg test tasks and printing out status information. - -Note that the arrays allocate slightly more RAM than is actually assigned to -the MPU region. This is to permit writes off the end of the array to be -detected even when the arrays are placed in adjacent memory locations (with no -gaps between them). The align size must be a power of two. */ -#define mainREAD_WRITE_ARRAY_SIZE 130 -#define mainREAD_WRITE_ALIGN_SIZE 128 -char cReadWriteArray[ mainREAD_WRITE_ARRAY_SIZE ] mainALIGN_TO( mainREAD_WRITE_ALIGN_SIZE ); - -#define mainREAD_ONLY_ARRAY_SIZE 260 -#define mainREAD_ONLY_ALIGN_SIZE 256 -char cReadOnlyArray[ mainREAD_ONLY_ARRAY_SIZE ] mainALIGN_TO( mainREAD_ONLY_ALIGN_SIZE ); - -#define mainPRIVILEGED_ONLY_ACCESS_ARRAY_SIZE 130 -#define mainPRIVILEGED_ONLY_ACCESS_ALIGN_SIZE 128 -char cPrivilegedOnlyAccessArray[ mainPRIVILEGED_ONLY_ACCESS_ALIGN_SIZE ] mainALIGN_TO( mainPRIVILEGED_ONLY_ACCESS_ALIGN_SIZE ); - -/* Fill in a TaskParameters_t structure to define the check task - this is the -structure passed to the xTaskCreateRestricted() function. */ -static const TaskParameters_t xCheckTaskParameters = -{ - prvCheckTask, /* pvTaskCode - the function that implements the task. */ - "Check", /* pcName */ - mainCHECK_TASK_STACK_SIZE_WORDS, /* usStackDepth - defined in words, not bytes. */ - ( void * ) 0x12121212, /* pvParameters - this value is just to test that the parameter is being passed into the task correctly. */ - ( tskIDLE_PRIORITY + 1 ) | portPRIVILEGE_BIT,/* uxPriority - this is the highest priority task in the system. The task is created in privileged mode to demonstrate accessing the privileged only data. */ - xCheckTaskStack, /* puxStackBuffer - the array to use as the task stack, as declared above. */ - - /* xRegions - In this case the xRegions array is used to create MPU regions - for all three of the arrays declared directly above. Each MPU region is - created with different parameters. Again, THIS IS JUST TO DEMONSTRATE THE - MPU FUNCTIONALITY, the data is not used by the check tasks primary function - of monitoring the reg test tasks and printing out status information.*/ - { - /* Base address Length Parameters */ - { cReadWriteArray, mainREAD_WRITE_ALIGN_SIZE, portMPU_REGION_READ_WRITE }, - { cReadOnlyArray, mainREAD_ONLY_ALIGN_SIZE, portMPU_REGION_READ_ONLY }, - { cPrivilegedOnlyAccessArray, mainPRIVILEGED_ONLY_ACCESS_ALIGN_SIZE, portMPU_REGION_PRIVILEGED_READ_WRITE } - } -}; - - - -/*-----------------------------------------------------------*/ -/* Data used by the 'reg test' tasks. -----------------------*/ -/*-----------------------------------------------------------*/ - -/* Define the constants used to allocate the reg test task stacks. Note that -that stack size is defined in words, not bytes. */ -#define mainREG_TEST_STACK_SIZE_WORDS 128 -#define mainREG_TEST_STACK_ALIGNMENT ( mainREG_TEST_STACK_SIZE_WORDS * sizeof( portSTACK_TYPE ) ) - -/* Declare the stacks that will be used by the reg test tasks. The kernel will -automatically create an MPU region for the stack. The stack alignment must -match its size, so if 128 words are reserved for the stack then it must be -aligned to ( 128 * 4 ) bytes. */ -static portSTACK_TYPE xRegTest1Stack[ mainREG_TEST_STACK_SIZE_WORDS ] mainALIGN_TO( mainREG_TEST_STACK_ALIGNMENT ); -static portSTACK_TYPE xRegTest2Stack[ mainREG_TEST_STACK_SIZE_WORDS ] mainALIGN_TO( mainREG_TEST_STACK_ALIGNMENT ); - -/* Fill in a TaskParameters_t structure per reg test task to define the tasks. */ -static const TaskParameters_t xRegTest1Parameters = -{ - prvRegTest1Task, /* pvTaskCode - the function that implements the task. */ - "RegTest1", /* pcName */ - mainREG_TEST_STACK_SIZE_WORDS, /* usStackDepth */ - ( void * ) 0x12345678, /* pvParameters - this value is just to test that the parameter is being passed into the task correctly. */ - tskIDLE_PRIORITY | portPRIVILEGE_BIT, /* uxPriority - note that this task is created with privileges to demonstrate one method of passing a queue handle into the task. */ - xRegTest1Stack, /* puxStackBuffer - the array to use as the task stack, as declared above. */ - { /* xRegions - this task does not use any non-stack data hence all members are zero. */ - /* Base address Length Parameters */ - { 0x00, 0x00, 0x00 }, - { 0x00, 0x00, 0x00 }, - { 0x00, 0x00, 0x00 } - } -}; -/*-----------------------------------------------------------*/ - -static TaskParameters_t xRegTest2Parameters = -{ - prvRegTest2Task, /* pvTaskCode - the function that implements the task. */ - "RegTest2", /* pcName */ - mainREG_TEST_STACK_SIZE_WORDS, /* usStackDepth */ - ( void * ) NULL, /* pvParameters - this task uses the parameter to pass in a queue handle, but the queue is not created yet. */ - tskIDLE_PRIORITY, /* uxPriority */ - xRegTest2Stack, /* puxStackBuffer - the array to use as the task stack, as declared above. */ - { /* xRegions - this task does not use any non-stack data hence all members are zero. */ - /* Base address Length Parameters */ - { 0x00, 0x00, 0x00 }, - { 0x00, 0x00, 0x00 }, - { 0x00, 0x00, 0x00 } - } -}; - -/*-----------------------------------------------------------*/ - -int main( void ) -{ - prvSetupHardware(); - - /* Create the queue used to pass "I'm alive" messages to the check task. */ - xFileScopeCheckQueue = xQueueCreate( 1, sizeof( unsigned long ) ); - - /* One check task uses the task parameter to receive the queue handle. - This allows the file scope variable to be accessed from within the task. - The pvParameters member of xRegTest2Parameters can only be set after the - queue has been created so is set here. */ - xRegTest2Parameters.pvParameters = xFileScopeCheckQueue; - - /* Create the three test tasks. Handles to the created tasks are not - required, hence the second parameter is NULL. */ - xTaskCreateRestricted( &xRegTest1Parameters, NULL ); - xTaskCreateRestricted( &xRegTest2Parameters, NULL ); - xTaskCreateRestricted( &xCheckTaskParameters, NULL ); - - /* Create the tasks that are created using the original xTaskCreate() API - function. */ - xTaskCreate( prvOldStyleUserModeTask, /* The function that implements the task. */ - "Task1", /* Text name for the task. */ - 100, /* Stack depth in words. */ - NULL, /* Task parameters. */ - 3, /* Priority and mode (user in this case). */ - NULL /* Handle. */ - ); - - xTaskCreate( prvOldStylePrivilegedModeTask, /* The function that implements the task. */ - "Task2", /* Text name for the task. */ - 100, /* Stack depth in words. */ - NULL, /* Task parameters. */ - ( 3 | portPRIVILEGE_BIT ), /* Priority and mode. */ - NULL /* Handle. */ - ); - - /* Start the scheduler. */ - vTaskStartScheduler(); - - /* Will only get here if there was insufficient memory to create the idle - task. */ - for( ;; ); - return 0; -} -/*-----------------------------------------------------------*/ - -static void prvCheckTask( void *pvParameters ) -{ -/* This task is created in privileged mode so can access the file scope -queue variable. Take a stack copy of this before the task is set into user -mode. Once that task is in user mode the file scope queue variable will no -longer be accessible but the stack copy will. */ -QueueHandle_t xQueue = xFileScopeCheckQueue; -long lMessage; -unsigned long ulStillAliveCounts[ 2 ] = { 0 }; -const char *pcStatusMessage = "PASS\r\n"; - -/* The debug_printf() function uses RAM that is outside of the control of the -application writer. Therefore the application_defined_privileged_functions.h -header file is used to provide a version that executes with privileges. */ -extern int MPU_debug_printf( const char *pcMessage ); - - /* Just to remove compiler warning. */ - ( void ) pvParameters; - - /* Demonstrate how the various memory regions can and can't be accessed. - The task privilege level is set down to user mode within this function. */ - prvTestMemoryRegions(); - - /* Tests are done so lower the privilege status. */ - portSWITCH_TO_USER_MODE(); - - /* This loop performs the main function of the task, which is blocking - on a message queue then processing each message as it arrives. */ - for( ;; ) - { - /* Wait for the next message to arrive. */ - xQueueReceive( xQueue, &lMessage, portMAX_DELAY ); - - switch( lMessage ) - { - case mainREG_TEST_1_STILL_EXECUTING : - /* Message from task 1, so task 1 must still be executing. */ - ( ulStillAliveCounts[ 0 ] )++; - break; - - case mainREG_TEST_2_STILL_EXECUTING : - /* Message from task 2, so task 2 must still be executing. */ - ( ulStillAliveCounts[ 1 ] )++; - break; - - case mainPRINT_SYSTEM_STATUS : - /* Message from tick hook, time to print out the system - status. If messages has stopped arriving from either reg - test task then the status must be set to fail. */ - if( ( ulStillAliveCounts[ 0 ] == 0 ) || ( ulStillAliveCounts[ 1 ] == 0 ) ) - { - /* One or both of the test tasks are no longer sending - 'still alive' messages. */ - pcStatusMessage = "FAIL\r\n"; - } - - /* Print a pass/fail message to the terminal. This will be - visible in the CrossWorks IDE. */ - MPU_debug_printf( pcStatusMessage ); - - /* Reset the count of 'still alive' messages. */ - memset( ulStillAliveCounts, 0x00, sizeof( ulStillAliveCounts ) ); - break; - - default : - /* Something unexpected happened. Delete this task so the - error is apparent (no output will be displayed). */ - prvDeleteMe(); - break; - } - } -} -/*-----------------------------------------------------------*/ - -static void prvTestMemoryRegions( void ) -{ -long l; -char cTemp; - - /* The check task (from which this function is called) is created in the - Privileged mode. The privileged array can be both read from and written - to while this task is privileged. */ - cPrivilegedOnlyAccessArray[ 0 ] = 'a'; - if( cPrivilegedOnlyAccessArray[ 0 ] != 'a' ) - { - /* Something unexpected happened. Delete this task so the error is - apparent (no output will be displayed). */ - prvDeleteMe(); - } - - /* Writing off the end of the RAM allocated to this task will *NOT* cause a - protection fault because the task is still executing in a privileged mode. - Uncomment the following to test. */ - /*cPrivilegedOnlyAccessArray[ mainPRIVILEGED_ONLY_ACCESS_ALIGN_SIZE ] = 'a';*/ - - /* Now set the task into user mode. */ - portSWITCH_TO_USER_MODE(); - - /* Accessing the privileged only array will now cause a fault. Uncomment - the following line to test. */ - /*cPrivilegedOnlyAccessArray[ 0 ] = 'a';*/ - - /* The read/write array can still be successfully read and written. */ - for( l = 0; l < mainREAD_WRITE_ALIGN_SIZE; l++ ) - { - cReadWriteArray[ l ] = 'a'; - if( cReadWriteArray[ l ] != 'a' ) - { - /* Something unexpected happened. Delete this task so the error is - apparent (no output will be displayed). */ - prvDeleteMe(); - } - } - - /* But attempting to read or write off the end of the RAM allocated to this - task will cause a fault. Uncomment either of the following two lines to - test. */ - /* cReadWriteArray[ 0 ] = cReadWriteArray[ -1 ]; */ - /* cReadWriteArray[ mainREAD_WRITE_ALIGN_SIZE ] = 0x00; */ - - /* The read only array can be successfully read... */ - for( l = 0; l < mainREAD_ONLY_ALIGN_SIZE; l++ ) - { - cTemp = cReadOnlyArray[ l ]; - } - - /* ...but cannot be written. Uncomment the following line to test. */ - /* cReadOnlyArray[ 0 ] = 'a'; */ - - /* Writing to the first and last locations in the stack array should not - cause a protection fault. Note that doing this will cause the kernel to - detect a stack overflow if configCHECK_FOR_STACK_OVERFLOW is greater than - 1. */ - xCheckTaskStack[ 0 ] = 0; - xCheckTaskStack[ mainCHECK_TASK_STACK_SIZE_WORDS - 1 ] = 0; - - /* Writing off either end of the stack array should cause a protection - fault, uncomment either of the following two lines to test. */ - /* xCheckTaskStack[ -1 ] = 0; */ - /* xCheckTaskStack[ mainCHECK_TASK_STACK_SIZE_WORDS ] = 0; */ - - ( void ) cTemp; -} -/*-----------------------------------------------------------*/ - -static void prvRegTest1Task( void *pvParameters ) -{ -/* This task is created in privileged mode so can access the file scope -queue variable. Take a stack copy of this before the task is set into user -mode. Once this task is in user mode the file scope queue variable will no -longer be accessible but the stack copy will. */ -QueueHandle_t xQueue = xFileScopeCheckQueue; - - /* Now the queue handle has been obtained the task can switch to user - mode. This is just one method of passing a handle into a protected - task, the other reg test task uses the task parameter instead. */ - portSWITCH_TO_USER_MODE(); - - /* First check that the parameter value is as expected. */ - if( pvParameters != ( void * ) 0x12345678 ) - { - /* Error detected. Delete the task so it stops communicating with - the check task. */ - prvDeleteMe(); - } - - - for( ;; ) - { - /* This task tests the kernel context switch mechanism by reading and - writing directly to registers - which requires the test to be written - in assembly code. */ - __asm volatile - ( - " MOV R4, #104 \n" /* Set registers to a known value. R0 to R1 are done in the loop below. */ - " MOV R5, #105 \n" - " MOV R6, #106 \n" - " MOV R8, #108 \n" - " MOV R9, #109 \n" - " MOV R10, #110 \n" - " MOV R11, #111 \n" - "reg1loop: \n" - " MOV R0, #100 \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */ - " MOV R1, #101 \n" - " MOV R2, #102 \n" - " MOV R3, #103 \n" - " MOV R12, #112 \n" - " SVC #1 \n" /* Yield just to increase test coverage. */ - " CMP R0, #100 \n" /* Check all the registers still contain their expected values. */ - " BNE prvDeleteMe \n" /* Value was not as expected, delete the task so it stops communicating with the check task. */ - " CMP R1, #101 \n" - " BNE prvDeleteMe \n" - " CMP R2, #102 \n" - " BNE prvDeleteMe \n" - " CMP R3, #103 \n" - " BNE prvDeleteMe \n" - " CMP R4, #104 \n" - " BNE prvDeleteMe \n" - " CMP R5, #105 \n" - " BNE prvDeleteMe \n" - " CMP R6, #106 \n" - " BNE prvDeleteMe \n" - " CMP R8, #108 \n" - " BNE prvDeleteMe \n" - " CMP R9, #109 \n" - " BNE prvDeleteMe \n" - " CMP R10, #110 \n" - " BNE prvDeleteMe \n" - " CMP R11, #111 \n" - " BNE prvDeleteMe \n" - " CMP R12, #112 \n" - " BNE prvDeleteMe \n" - :::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12" - ); - - /* Send mainREG_TEST_1_STILL_EXECUTING to the check task to indicate that this - task is still functioning. */ - prvSendImAlive( xQueue, mainREG_TEST_1_STILL_EXECUTING ); - - /* Go back to check all the register values again. */ - __asm volatile( " B reg1loop " ); - } -} -/*-----------------------------------------------------------*/ - -static void prvRegTest2Task( void *pvParameters ) -{ -/* The queue handle is passed in as the task parameter. This is one method of -passing data into a protected task, the other reg test task uses a different -method. */ -QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters; - - for( ;; ) - { - /* This task tests the kernel context switch mechanism by reading and - writing directly to registers - which requires the test to be written - in assembly code. */ - __asm volatile - ( - " MOV R4, #4 \n" /* Set registers to a known value. R0 to R1 are done in the loop below. */ - " MOV R5, #5 \n" - " MOV R6, #6 \n" - " MOV R8, #8 \n" /* Frame pointer is omitted as it must not be changed. */ - " MOV R9, #9 \n" - " MOV R10, 10 \n" - " MOV R11, #11 \n" - "reg2loop: \n" - " MOV R0, #13 \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */ - " MOV R1, #1 \n" - " MOV R2, #2 \n" - " MOV R3, #3 \n" - " MOV R12, #12 \n" - " CMP R0, #13 \n" /* Check all the registers still contain their expected values. */ - " BNE prvDeleteMe \n" /* Value was not as expected, delete the task so it stops communicating with the check task */ - " CMP R1, #1 \n" - " BNE prvDeleteMe \n" - " CMP R2, #2 \n" - " BNE prvDeleteMe \n" - " CMP R3, #3 \n" - " BNE prvDeleteMe \n" - " CMP R4, #4 \n" - " BNE prvDeleteMe \n" - " CMP R5, #5 \n" - " BNE prvDeleteMe \n" - " CMP R6, #6 \n" - " BNE prvDeleteMe \n" - " CMP R8, #8 \n" - " BNE prvDeleteMe \n" - " CMP R9, #9 \n" - " BNE prvDeleteMe \n" - " CMP R10, #10 \n" - " BNE prvDeleteMe \n" - " CMP R11, #11 \n" - " BNE prvDeleteMe \n" - " CMP R12, #12 \n" - " BNE prvDeleteMe \n" - :::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12" - ); - - /* Send mainREG_TEST_2_STILL_EXECUTING to the check task to indicate that this - task is still functioning. */ - prvSendImAlive( xQueue, mainREG_TEST_2_STILL_EXECUTING ); - - /* Go back to check all the register values again. */ - __asm volatile( " B reg2loop " ); - } -} -/*-----------------------------------------------------------*/ - -void vApplicationIdleHook( void ) -{ -extern unsigned long __SRAM_segment_end__[]; -extern unsigned long __privileged_data_start__[]; -extern unsigned long __privileged_data_end__[]; -extern unsigned long __FLASH_segment_start__[]; -extern unsigned long __FLASH_segment_end__[]; -volatile unsigned long *pul; -volatile unsigned long ulReadData; - - /* The idle task, and therefore this function, run in Supervisor mode and - can therefore access all memory. Try reading from corners of flash and - RAM to ensure a memory fault does not occur. - - Start with the edges of the privileged data area. */ - pul = __privileged_data_start__; - ulReadData = *pul; - pul = __privileged_data_end__ - 1; - ulReadData = *pul; - - /* Next the standard SRAM area. */ - pul = __SRAM_segment_end__ - 1; - ulReadData = *pul; - - /* And the standard Flash area - the start of which is marked for - privileged access only. */ - pul = __FLASH_segment_start__; - ulReadData = *pul; - pul = __FLASH_segment_end__ - 1; - ulReadData = *pul; - - /* Reading off the end of Flash or SRAM space should cause a fault. - Uncomment one of the following two pairs of lines to test. */ - - /* pul = __FLASH_segment_end__ + 4; - ulReadData = *pul; */ - - /* pul = __SRAM_segment_end__ + 1; - ulReadData = *pul; */ - - ( void ) ulReadData; -} -/*-----------------------------------------------------------*/ - -static void prvOldStyleUserModeTask( void *pvParameters ) -{ -extern unsigned long __privileged_data_start__[]; -extern unsigned long __privileged_data_end__[]; -extern unsigned long __SRAM_segment_end__[]; -extern unsigned long __privileged_functions_end__[]; -extern unsigned long __FLASH_segment_start__[]; -extern unsigned long __FLASH_segment_end__[]; -const volatile unsigned long *pulStandardPeripheralRegister = ( volatile unsigned long * ) 0x400FC0C4; /* PCONP */ -volatile unsigned long *pul; -volatile unsigned long ulReadData; - -/* The following lines are commented out to prevent the unused variable -compiler warnings when the tests that use the variable are also commented out. -extern unsigned long __privileged_functions_start__[]; -const volatile unsigned long *pulSystemPeripheralRegister = ( volatile unsigned long * ) 0xe000e014; */ - - ( void ) pvParameters; - - /* This task is created in User mode using the original xTaskCreate() API - function. It should have access to all Flash and RAM except that marked - as Privileged access only. Reading from the start and end of the non- - privileged RAM should not cause a problem (the privileged RAM is the first - block at the bottom of the RAM memory). */ - pul = __privileged_data_end__ + 1; - ulReadData = *pul; - pul = __SRAM_segment_end__ - 1; - ulReadData = *pul; - - /* Likewise reading from the start and end of the non-privileged Flash - should not be a problem (the privileged Flash is the first block at the - bottom of the Flash memory). */ - pul = __privileged_functions_end__ + 1; - ulReadData = *pul; - pul = __FLASH_segment_end__ - 1; - ulReadData = *pul; - - /* Standard peripherals are accessible. */ - ulReadData = *pulStandardPeripheralRegister; - - /* System peripherals are not accessible. Uncomment the following line - to test. Also uncomment the declaration of pulSystemPeripheralRegister - at the top of this function. */ - /* ulReadData = *pulSystemPeripheralRegister; */ - - /* Reading from anywhere inside the privileged Flash or RAM should cause a - fault. This can be tested by uncommenting any of the following pairs of - lines. Also uncomment the declaration of __privileged_functions_start__ - at the top of this function. */ - - /* pul = __privileged_functions_start__; - ulReadData = *pul; */ - - /* pul = __privileged_functions_end__ - 1; - ulReadData = *pul; */ - - /* pul = __privileged_data_start__; - ulReadData = *pul; */ - - /* pul = __privileged_data_end__ - 1; - ulReadData = *pul; */ - - /* Must not just run off the end of a task function, so delete this task. - Note that because this task was created using xTaskCreate() the stack was - allocated dynamically and I have not included any code to free it again. */ - vTaskDelete( NULL ); - - ( void ) ulReadData; -} -/*-----------------------------------------------------------*/ - -static void prvOldStylePrivilegedModeTask( void *pvParameters ) -{ -extern unsigned long __privileged_data_start__[]; -extern unsigned long __privileged_data_end__[]; -extern unsigned long __SRAM_segment_end__[]; -extern unsigned long __privileged_functions_start__[]; -extern unsigned long __privileged_functions_end__[]; -extern unsigned long __FLASH_segment_start__[]; -extern unsigned long __FLASH_segment_end__[]; -volatile unsigned long *pul; -volatile unsigned long ulReadData; -const volatile unsigned long *pulSystemPeripheralRegister = ( volatile unsigned long * ) 0xe000e014; /* Systick */ -const volatile unsigned long *pulStandardPeripheralRegister = ( volatile unsigned long * ) 0x400FC0C4; /* PCONP */ - - ( void ) pvParameters; - - /* This task is created in Privileged mode using the original xTaskCreate() - API function. It should have access to all Flash and RAM including that - marked as Privileged access only. So reading from the start and end of the - non-privileged RAM should not cause a problem (the privileged RAM is the - first block at the bottom of the RAM memory). */ - pul = __privileged_data_end__ + 1; - ulReadData = *pul; - pul = __SRAM_segment_end__ - 1; - ulReadData = *pul; - - /* Likewise reading from the start and end of the non-privileged Flash - should not be a problem (the privileged Flash is the first block at the - bottom of the Flash memory). */ - pul = __privileged_functions_end__ + 1; - ulReadData = *pul; - pul = __FLASH_segment_end__ - 1; - ulReadData = *pul; - - /* Reading from anywhere inside the privileged Flash or RAM should also - not be a problem. */ - pul = __privileged_functions_start__; - ulReadData = *pul; - pul = __privileged_functions_end__ - 1; - ulReadData = *pul; - pul = __privileged_data_start__; - ulReadData = *pul; - pul = __privileged_data_end__ - 1; - ulReadData = *pul; - - /* Finally, accessing both System and normal peripherals should both be - possible. */ - ulReadData = *pulSystemPeripheralRegister; - ulReadData = *pulStandardPeripheralRegister; - - /* Must not just run off the end of a task function, so delete this task. - Note that because this task was created using xTaskCreate() the stack was - allocated dynamically and I have not included any code to free it again. */ - vTaskDelete( NULL ); - - ( void ) ulReadData; -} -/*-----------------------------------------------------------*/ - -static void prvDeleteMe( void ) -{ - vTaskDelete( NULL ); -} -/*-----------------------------------------------------------*/ - -static void prvSendImAlive( QueueHandle_t xHandle, unsigned long ulTaskNumber ) -{ - if( xHandle != NULL ) - { - xQueueSend( xHandle, &ulTaskNumber, mainDONT_BLOCK ); - } -} -/*-----------------------------------------------------------*/ - -static void prvSetupHardware( void ) -{ - /* If running on Rev A2 silicon, turn the LDO voltage up to 2.75V. This is - a workaround to allow the PLL to operate reliably. */ - if( DEVICE_IS_REVA2 ) - { - SysCtlLDOSet( SYSCTL_LDO_2_75V ); - } - - /* Set the clocking to run from the PLL at 50 MHz */ - SysCtlClockSet( SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_8MHZ ); -} -/*-----------------------------------------------------------*/ - -void vApplicationTickHook( void ) -{ -static unsigned long ulCallCount; -const unsigned long ulCallsBetweenSends = 5000 / portTICK_PERIOD_MS; -const unsigned long ulMessage = mainPRINT_SYSTEM_STATUS; -portBASE_TYPE xDummy; - - /* If configUSE_TICK_HOOK is set to 1 then this function will get called - from each RTOS tick. It is called from the tick interrupt and therefore - will be executing in the privileged state. */ - - ulCallCount++; - - /* Is it time to print out the pass/fail message again? */ - if( ulCallCount >= ulCallsBetweenSends ) - { - ulCallCount = 0; - - /* Send a message to the check task to command it to check that all - the tasks are still running then print out the status. - - This is running in an ISR so has to use the "FromISR" version of - xQueueSend(). Because it is in an ISR it is running with privileges - so can access xFileScopeCheckQueue directly. */ - xQueueSendFromISR( xFileScopeCheckQueue, &ulMessage, &xDummy ); - } -} -/*-----------------------------------------------------------*/ - -void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName ) -{ - /* If configCHECK_FOR_STACK_OVERFLOW is set to either 1 or 2 then this - function will automatically get called if a task overflows its stack. */ - ( void ) pxTask; - ( void ) pcTaskName; - for( ;; ); -} -/*-----------------------------------------------------------*/ - -void vApplicationMallocFailedHook( void ) -{ - /* If configUSE_MALLOC_FAILED_HOOK is set to 1 then this function will - be called automatically if a call to pvPortMalloc() fails. pvPortMalloc() - is called automatically when a task, queue or semaphore is created. */ - for( ;; ); -} -/*-----------------------------------------------------------*/ - -/* Just to keep the linker happy. */ -void __error__( char *pcFilename, unsigned long ulLine ) -{ - ( void ) pcFilename; - ( void ) ulLine; - for( ;; ); -} -/*-----------------------------------------------------------*/ - -/* Just to keep the linker happy. */ -int uipprintf( const char *fmt, ... ) -{ - ( void ) fmt; - return( 0 ); -} -/*-----------------------------------------------------------*/ - -void hard_fault_handler(unsigned int * hardfault_args) -{ -volatile unsigned int stacked_r0; -volatile unsigned int stacked_r1; -volatile unsigned int stacked_r2; -volatile unsigned int stacked_r3; -volatile unsigned int stacked_r12; -volatile unsigned int stacked_lr; -volatile unsigned int stacked_pc; -volatile unsigned int stacked_psr; - - stacked_r0 = ((unsigned long) hardfault_args[0]); - stacked_r1 = ((unsigned long) hardfault_args[1]); - stacked_r2 = ((unsigned long) hardfault_args[2]); - stacked_r3 = ((unsigned long) hardfault_args[3]); - - stacked_r12 = ((unsigned long) hardfault_args[4]); - stacked_lr = ((unsigned long) hardfault_args[5]); - stacked_pc = ((unsigned long) hardfault_args[6]); - stacked_psr = ((unsigned long) hardfault_args[7]); - - /* Inspect stacked_pc to locate the offending instruction. */ - for( ;; ); - - ( void ) stacked_psr; - ( void ) stacked_pc; - ( void ) stacked_lr; - ( void ) stacked_r12; - ( void ) stacked_r0; - ( void ) stacked_r1; - ( void ) stacked_r2; - ( void ) stacked_r3; -} -/*-----------------------------------------------------------*/ - -void Fault_ISR( void ) __attribute__((naked)); -void Fault_ISR( void ) -{ - __asm volatile - ( - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - " ldr r1, [r0, #24] \n" - " ldr r2, handler_address_const \n" - " bx r2 \n" - " handler_address_const: .word hard_fault_handler \n" - ); -} -/*-----------------------------------------------------------*/ - -void MPU_Fault_ISR( void ) __attribute__((naked)); -void MPU_Fault_ISR( void ) -{ - __asm volatile - ( - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - " ldr r1, [r0, #24] \n" - " ldr r2, handler_address_const \n" - " bx r2 \n" - " handler2_address_const: .word hard_fault_handler \n" - ); -} -/*-----------------------------------------------------------*/ \ No newline at end of file diff --git a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/thumb_crt0.s b/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/thumb_crt0.s deleted file mode 100644 index 10fc4cd03..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/thumb_crt0.s +++ /dev/null @@ -1,233 +0,0 @@ -/***************************************************************************** - * Copyright (c) 2009 Rowley Associates Limited. * - * * - * This file may be distributed under the terms of the License Agreement * - * provided with this software. * - * * - * THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE * - * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. * - *****************************************************************************/ - -/***************************************************************************** - * Preprocessor Definitions - * ------------------------ - * APP_ENTRY_POINT - * - * Defines the application entry point function, if undefined this setting - * defaults to "main". - * - * USE_PROCESS_STACK - * - * If defined, thread mode will be configured to use the process stack if - * the size of the process stack is greater than zero bytes in length. - * - * INITIALIZE_STACK - * - * If defined, the contents of the stack will be initialized to a the - * value 0xCC. - * - * FULL_LIBRARY - * - * If defined then - * - argc, argv are setup by the debug_getargs. - * - the exit symbol is defined and executes on return from main. - * - the exit symbol calls destructors, atexit functions and then debug_exit. - * - * If not defined then - * - argc and argv are zero. - * - no exit symbol, code loops on return from main. - *****************************************************************************/ - -#ifndef APP_ENTRY_POINT -#define APP_ENTRY_POINT main -#endif - -#ifndef ARGSSPACE -#define ARGSSPACE 128 -#endif - - .global _start - .syntax unified - .extern APP_ENTRY_POINT -#ifdef FULL_LIBRARY - .global exit -#endif - - .section .init, "ax" - .code 16 - .align 2 - .thumb_func - -_start: -#ifdef __RAM_BUILD - ldr r1, =__stack_end__ - mov sp, r1 -#endif -#ifdef INITIALIZE_STACK - mov r2, #0xCC - ldr r0, =__stack_start__ -#ifndef __RAM_BUILD - mov r1, sp -#endif - bl memory_set -#endif - -#ifdef USE_PROCESS_STACK - /* Set up process stack if size > 0 */ - ldr r1, =__stack_process_end__ - ldr r0, =__stack_process_start__ - subs r2, r1, r0 - beq 1f - msr psp, r1 - mov r2, #2 - msr control, r2 -#ifdef INITIALIZE_STACK - mov r2, #0xCC - bl memory_set -#endif -1: -#endif - /* Copy initialised memory sections into RAM (if necessary). */ - ldr r0, =__data_load_start__ - ldr r1, =__data_start__ - ldr r2, =__data_end__ - bl memory_copy - ldr r0, =__text_load_start__ - ldr r1, =__text_start__ - ldr r2, =__text_end__ - bl memory_copy - ldr r0, =__fast_load_start__ - ldr r1, =__fast_start__ - ldr r2, =__fast_end__ - bl memory_copy - ldr r0, =__ctors_load_start__ - ldr r1, =__ctors_start__ - ldr r2, =__ctors_end__ - bl memory_copy - ldr r0, =__dtors_load_start__ - ldr r1, =__dtors_start__ - ldr r2, =__dtors_end__ - bl memory_copy - ldr r0, =__rodata_load_start__ - ldr r1, =__rodata_start__ - ldr r2, =__rodata_end__ - bl memory_copy - - /* Zero the bss. */ - ldr r0, =__bss_start__ - ldr r1, =__bss_end__ - mov r2, #0 - bl memory_set - - /* Zero the privileged data. */ - ldr r0, =__privileged_data_start__ - ldr r1, =__privileged_data_end__ - mov r2, #0 - bl memory_set - - /* Initialise the heap */ - ldr r0, = __heap_start__ - ldr r1, = __heap_end__ - sub r1, r1, r0 - mov r2, #0 - str r2, [r0] - add r0, r0, #4 - str r1, [r0] - - /* Call constructors */ - ldr r0, =__ctors_start__ - ldr r1, =__ctors_end__ -ctor_loop: - cmp r0, r1 - beq ctor_end - ldr r2, [r0] - add r0, #4 - push {r0-r1} - blx r2 - pop {r0-r1} - b ctor_loop -ctor_end: - - /* Setup initial call frame */ - mov r0, #0 - mov lr, r0 - mov r12, sp - -start: - /* Jump to application entry point */ -#ifdef FULL_LIBRARY - mov r0, #ARGSSPACE - ldr r1, =args - ldr r2, =debug_getargs - blx r2 - ldr r1, =args -#else - mov r0, #0 - mov r1, #0 -#endif - ldr r2, =APP_ENTRY_POINT - blx r2 - -#ifdef FULL_LIBRARY - .thumb_func -exit: - mov r5, r0 // save the exit parameter/return result - - /* Call destructors */ - ldr r0, =__dtors_start__ - ldr r1, =__dtors_end__ -dtor_loop: - cmp r0, r1 - beq dtor_end - ldr r2, [r0] - add r0, #4 - push {r0-r1} - blx r2 - pop {r0-r1} - b dtor_loop -dtor_end: - - /* Call atexit functions */ - ldr r2, =_execute_at_exit_fns - blx r2 - - /* Call debug_exit with return result/exit parameter */ - mov r0, r5 - ldr r2, =debug_exit - blx r2 -#endif - - /* Returned from application entry point, loop forever. */ -exit_loop: - b exit_loop - -memory_copy: - cmp r0, r1 - beq 2f - subs r2, r2, r1 - beq 2f -1: - ldrb r3, [r0] - add r0, r0, #1 - strb r3, [r1] - add r1, r1, #1 - subs r2, r2, #1 - bne 1b -2: - bx lr - -memory_set: - cmp r0, r1 - beq 1f - strb r2, [r0] - add r0, r0, #1 - b memory_set -1: - bx lr - -#ifdef FULL_LIBRARY - .bss -args: - .space ARGSSPACE -#endif - diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/.cproject b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/.cproject deleted file mode 100644 index 20b6e269f..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/.cproject +++ /dev/null @@ -1,918 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -<?xml version="1.0" encoding="UTF-8"?> -<TargetConfig> -<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/> -<infoList vendor="NXP"><info chip="LPC1768" match_id="0x00013f37,0x26013F37" name="LPC1768" package="lpc17_lqfp100.xml"><chip><name>LPC1768</name> -<family>LPC17xx</family> -<vendor>NXP (formerly Philips)</vendor> -<reset board="None" core="Real" sys="Real"/> -<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/> -<memory can_program="true" id="Flash" is_ro="true" type="Flash"/> -<memory id="RAM" type="RAM"/> -<memory id="Periph" is_volatile="true" type="Peripheral"/> -<memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/> -<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/> -<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/> -<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/> -<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/> -<peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/> -<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&amp;0x1" id="TIMER0" location="0x40004000"/> -<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&amp;0x1" id="TIMER1" location="0x40008000"/> -<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&amp;0x1" id="TIMER2" location="0x40090000"/> -<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&amp;0x1" id="TIMER3" location="0x40094000"/> -<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO0" location="0x2009C000"/> -<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO1" location="0x2009C020"/> -<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO2" location="0x2009C040"/> -<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO3" location="0x2009C060"/> -<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO4" location="0x2009C080"/> -<peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&amp;0x08000000" id="I2S" location="0x400A8000"/> -<peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/> -<peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&amp;0x2=2" id="DAC" location="0x4008C000"/> -<peripheralInstance derived_from="LPC1xxx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;0x1" id="UART0" location="0x4000C000"/> -<peripheralInstance derived_from="LPC1xxx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;0x1" id="UART1" location="0x40010000"/> -<peripheralInstance derived_from="LPC1xxx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;0x1" id="UART2" location="0x40098000"/> -<peripheralInstance derived_from="LPC1xxx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCAURT3&amp;0x1" id="UART3" location="0x4009C000"/> -<peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&amp;0x1" id="SPI" location="0x40020000"/> -<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&amp;0x1" id="SSP0" location="0x40088000"/> -<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&amp;0x1" id="SSP1" location="0x40030000"/> -<peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&amp;0x1" id="ADC" location="0x40034000"/> -<peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/> -<peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/> -<peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x12=0x12" id="USBDEV" location="0x5000C200"/> -<peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&amp;0x1" id="PWM" location="0x40018000"/> -<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&amp;0x1" id="I2C0" location="0x4001C000"/> -<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&amp;0x1" id="I2C1" location="0x4005C000"/> -<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&amp;0x1" id="I2C2" location="0x400A0000"/> -<peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&amp;0x1" id="DMA" location="0x50004000"/> -<peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&amp;0x1" id="ENET" location="0x50000000"/> -<peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/> -<peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/> -<peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&amp;0x1" id="QEI" location="0x400bc000"/> -<peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x11=0x11" id="USBHOST" location="0x5000C000"/> -<peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/> -<peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&amp;0x1" id="RTC" location="0x40024000"/> -<peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/> -<peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/> -</chip> -<processor><name gcc_name="cortex-m3">Cortex-M3</name> -<family>Cortex-M</family> -</processor> -<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/> -</info> -</infoList> -</TargetConfig> - - diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/.project b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/.project deleted file mode 100644 index 4f7da79e5..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/.project +++ /dev/null @@ -1,81 +0,0 @@ - - - RTOSDemo_MPU_RDB1768 - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.append_environment - true - - - ?name? - - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.buildLocation - ${workspace_loc:/RTOSDemo_RDB1768/Debug} - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.core.cnature - - diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/CreateProjectDirectoryStructure.bat b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/CreateProjectDirectoryStructure.bat deleted file mode 100644 index 31017b9eb..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/CreateProjectDirectoryStructure.bat +++ /dev/null @@ -1,34 +0,0 @@ -REM This file should be executed from the command line prior to the first -REM build. It will be necessary to refresh the Eclipse project once the -REM .bat file has been executed (normally just press F5 to refresh). - -REM Copies all the required files from their location within the standard -REM FreeRTOS directory structure to under the Eclipse project directory. -REM This permits the Eclipse project to be used in 'managed' mode and without -REM having to setup any linked resources. - -REM Have the files already been copied? -IF EXIST src\FreeRTOS Goto END - - REM Create the required directory structure. - MD src\FreeRTOS - MD src\FreeRTOS\include - MD src\FreeRTOS\portable\GCC\ARM_CM3_MPU - MD src\FreeRTOS\portable\MemMang - - REM Copy the core kernel files. - copy ..\..\Source\tasks.c src\FreeRTOS - copy ..\..\Source\queue.c src\FreeRTOS - copy ..\..\Source\list.c src\FreeRTOS - - REM Copy the common header files - - copy ..\..\Source\include\*.* src\FreeRTOS\include - - REM Copy the portable layer files - copy ..\..\Source\portable\GCC\ARM_CM3_MPU\*.* src\FreeRTOS\portable\GCC\ARM_CM3_MPU - - REM Copy the basic memory allocation files - copy ..\..\Source\portable\MemMang\heap_2.c src\FreeRTOS\portable\MemMang - -: END \ No newline at end of file diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/ReadMe.txt b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/ReadMe.txt new file mode 100644 index 000000000..ad84b2770 --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/ReadMe.txt @@ -0,0 +1,3 @@ +If you need the demo that used to be in this directory then download FreeRTOS V8.2.3 +from http://sourceforge.net/projects/freertos/files/FreeRTOS/ + diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/FreeRTOSConfig.h deleted file mode 100644 index be129a1e4..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/FreeRTOSConfig.h +++ /dev/null @@ -1,146 +0,0 @@ -/* - FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/* - * The following #error directive is to remind users that a batch file must be - * executed prior to this project being built. The batch file *cannot* be - * executed from within the IDE! Once it has been executed, re-open or refresh - * the Eclipse project and remove the #error line below. - */ -#error Ensure CreateProjectDirectoryStructure.bat has been executed before building. See comment immediately above. - -#include "LPC17xx.h" - -/*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. - *----------------------------------------------------------*/ - -#define configUSE_PREEMPTION 1 -#define configUSE_IDLE_HOOK 1 -#define configMAX_PRIORITIES ( 5 ) -#define configUSE_TICK_HOOK 1 -#define configCPU_CLOCK_HZ ( ( unsigned long ) 99000000 ) -#define configTICK_RATE_HZ ( ( TickType_t ) 1000 ) -#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 100 ) -#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 2560 ) ) -#define configMAX_TASK_NAME_LEN ( 12 ) -#define configUSE_TRACE_FACILITY 0 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 0 -#define configUSE_CO_ROUTINES 0 -#define configUSE_MUTEXES 0 - -#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) - -#define configUSE_COUNTING_SEMAPHORES 0 -#define configUSE_ALTERNATIVE_API 0 -#define configCHECK_FOR_STACK_OVERFLOW 0 -#define configUSE_RECURSIVE_MUTEXES 0 -#define configQUEUE_REGISTRY_SIZE 0 -#define configGENERATE_RUN_TIME_STATS 0 -#define configUSE_MALLOC_FAILED_HOOK 1 - -/* Set the following definitions to 1 to include the API function, or zero -to exclude the API function. */ - -#define INCLUDE_vTaskPrioritySet 0 -#define INCLUDE_uxTaskPriorityGet 0 -#define INCLUDE_vTaskDelete 1 -#define INCLUDE_vTaskCleanUpResources 0 -#define INCLUDE_vTaskSuspend 0 -#define INCLUDE_vTaskDelayUntil 0 -#define INCLUDE_vTaskDelay 0 -#define INCLUDE_uxTaskGetStackHighWaterMark 0 - -/* Use the system definition, if there is one */ -#ifdef __NVIC_PRIO_BITS - #define configPRIO_BITS __NVIC_PRIO_BITS -#else - #define configPRIO_BITS 5 /* 32 priority levels */ -#endif - -/* The lowest priority. */ -#define configKERNEL_INTERRUPT_PRIORITY ( 31 << (8 - configPRIO_BITS) ) -/* Priority 5, or 160 as only the top three bits are implemented. */ -/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! -See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ -#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( 5 << (8 - configPRIO_BITS) ) - - - -#endif /* FREERTOS_CONFIG_H */ diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/LCD/font.h b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/LCD/font.h deleted file mode 100644 index c7f07ca43..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/LCD/font.h +++ /dev/null @@ -1,33 +0,0 @@ -//***************************************************************************** -// +--+ -// | ++----+ -// +-++ | -// | | -// +-+--+ | -// | +--+--+ -// +----+ Copyright (c) 2009 Code Red Technologies Ltd. -// -// font.h - header file for font data contained in system_fixed_be_8_15.c -// -// Software License Agreement -// -// The software is owned by Code Red Technologies and/or its suppliers, and is -// protected under applicable copyright laws. All rights are reserved. Any -// use in violation of the foregoing restrictions may subject the user to criminal -// sanctions under applicable laws, as well as to civil liability for the breach -// of the terms and conditions of this license. -// -// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED -// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. -// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT -// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH -// CODE RED TECHNOLOGIES LTD. - -#ifndef FONT_H_ -#define FONT_H_ - -extern const unsigned char font_data_table[]; -extern const unsigned char font_index_table[]; - -#endif /*FONT_H_*/ diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/LCD/lcd.c b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/LCD/lcd.c deleted file mode 100644 index fed36a9f9..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/LCD/lcd.c +++ /dev/null @@ -1,308 +0,0 @@ -//***************************************************************************** -// +--+ -// | ++----+ -// +-++ | -// | | -// +-+--+ | -// | +--+--+ -// +----+ Copyright (c) 2009 Code Red Technologies Ltd. -// -// lcd.c contains various routines to plot to the LCD display on the RDB1768 -// development board. -// -// Software License Agreement -// -// The software is owned by Code Red Technologies and/or its suppliers, and is -// protected under applicable copyright laws. All rights are reserved. Any -// use in violation of the foregoing restrictions may subject the user to criminal -// sanctions under applicable laws, as well as to civil liability for the breach -// of the terms and conditions of this license. -// -// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED -// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. -// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT -// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH -// CODE RED TECHNOLOGIES LTD. - -#include "lcd_commands.h" -#include "lcd.h" -#include "lcd_driver.h" -#include "font.h" - -#include // to provice abs() function - -// Routine to draw a filled rectangle to the LCD. -// Two corners of rectangle are at (xmin,ymin) and (xmax,ymax). -// The Rectangle is filled with the RGB565 color specified -void LCD_FilledRect(int xmin,int xmax,int ymin,int ymax,int color) -{ - int i; - - // Specify to LCD controller coordinates we are writing to... - LCDdriver_WriteCom(DD_CASET); // Set the column address - LCDdriver_WriteData(xmin); // min address - LCDdriver_WriteData(xmax); // max address - LCDdriver_WriteCom(DD_RASET); // Set the row address - LCDdriver_WriteData(ymin + 1); // min address - LCDdriver_WriteData(ymax + 1); // max address - LCDdriver_WriteCom(DD_RAMWR); // RAM Write command - - // Plot the color data to the LCD buffer - for(i = ((xmax - xmin + 1) * (ymax - ymin + 1)); i > 0; i--) - { - LCDdriver_WriteData(color >> 8); // top 8 bits of RGB565 color - LCDdriver_WriteData(color); // bottom 8 bits of RGB565 color - } -} - -// Routine to draw an unfilled rectangle to the LCD. -// Two corners of rectangle are at (xmin,ymin) and (xmax,ymax). -// The Rectangle is drawn in the RGB565 color specified -void LCD_Rect(int xmin,int xmax,int ymin,int ymax,int color) -{ - // Draw 4 lines of rectange as 4 filled rectanges, each of 1 pixel wide - LCD_FilledRect(xmin,xmin,ymin,ymax,color); - LCD_FilledRect(xmax,xmax,ymin,ymax,color); - LCD_FilledRect(xmin,xmax,ymin,ymin,color); - LCD_FilledRect(xmin,xmax,ymax,ymax,color); -} - - - -// Plot a point on the screen in the 6:5:6 color format -void LCD_PlotPoint(int x,int y,int color) -{ - LCDdriver_WriteCom(DD_CASET); // Set the column address - LCDdriver_WriteData(x); // min address - LCDdriver_WriteData(x); // max address - LCDdriver_WriteCom(DD_RASET); // Set the row address - LCDdriver_WriteData(y + 1); // min address - LCDdriver_WriteData(y + 1); // max address - LCDdriver_WriteCom(DD_RAMWR); // RAM Write command - LCDdriver_WriteData(color >> 8); // top 8 bits of RGB565 color - LCDdriver_WriteData(color); // top 8 bits of RGB565 color -} - -// Routine to draw a filled circle to the LCD. -// The centre of the circle is at (x0,y0) and the circle has the -// specifed radius. The circle is filled with the RGB565 color -// The circle is drawn using the "Midpoint circle algorithm", -// also known as "Bresenham's circle algorithm". In order to fill -// the circle, the algorithm has been modifed to draw a line between -// each two points, rather than plotting the two points individually. -void LCD_FilledCircle (int x0, int y0, int radius, int color) -{ - int f = 1 - radius; - int ddF_x = 1; - int ddF_y = -2 * radius; - int x = 0; - int y = radius; - - LCD_FilledRect(x0, x0 ,y0 - radius,y0 + radius, color); - LCD_FilledRect(x0 - radius, x0 + radius ,y0,y0, color); - - while(x < y) - { - if(f >= 0) - { - y--; - ddF_y += 2; - f += ddF_y; - } - x++; - ddF_x += 2; - f += ddF_x; - - LCD_FilledRect(x0-x, x0+x ,y0 +y, y0 + y, color); - LCD_FilledRect(x0-x, x0+x ,y0 - y, y0 - y, color); - LCD_FilledRect(x0-y, x0+y ,y0 + x, y0 + x, color); - LCD_FilledRect(x0-y, x0+y ,y0 - x, y0 - x, color); - } -} - -// Routine to draw an unfilled circle to the LCD. -// The centre of the circle is at (x0,y0) and the circle has the -// specifed radius. The circle is drawn in the RGB565 color -// The circle is drawn using the "Midpoint circle algorithm", -// also known as "Bresenham's circle algorithm". -void LCD_Circle (int x0, int y0, int radius, int color) -{ - int f = 1 - radius; - int ddF_x = 1; - int ddF_y = -2 * radius; - int x = 0; - int y = radius; - - LCD_PlotPoint(x0, y0 + radius, color); - LCD_PlotPoint(x0, y0 - radius, color); - LCD_PlotPoint(x0 + radius, y0, color); - LCD_PlotPoint(x0 - radius, y0, color); - - while(x < y) - { - if(f >= 0) - { - y--; - ddF_y += 2; - f += ddF_y; - } - x++; - ddF_x += 2; - f += ddF_x; - LCD_PlotPoint(x0 + x, y0 + y, color); - LCD_PlotPoint(x0 - x, y0 + y, color); - LCD_PlotPoint(x0 + x, y0 - y, color); - LCD_PlotPoint(x0 - x, y0 - y, color); - LCD_PlotPoint(x0 + y, y0 + x, color); - LCD_PlotPoint(x0 - y, y0 + x, color); - LCD_PlotPoint(x0 + y, y0 - x, color); - LCD_PlotPoint(x0 - y, y0 - x, color); - } -} - -// Routine to draw a line in the RGB565 color to the LCD. -// The line is drawn from (xmin,ymin) to (xmax,ymax). -// The algorithm used to draw the line is "Bresenham's line -// algorithm". -#define SWAP(a, b) a ^= b; b ^= a; a ^= b; - -void LCD_Line (int xmin,int xmax,int ymin,int ymax,int color) -{ - int Dx = xmax - xmin; - int Dy = ymax - ymin; - int steep = (abs(Dy) >= abs(Dx)); - if (steep) { - SWAP(xmin, ymin); - SWAP(xmax, ymax); - // recompute Dx, Dy after swap - Dx = xmax - xmin; - Dy = ymax - ymin; - } - int xstep = 1; - if (Dx < 0) { - xstep = -1; - Dx = -Dx; - } - int ystep = 1; - if (Dy < 0) { - ystep = -1; - Dy = -Dy; - } - int TwoDy = 2*Dy; - int TwoDyTwoDx = TwoDy - 2*Dx; // 2*Dy - 2*Dx - int E = TwoDy - Dx; //2*Dy - Dx - int y = ymin; - int xDraw, yDraw; - int x; - for (x = xmin; x != xmax; x += xstep) { - if (steep) { - xDraw = y; - yDraw = x; - } else { - xDraw = x; - yDraw = y; - } - // plot - LCD_PlotPoint(xDraw, yDraw, color); - // next - if (E > 0) { - E += TwoDyTwoDx; //E += 2*Dy - 2*Dx; - y = y + ystep; - } else { - E += TwoDy; //E += 2*Dy; - } - } -} - -// Routine to clear the LCD. -// Implemented by drawing a black rectangle across the whole screen -void LCD_ClearScreen(void) -{ - LCD_FilledRect (0,LCD_MAX_X,0 , LCD_MAX_Y, COLOR_BLACK); -} - - - -// Routine to write a single character to screen in the font pointed -// to by pBitMap. This routine is intended to be used via the -// LCD_PrintChar() and LCD_PrintString() routines, rather than called -// directly from user code. -void LCD_WriteBitMap8x15(int x, int y, int height, int width, unsigned char *pBitMap, int color) -{ - int xmax = x + width - 1; // start at zero - int ymax = y + height - 1; // start at zero - int iRow, iCol; - unsigned char ucRowData; - - LCDdriver_WriteCom(DD_CASET); // Column address set - LCDdriver_WriteData(x); // Start column - LCDdriver_WriteData(xmax); // End column - LCDdriver_WriteCom(DD_RASET); // Row address set - LCDdriver_WriteData(y); // Start row - LCDdriver_WriteData(ymax); // End row - LCDdriver_WriteCom(DD_RAMWR); // Memory write - - - for(iRow=0;iRow> 8); - LCDdriver_WriteData(color); - } - else // black pixel - { - LCDdriver_WriteData(0x00); - LCDdriver_WriteData(0x00); - } - - ucRowData = ucRowData<<1; - } - } - -} - - -// Prints the character 'c' to the LCD in the appropriate color. -void LCD_PrintChar(int x, int y, unsigned char c, int color ) -{ - const unsigned char index = font_index_table[c]; - const unsigned int offset = index * 15; - unsigned char *pData = (unsigned char *)&font_data_table[offset]; - - LCD_WriteBitMap8x15(x, y, 15, 8, pData, color); -} - -// Prints the string to the LCD in the appropriate color. -void LCD_PrintString(int x, int y, char *pcString, int iStrLen, int color) -{ - unsigned char index; - unsigned int offset; - unsigned char *pData; - unsigned char c; - int i; - - for(i=0;i> 19) | \ - ((((c) & 0x0000ff00) >> 5) & 0x000007e0) | \ - ((((c) & 0x000000ff) << 8) & 0x0000f800)) - -// Define a basic set of 24bit colors, based on the standard "websafe" set -#define COLOR24_AQUA 0x00FFFF -#define COLOR24_GREY 0x808080 -#define COLOR24_NAVY 0x000080 -#define COLOR24_SILVER 0xC0C0C0 -#define COLOR24_BLACK 0x000000 -#define COLOR24_GREEN 0x008000 -#define COLOR24_OLIVE 0x808000 -#define COLOR24_TEAL 0x008080 -#define COLOR24_BLUE 0x0000FF -#define COLOR24_LIME 0x00FF00 -#define COLOR24_PURPLE 0x800080 -#define COLOR24_WHITE 0xFFFFFF -#define COLOR24_FUCHSIA 0xFF00FF -#define COLOR24_MAROON 0x800000 -#define COLOR24_RED 0xFF0000 -#define COLOR24_YELLOW 0xFFFF00 - -// Create a set of RGB565 colors that can be used directly within code -#define COLOR_AQUA TRANSLATE24BIT_TO_RGB565(COLOR24_AQUA) -#define COLOR_GREY TRANSLATE24BIT_TO_RGB565(COLOR24_GREY) -#define COLOR_NAVY TRANSLATE24BIT_TO_RGB565(COLOR24_NAVY) -#define COLOR_SILVER TRANSLATE24BIT_TO_RGB565(COLOR24_SILVER) -#define COLOR_BLACK TRANSLATE24BIT_TO_RGB565(COLOR24_BLACK) -#define COLOR_GREEN TRANSLATE24BIT_TO_RGB565(COLOR24_GREEN) -#define COLOR_OLIVE TRANSLATE24BIT_TO_RGB565(COLOR24_OLIVE) -#define COLOR_TEAL TRANSLATE24BIT_TO_RGB565(COLOR24_TEAL) -#define COLOR_BLUE TRANSLATE24BIT_TO_RGB565(COLOR24_BLUE) -#define COLOR_LIME TRANSLATE24BIT_TO_RGB565(COLOR24_LIME) -#define COLOR_PURPLE TRANSLATE24BIT_TO_RGB565(COLOR24_PURPLE) -#define COLOR_WHITE TRANSLATE24BIT_TO_RGB565(COLOR24_WHITE) -#define COLOR_FUCHSIA TRANSLATE24BIT_TO_RGB565(COLOR24_FUCHSIA) -#define COLOR_MAROON TRANSLATE24BIT_TO_RGB565(COLOR24_MAROON) -#define COLOR_RED TRANSLATE24BIT_TO_RGB565(COLOR24_RED) -#define COLOR_YELLOW TRANSLATE24BIT_TO_RGB565(COLOR24_YELLOW) - - -void LCD_Line (int xmin,int xmax,int ymin,int ymax,int color); -void LCD_FilledRect(int xmin,int xmax,int ymin,int ymax,int color); -void LCD_Rect(int xmin,int xmax,int ymin,int ymax,int color); -void LCD_WriteBitMap8x15(int x, int y, int height, int width, unsigned char *pBitMap, int color); -void LCD_PlotPoint(int x,int y,int color); -void LCD_Circle (int x0, int y0, int radius, int color); -void LCD_FilledCircle (int x0, int y0, int radius, int color); -void LCD_ClearScreen(void); -void LCD_WriteBitMap8x15(int x, int y, int height, int width, unsigned char *pBitMap, int color); -void LCD_PrintChar(int x, int y, unsigned char c, int color ); -void LCD_PrintString(int x, int y, char *pcString, int iStrLen, int color); - - -#endif /*LCD_H_*/ \ No newline at end of file diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/LCD/lcd_commands.h b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/LCD/lcd_commands.h deleted file mode 100644 index 37ebb3907..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/LCD/lcd_commands.h +++ /dev/null @@ -1,53 +0,0 @@ -//***************************************************************************** -// +--+ -// | ++----+ -// +-++ | -// | | -// +-+--+ | -// | +--+--+ -// +----+ Copyright (c) 2009 Code Red Technologies Ltd. -// -// lcd_commands.h contains defines mapping onto the commands accepted by the -// Sitronix ST7637 LCD Controller/driver used on the RDB1768 development board.// -// -// Software License Agreement -// -// The software is owned by Code Red Technologies and/or its suppliers, and is -// protected under applicable copyright laws. All rights are reserved. Any -// use in violation of the foregoing restrictions may subject the user to criminal -// sanctions under applicable laws, as well as to civil liability for the breach -// of the terms and conditions of this license. -// -// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED -// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. -// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT -// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH -// CODE RED TECHNOLOGIES LTD. - -#ifndef LCD_COMMANDS_H_ -#define LCD_COMMANDS_H_ - -#define DD_NOP 0x00 -#define DD_SWRESET 0x01 //SW reset the display -#define DD_SLPIN 0x10 //Sleep in and booster off -#define DD_SLPOUT 0x11 //Sleep out and booster on -#define DD_NORON 0x13 //Partial mode off (Normal mode on) -#define DD_DISPOFF 0x28 //Display Off -#define DD_DISPON 0x29 //Display On -#define DD_CASET 0x2a //Column address set -#define DD_RASET 0x2b //Row address set -#define DD_RAMWR 0x2c //Memory write -#define DD_MADCTR 0x36 //Memory Data Access Control -#define DD_COLORMOD 0x3a //Set the color mode for the display -#define DD_ColScanDir 0xb7 //Set the column scanning direction -#define DD_VopSet 0xc0 //LCD supply voltage set -#define DD_BiasSel 0xc3 //Bias selection -#define DD_BstMbpXSel 0xc4 //Booster setting -#define DD_AUTOLOADSET 0xd7 //Control auto load of ROM data -#define DD_EPCTIN 0xe0 //OTP control RD/WR -#define DD_EPREAD 0xe3 //OTP read -#define DD_EPCTOUT 0xe1 //OTP control cancel - - -#endif /*LCD_COMMANDS_H_*/ diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/LCD/lcd_driver.c b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/LCD/lcd_driver.c deleted file mode 100644 index 857a07dcd..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/LCD/lcd_driver.c +++ /dev/null @@ -1,190 +0,0 @@ -//***************************************************************************** -// +--+ -// | ++----+ -// +-++ | -// | | -// +-+--+ | -// | +--+--+ -// +----+ Copyright (c) 2009 Code Red Technologies Ltd. -// -// lcd_driver.c contains the lowest level access routines for the Sitronix -// ST7637 LCD Controller/driver used on the RDB1768 development board. -// -// -// Software License Agreement -// -// The software is owned by Code Red Technologies and/or its suppliers, and is -// protected under applicable copyright laws. All rights are reserved. Any -// use in violation of the foregoing restrictions may subject the user to criminal -// sanctions under applicable laws, as well as to civil liability for the breach -// of the terms and conditions of this license. -// -// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED -// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. -// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT -// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH -// CODE RED TECHNOLOGIES LTD. - -#include "NXP/LPC17xx/LPC17xx.h" -#include "lcd_driver.h" -#include "lcd_commands.h" - -// Bits within GPIO port 2 used for LCD driver -#define LCD_CSB_PIN (1<<13) -#define LCD_A0_PIN (1<<8) -#define LCD_WR_PIN (1<<11) -#define LCD_RD_PIN (1<<12) -#define LCD_DATA_PIN 0xff - -// Bit within GPIO port 3 used for LCD driver -#define LCD_RESB_PIN (1<<25) - -// Bits to configure as outputs for driving LCD -#define LCD_PORT2_DIRECTIONS (LCD_CSB_PIN | LCD_A0_PIN | LCD_WR_PIN | LCD_RD_PIN | LCD_DATA_PIN) -#define LCD_PORT3_DIRECTIONS (LCD_RESB_PIN) - -// Define names for GPIO port 2 and 3 registers to better indicate in code -// the operation being carried out on the LCD driver hardware. -#define LCD_DATA_CLR FIO2CLR -#define LCD_DATA_SET FIO2SET - -#define LCD_CSB_CLR FIO2CLR -#define LCD_CSB_SET FIO2SET - -#define LCD_RESB_CLR FIO3CLR -#define LCD_RESB_SET FIO3SET - -#define LCD_A0_CLR FIO2CLR -#define LCD_A0_SET FIO2SET - -#define LCD_WR_CLR FIO2CLR -#define LCD_WR_SET FIO2SET - -#define LCD_RD_CLR FIO2CLR -#define LCD_RD_SET FIO2SET - -// Routine to write data to LCD driver. Normally called in combination -// with LCDdriver_WriteCom() routine -void LCDdriver_WriteData(unsigned char LCD_Data) -{ - LCD_DATA_CLR = LCD_DATA_PIN; - LCD_DATA_SET = LCD_Data; - LCD_CSB_CLR = LCD_CSB_PIN; - LCD_WR_CLR = LCD_WR_PIN; - LCD_WR_SET = LCD_WR_PIN; - LCD_CSB_SET = LCD_CSB_PIN; -} - -// Routine to configure set LCD driver to accept particular command. -// A call to this routine will normally be followed by a call -// to LCDdriver_WriteData() to transfer appropriate parameters to driver. -void LCDdriver_WriteCom(unsigned char LCD_Command) -{ - LCD_DATA_CLR = LCD_DATA_PIN; - LCD_DATA_SET = LCD_Command; - LCD_A0_CLR = LCD_A0_PIN; - LCD_CSB_CLR = LCD_CSB_PIN; - LCD_WR_CLR = LCD_WR_PIN; - LCD_WR_SET = LCD_WR_PIN; - LCD_CSB_SET = LCD_CSB_PIN; - LCD_A0_SET = LCD_A0_PIN; -} - -// Function to add short delays in writing things to the LCD. -void ms_delay(int n) -{ - volatile int d; - for (d=0; d'): (width=8, offset=450) */ -0x00, 0x00, 0x00, 0x60, 0x30, 0x18, 0x0C, 0x06, -0x0C, 0x18, 0x30, 0x60, 0x00, 0x00, 0x00, - -/* character 0x003F ('?'): (width=8, offset=465) */ -0x00, 0x00, 0x00, 0x3C, 0x66, 0x66, 0x0C, 0x18, -0x18, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, - -/* character 0x0040 ('@'): (width=8, offset=480) */ -0x00, 0x00, 0x00, 0x7E, 0xC3, 0xC3, 0xCF, 0xDB, -0xDB, 0xCF, 0xC0, 0x7F, 0x00, 0x00, 0x00, - -/* character 0x0041 ('A'): (width=8, offset=495) */ -0x00, 0x00, 0x00, 0x18, 0x3C, 0x66, 0x66, 0x66, -0x7E, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, - -/* character 0x0042 ('B'): (width=8, offset=510) */ -0x00, 0x00, 0x00, 0x7C, 0x66, 0x66, 0x66, 0x7C, -0x66, 0x66, 0x66, 0x7C, 0x00, 0x00, 0x00, - -/* character 0x0043 ('C'): (width=8, offset=525) */ -0x00, 0x00, 0x00, 0x3C, 0x66, 0x66, 0x60, 0x60, -0x60, 0x66, 0x66, 0x3C, 0x00, 0x00, 0x00, - -/* character 0x0044 ('D'): (width=8, offset=540) */ -0x00, 0x00, 0x00, 0x78, 0x6C, 0x66, 0x66, 0x66, -0x66, 0x66, 0x6C, 0x78, 0x00, 0x00, 0x00, - -/* character 0x0045 ('E'): (width=8, offset=555) */ -0x00, 0x00, 0x00, 0x7E, 0x60, 0x60, 0x60, 0x7C, -0x60, 0x60, 0x60, 0x7E, 0x00, 0x00, 0x00, - -/* character 0x0046 ('F'): (width=8, offset=570) */ -0x00, 0x00, 0x00, 0x7E, 0x60, 0x60, 0x60, 0x7C, -0x60, 0x60, 0x60, 0x60, 0x00, 0x00, 0x00, - -/* character 0x0047 ('G'): (width=8, offset=585) */ -0x00, 0x00, 0x00, 0x3C, 0x66, 0x66, 0x60, 0x60, -0x6E, 0x66, 0x66, 0x3E, 0x00, 0x00, 0x00, - -/* character 0x0048 ('H'): (width=8, offset=600) */ -0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x7E, -0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, - -/* character 0x0049 ('I'): (width=8, offset=615) */ -0x00, 0x00, 0x00, 0x3C, 0x18, 0x18, 0x18, 0x18, -0x18, 0x18, 0x18, 0x3C, 0x00, 0x00, 0x00, - -/* character 0x004A ('J'): (width=8, offset=630) */ -0x00, 0x00, 0x00, 0x06, 0x06, 0x06, 0x06, 0x06, -0x06, 0x66, 0x66, 0x3C, 0x00, 0x00, 0x00, - -/* character 0x004B ('K'): (width=8, offset=645) */ -0x00, 0x00, 0x00, 0x66, 0x66, 0x6C, 0x6C, 0x78, -0x6C, 0x6C, 0x66, 0x66, 0x00, 0x00, 0x00, - -/* character 0x004C ('L'): (width=8, offset=660) */ -0x00, 0x00, 0x00, 0x60, 0x60, 0x60, 0x60, 0x60, -0x60, 0x60, 0x60, 0x7E, 0x00, 0x00, 0x00, - -/* character 0x004D ('M'): (width=8, offset=675) */ -0x00, 0x00, 0x00, 0x63, 0x63, 0x77, 0x6B, 0x6B, -0x6B, 0x63, 0x63, 0x63, 0x00, 0x00, 0x00, - -/* character 0x004E ('N'): (width=8, offset=690) */ -0x00, 0x00, 0x00, 0x63, 0x63, 0x73, 0x7B, 0x6F, -0x67, 0x63, 0x63, 0x63, 0x00, 0x00, 0x00, - -/* character 0x004F ('O'): (width=8, offset=705) */ -0x00, 0x00, 0x00, 0x3C, 0x66, 0x66, 0x66, 0x66, -0x66, 0x66, 0x66, 0x3C, 0x00, 0x00, 0x00, - -/* character 0x0050 ('P'): (width=8, offset=720) */ -0x00, 0x00, 0x00, 0x7C, 0x66, 0x66, 0x66, 0x7C, -0x60, 0x60, 0x60, 0x60, 0x00, 0x00, 0x00, - -/* character 0x0051 ('Q'): (width=8, offset=735) */ -0x00, 0x00, 0x00, 0x3C, 0x66, 0x66, 0x66, 0x66, -0x66, 0x66, 0x66, 0x3C, 0x0C, 0x06, 0x00, - -/* character 0x0052 ('R'): (width=8, offset=750) */ -0x00, 0x00, 0x00, 0x7C, 0x66, 0x66, 0x66, 0x7C, -0x6C, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, - -/* character 0x0053 ('S'): (width=8, offset=765) */ -0x00, 0x00, 0x00, 0x3C, 0x66, 0x60, 0x30, 0x18, -0x0C, 0x06, 0x66, 0x3C, 0x00, 0x00, 0x00, - -/* character 0x0054 ('T'): (width=8, offset=780) */ -0x00, 0x00, 0x00, 0x7E, 0x18, 0x18, 0x18, 0x18, -0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, - -/* character 0x0055 ('U'): (width=8, offset=795) */ -0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x66, -0x66, 0x66, 0x66, 0x3C, 0x00, 0x00, 0x00, - -/* character 0x0056 ('V'): (width=8, offset=810) */ -0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x66, -0x66, 0x66, 0x3C, 0x18, 0x00, 0x00, 0x00, - -/* character 0x0057 ('W'): (width=8, offset=825) */ -0x00, 0x00, 0x00, 0x63, 0x63, 0x63, 0x6B, 0x6B, -0x6B, 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, - -/* character 0x0058 ('X'): (width=8, offset=840) */ -0x00, 0x00, 0x00, 0x66, 0x66, 0x34, 0x18, 0x18, -0x2C, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, - -/* character 0x0059 ('Y'): (width=8, offset=855) */ -0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x3C, -0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, - -/* character 0x005A ('Z'): (width=8, offset=870) */ -0x00, 0x00, 0x00, 0x7E, 0x06, 0x06, 0x0C, 0x18, -0x30, 0x60, 0x60, 0x7E, 0x00, 0x00, 0x00, - -/* character 0x005B ('['): (width=8, offset=885) */ -0x00, 0x00, 0x00, 0x3C, 0x30, 0x30, 0x30, 0x30, -0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x3C, - -/* character 0x005C ('\'): (width=8, offset=900) */ -0x00, 0x00, 0x00, 0x60, 0x60, 0x30, 0x30, 0x18, -0x18, 0x0C, 0x0C, 0x06, 0x06, 0x00, 0x00, - -/* character 0x005D (']'): (width=8, offset=915) */ -0x00, 0x00, 0x00, 0x3C, 0x0C, 0x0C, 0x0C, 0x0C, -0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x3C, - -/* character 0x005E ('^'): (width=8, offset=930) */ -0x00, 0x18, 0x3C, 0x66, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - -/* character 0x005F ('_'): (width=8, offset=945) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, - -/* character 0x0060 ('`'): (width=8, offset=960) */ -0x00, 0x38, 0x18, 0x0C, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - -/* character 0x0061 ('a'): (width=8, offset=975) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x06, 0x06, -0x3E, 0x66, 0x66, 0x3E, 0x00, 0x00, 0x00, - -/* character 0x0062 ('b'): (width=8, offset=990) */ -0x00, 0x00, 0x00, 0x60, 0x60, 0x7C, 0x66, 0x66, -0x66, 0x66, 0x66, 0x7C, 0x00, 0x00, 0x00, - -/* character 0x0063 ('c'): (width=8, offset=1005) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x66, 0x60, -0x60, 0x60, 0x66, 0x3C, 0x00, 0x00, 0x00, - -/* character 0x0064 ('d'): (width=8, offset=1020) */ -0x00, 0x00, 0x00, 0x06, 0x06, 0x3E, 0x66, 0x66, -0x66, 0x66, 0x66, 0x3E, 0x00, 0x00, 0x00, - -/* character 0x0065 ('e'): (width=8, offset=1035) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x66, 0x66, -0x7E, 0x60, 0x60, 0x3C, 0x00, 0x00, 0x00, - -/* character 0x0066 ('f'): (width=8, offset=1050) */ -0x00, 0x00, 0x00, 0x1E, 0x30, 0x30, 0x30, 0x7E, -0x30, 0x30, 0x30, 0x30, 0x00, 0x00, 0x00, - -/* character 0x0067 ('g'): (width=8, offset=1065) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x66, 0x66, -0x66, 0x66, 0x66, 0x3E, 0x06, 0x06, 0x7C, - -/* character 0x0068 ('h'): (width=8, offset=1080) */ -0x00, 0x00, 0x00, 0x60, 0x60, 0x7C, 0x66, 0x66, -0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, - -/* character 0x0069 ('i'): (width=8, offset=1095) */ -0x00, 0x00, 0x18, 0x18, 0x00, 0x78, 0x18, 0x18, -0x18, 0x18, 0x18, 0x7E, 0x00, 0x00, 0x00, - -/* character 0x006A ('j'): (width=8, offset=1110) */ -0x00, 0x00, 0x0C, 0x0C, 0x00, 0x3C, 0x0C, 0x0C, -0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x78, - -/* character 0x006B ('k'): (width=8, offset=1125) */ -0x00, 0x00, 0x00, 0x60, 0x60, 0x66, 0x66, 0x6C, -0x78, 0x6C, 0x66, 0x66, 0x00, 0x00, 0x00, - -/* character 0x006C ('l'): (width=8, offset=1140) */ -0x00, 0x00, 0x00, 0x78, 0x18, 0x18, 0x18, 0x18, -0x18, 0x18, 0x18, 0x7E, 0x00, 0x00, 0x00, - -/* character 0x006D ('m'): (width=8, offset=1155) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x6B, 0x6B, -0x6B, 0x6B, 0x6B, 0x63, 0x00, 0x00, 0x00, - -/* character 0x006E ('n'): (width=8, offset=1170) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0x66, 0x66, -0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, - -/* character 0x006F ('o'): (width=8, offset=1185) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x66, 0x66, -0x66, 0x66, 0x66, 0x3C, 0x00, 0x00, 0x00, - -/* character 0x0070 ('p'): (width=8, offset=1200) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0x66, 0x66, -0x66, 0x66, 0x66, 0x7C, 0x60, 0x60, 0x60, - -/* character 0x0071 ('q'): (width=8, offset=1215) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x66, 0x66, -0x66, 0x66, 0x66, 0x3E, 0x06, 0x06, 0x06, - -/* character 0x0072 ('r'): (width=8, offset=1230) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x6E, 0x70, -0x60, 0x60, 0x60, 0x60, 0x00, 0x00, 0x00, - -/* character 0x0073 ('s'): (width=8, offset=1245) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x60, 0x60, -0x3C, 0x06, 0x06, 0x7C, 0x00, 0x00, 0x00, - -/* character 0x0074 ('t'): (width=8, offset=1260) */ -0x00, 0x00, 0x00, 0x30, 0x30, 0x7E, 0x30, 0x30, -0x30, 0x30, 0x30, 0x1E, 0x00, 0x00, 0x00, - -/* character 0x0075 ('u'): (width=8, offset=1275) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, -0x66, 0x66, 0x66, 0x3E, 0x00, 0x00, 0x00, - -/* character 0x0076 ('v'): (width=8, offset=1290) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, -0x66, 0x66, 0x3C, 0x18, 0x00, 0x00, 0x00, - -/* character 0x0077 ('w'): (width=8, offset=1305) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x63, 0x6B, 0x6B, -0x6B, 0x6B, 0x36, 0x36, 0x00, 0x00, 0x00, - -/* character 0x0078 ('x'): (width=8, offset=1320) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x3C, -0x18, 0x3C, 0x66, 0x66, 0x00, 0x00, 0x00, - -/* character 0x0079 ('y'): (width=8, offset=1335) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, -0x66, 0x66, 0x66, 0x3C, 0x0C, 0x18, 0xF0, - -/* character 0x007A ('z'): (width=8, offset=1350) */ -0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x06, 0x0C, -0x18, 0x30, 0x60, 0x7E, 0x00, 0x00, 0x00, - -/* character 0x007B ('{'): (width=8, offset=1365) */ -0x00, 0x00, 0x00, 0x0C, 0x18, 0x18, 0x18, 0x30, -0x60, 0x30, 0x18, 0x18, 0x18, 0x0C, 0x00, - -/* character 0x007C ('|'): (width=8, offset=1380) */ -0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, -0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - -/* character 0x007D ('}'): (width=8, offset=1395) */ -0x00, 0x00, 0x00, 0x30, 0x18, 0x18, 0x18, 0x0C, -0x06, 0x0C, 0x18, 0x18, 0x18, 0x30, 0x00, - -/* character 0x007E ('~'): (width=8, offset=1410) */ -0x00, 0x00, 0x00, 0x71, 0xDB, 0x8E, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - -/* character 0x007F (''): (width=8, offset=1425) */ -0x00, 0x00, 0x00, 0x7E, 0x7E, 0x7E, 0x7E, 0x7E, -0x7E, 0x7E, 0x7E, 0x7E, 0x00, 0x00, 0x00, - -}; - - -/******************************************************************************************* - Index table is used to find the mapping index of a character. - - If you can find a simple mathematical expression for index mapping, you can use that. - If you do not have such a mathematical expression, this index table is just for you. - - To get the index of character 'A', you can use the following expression: - - const unsigned char index = index_table['A']; - - *******************************************************************************************/ -const unsigned char font_index_table[] = { -/* index hexcode decimal char */ -/* ===== ======= ======= ==== */ - 0, /* 00 0 . */ - 0, /* 01 1 . */ - 0, /* 02 2 . */ - 0, /* 03 3 . */ - 0, /* 04 4 . */ - 0, /* 05 5 . */ - 0, /* 06 6 . */ - 0, /* 07 7 . */ - 0, /* 08 8 . */ - 0, /* 09 9 . */ - 0, /* 0A 10 . */ - 0, /* 0B 11 . */ - 0, /* 0C 12 . */ - 0, /* 0D 13 . */ - 0, /* 0E 14 . */ - 0, /* 0F 15 . */ - 0, /* 10 16 . */ - 0, /* 11 17 . */ - 0, /* 12 18 . */ - 0, /* 13 19 . */ - 0, /* 14 20 . */ - 0, /* 15 21 . */ - 0, /* 16 22 . */ - 0, /* 17 23 . */ - 0, /* 18 24 . */ - 0, /* 19 25 . */ - 0, /* 1A 26 . */ - 0, /* 1B 27 . */ - 0, /* 1C 28 . */ - 0, /* 1D 29 . */ - 0, /* 1E 30 . */ - 0, /* 1F 31 . */ - 0, /* 20 32 */ - 1, /* 21 33 ! */ - 2, /* 22 34 " */ - 3, /* 23 35 # */ - 4, /* 24 36 $ */ - 5, /* 25 37 % */ - 6, /* 26 38 & */ - 7, /* 27 39 ' */ - 8, /* 28 40 ( */ - 9, /* 29 41 ) */ - 10, /* 2A 42 * */ - 11, /* 2B 43 + */ - 12, /* 2C 44 , */ - 13, /* 2D 45 - */ - 14, /* 2E 46 . */ - 15, /* 2F 47 / */ - 16, /* 30 48 0 */ - 17, /* 31 49 1 */ - 18, /* 32 50 2 */ - 19, /* 33 51 3 */ - 20, /* 34 52 4 */ - 21, /* 35 53 5 */ - 22, /* 36 54 6 */ - 23, /* 37 55 7 */ - 24, /* 38 56 8 */ - 25, /* 39 57 9 */ - 26, /* 3A 58 : */ - 27, /* 3B 59 ; */ - 28, /* 3C 60 < */ - 29, /* 3D 61 = */ - 30, /* 3E 62 > */ - 31, /* 3F 63 ? */ - 32, /* 40 64 @ */ - 33, /* 41 65 A */ - 34, /* 42 66 B */ - 35, /* 43 67 C */ - 36, /* 44 68 D */ - 37, /* 45 69 E */ - 38, /* 46 70 F */ - 39, /* 47 71 G */ - 40, /* 48 72 H */ - 41, /* 49 73 I */ - 42, /* 4A 74 J */ - 43, /* 4B 75 K */ - 44, /* 4C 76 L */ - 45, /* 4D 77 M */ - 46, /* 4E 78 N */ - 47, /* 4F 79 O */ - 48, /* 50 80 P */ - 49, /* 51 81 Q */ - 50, /* 52 82 R */ - 51, /* 53 83 S */ - 52, /* 54 84 T */ - 53, /* 55 85 U */ - 54, /* 56 86 V */ - 55, /* 57 87 W */ - 56, /* 58 88 X */ - 57, /* 59 89 Y */ - 58, /* 5A 90 Z */ - 59, /* 5B 91 [ */ - 60, /* 5C 92 \ */ - 61, /* 5D 93 ] */ - 62, /* 5E 94 ^ */ - 63, /* 5F 95 _ */ - 64, /* 60 96 ` */ - 65, /* 61 97 a */ - 66, /* 62 98 b */ - 67, /* 63 99 c */ - 68, /* 64 100 d */ - 69, /* 65 101 e */ - 70, /* 66 102 f */ - 71, /* 67 103 g */ - 72, /* 68 104 h */ - 73, /* 69 105 i */ - 74, /* 6A 106 j */ - 75, /* 6B 107 k */ - 76, /* 6C 108 l */ - 77, /* 6D 109 m */ - 78, /* 6E 110 n */ - 79, /* 6F 111 o */ - 80, /* 70 112 p */ - 81, /* 71 113 q */ - 82, /* 72 114 r */ - 83, /* 73 115 s */ - 84, /* 74 116 t */ - 85, /* 75 117 u */ - 86, /* 76 118 v */ - 87, /* 77 119 w */ - 88, /* 78 120 x */ - 89, /* 79 121 y */ - 90, /* 7A 122 z */ - 91, /* 7B 123 { */ - 92, /* 7C 124 | */ - 93, /* 7D 125 } */ - 94, /* 7E 126 ~ */ - 95, /* 7F 127  */ - 0, /* 80 128 ? */ - 0, /* 81 129 � */ - 0, /* 82 130 ? */ - 0, /* 83 131 ? */ - 0, /* 84 132 ? */ - 0, /* 85 133 ? */ - 0, /* 86 134 ? */ - 0, /* 87 135 ? */ - 0, /* 88 136 ? */ - 0, /* 89 137 ? */ - 0, /* 8A 138 ? */ - 0, /* 8B 139 ? */ - 0, /* 8C 140 ? */ - 0, /* 8D 141 � */ - 0, /* 8E 142 ? */ - 0, /* 8F 143 � */ - 0, /* 90 144 � */ - 0, /* 91 145 ? */ - 0, /* 92 146 ? */ - 0, /* 93 147 ? */ - 0, /* 94 148 ? */ - 0, /* 95 149 ? */ - 0, /* 96 150 ? */ - 0, /* 97 151 ? */ - 0, /* 98 152 ? */ - 0, /* 99 153 ? */ - 0, /* 9A 154 ? */ - 0, /* 9B 155 ? */ - 0, /* 9C 156 ? */ - 0, /* 9D 157 � */ - 0, /* 9E 158 ? */ - 0, /* 9F 159 ? */ - 0, /* A0 160 � */ - 0, /* A1 161 � */ - 0, /* A2 162 � */ - 0, /* A3 163 � */ - 0, /* A4 164 � */ - 0, /* A5 165 � */ - 0, /* A6 166 � */ - 0, /* A7 167 � */ - 0, /* A8 168 � */ - 0, /* A9 169 � */ - 0, /* AA 170 � */ - 0, /* AB 171 � */ - 0, /* AC 172 � */ - 0, /* AD 173 � */ - 0, /* AE 174 � */ - 0, /* AF 175 � */ - 0, /* B0 176 � */ - 0, /* B1 177 � */ - 0, /* B2 178 � */ - 0, /* B3 179 � */ - 0, /* B4 180 � */ - 0, /* B5 181 � */ - 0, /* B6 182 � */ - 0, /* B7 183 � */ - 0, /* B8 184 � */ - 0, /* B9 185 � */ - 0, /* BA 186 � */ - 0, /* BB 187 � */ - 0, /* BC 188 � */ - 0, /* BD 189 � */ - 0, /* BE 190 � */ - 0, /* BF 191 � */ - 0, /* C0 192 � */ - 0, /* C1 193 � */ - 0, /* C2 194 � */ - 0, /* C3 195 � */ - 0, /* C4 196 � */ - 0, /* C5 197 � */ - 0, /* C6 198 � */ - 0, /* C7 199 � */ - 0, /* C8 200 � */ - 0, /* C9 201 � */ - 0, /* CA 202 � */ - 0, /* CB 203 � */ - 0, /* CC 204 � */ - 0, /* CD 205 � */ - 0, /* CE 206 � */ - 0, /* CF 207 � */ - 0, /* D0 208 � */ - 0, /* D1 209 � */ - 0, /* D2 210 � */ - 0, /* D3 211 � */ - 0, /* D4 212 � */ - 0, /* D5 213 � */ - 0, /* D6 214 � */ - 0, /* D7 215 � */ - 0, /* D8 216 � */ - 0, /* D9 217 � */ - 0, /* DA 218 � */ - 0, /* DB 219 � */ - 0, /* DC 220 � */ - 0, /* DD 221 � */ - 0, /* DE 222 � */ - 0, /* DF 223 � */ - 0, /* E0 224 � */ - 0, /* E1 225 � */ - 0, /* E2 226 � */ - 0, /* E3 227 � */ - 0, /* E4 228 � */ - 0, /* E5 229 � */ - 0, /* E6 230 � */ - 0, /* E7 231 � */ - 0, /* E8 232 � */ - 0, /* E9 233 � */ - 0, /* EA 234 � */ - 0, /* EB 235 � */ - 0, /* EC 236 � */ - 0, /* ED 237 � */ - 0, /* EE 238 � */ - 0, /* EF 239 � */ - 0, /* F0 240 � */ - 0, /* F1 241 � */ - 0, /* F2 242 � */ - 0, /* F3 243 � */ - 0, /* F4 244 � */ - 0, /* F5 245 � */ - 0, /* F6 246 � */ - 0, /* F7 247 � */ - 0, /* F8 248 � */ - 0, /* F9 249 � */ - 0, /* FA 250 � */ - 0, /* FB 251 � */ - 0, /* FC 252 � */ - 0, /* FD 253 � */ - 0, /* FE 254 � */ - 0, /* FF 255 � */ -}; - - - diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/LPC17xx.h b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/LPC17xx.h deleted file mode 100644 index 09572d30b..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/LPC17xx.h +++ /dev/null @@ -1,1080 +0,0 @@ -#ifndef __LPC17xx_H -#define __LPC17xx_H - -/* System Control Block (SCB) includes: - Flash Accelerator Module, Clocking and Power Control, External Interrupts, - Reset, System Control and Status -*/ -#define SCB_BASE_ADDR 0x400FC000 - -#define PCONP_PCTIM0 0x00000002 -#define PCONP_PCTIM1 0x00000004 -#define PCONP_PCUART0 0x00000008 -#define PCONP_PCUART1 0x00000010 -#define PCONP_PCPWM1 0x00000040 -#define PCONP_PCI2C0 0x00000080 -#define PCONP_PCSPI 0x00000100 -#define PCONP_PCRTC 0x00000200 -#define PCONP_PCSSP1 0x00000400 -#define PCONP_PCAD 0x00001000 -#define PCONP_PCCAN1 0x00002000 -#define PCONP_PCCAN2 0x00004000 -#define PCONP_PCGPIO 0x00008000 -#define PCONP_PCRIT 0x00010000 -#define PCONP_PCMCPWM 0x00020000 -#define PCONP_PCQEI 0x00040000 -#define PCONP_PCI2C1 0x00080000 -#define PCONP_PCSSP0 0x00200000 -#define PCONP_PCTIM2 0x00400000 -#define PCONP_PCTIM3 0x00800000 -#define PCONP_PCUART2 0x01000000 -#define PCONP_PCUART3 0x02000000 -#define PCONP_PCI2C2 0x04000000 -#define PCONP_PCI2S 0x08000000 -#define PCONP_PCGPDMA 0x20000000 -#define PCONP_PCENET 0x40000000 -#define PCONP_PCUSB 0x80000000 - -#define PLLCON_PLLE 0x00000001 -#define PLLCON_PLLC 0x00000002 -#define PLLCON_MASK 0x00000003 - -#define PLLCFG_MUL1 0x00000000 -#define PLLCFG_MUL2 0x00000001 -#define PLLCFG_MUL3 0x00000002 -#define PLLCFG_MUL4 0x00000003 -#define PLLCFG_MUL5 0x00000004 -#define PLLCFG_MUL6 0x00000005 -#define PLLCFG_MUL7 0x00000006 -#define PLLCFG_MUL8 0x00000007 -#define PLLCFG_MUL9 0x00000008 -#define PLLCFG_MUL10 0x00000009 -#define PLLCFG_MUL11 0x0000000A -#define PLLCFG_MUL12 0x0000000B -#define PLLCFG_MUL13 0x0000000C -#define PLLCFG_MUL14 0x0000000D -#define PLLCFG_MUL15 0x0000000E -#define PLLCFG_MUL16 0x0000000F -#define PLLCFG_MUL17 0x00000010 -#define PLLCFG_MUL18 0x00000011 -#define PLLCFG_MUL19 0x00000012 -#define PLLCFG_MUL20 0x00000013 -#define PLLCFG_MUL21 0x00000014 -#define PLLCFG_MUL22 0x00000015 -#define PLLCFG_MUL23 0x00000016 -#define PLLCFG_MUL24 0x00000017 -#define PLLCFG_MUL25 0x00000018 -#define PLLCFG_MUL26 0x00000019 -#define PLLCFG_MUL27 0x0000001A -#define PLLCFG_MUL28 0x0000001B -#define PLLCFG_MUL29 0x0000001C -#define PLLCFG_MUL30 0x0000001D -#define PLLCFG_MUL31 0x0000001E -#define PLLCFG_MUL32 0x0000001F -#define PLLCFG_MUL33 0x00000020 -#define PLLCFG_MUL34 0x00000021 -#define PLLCFG_MUL35 0x00000022 -#define PLLCFG_MUL36 0x00000023 - -#define PLLCFG_DIV1 0x00000000 -#define PLLCFG_DIV2 0x00010000 -#define PLLCFG_DIV3 0x00020000 -#define PLLCFG_DIV4 0x00030000 -#define PLLCFG_DIV5 0x00040000 -#define PLLCFG_DIV6 0x00050000 -#define PLLCFG_DIV7 0x00060000 -#define PLLCFG_DIV8 0x00070000 -#define PLLCFG_DIV9 0x00080000 -#define PLLCFG_DIV10 0x00090000 -#define PLLCFG_MASK 0x00FF7FFF - -#define PLLSTAT_MSEL_MASK 0x00007FFF -#define PLLSTAT_NSEL_MASK 0x00FF0000 - -#define PLLSTAT_PLLE (1 << 24) -#define PLLSTAT_PLLC (1 << 25) -#define PLLSTAT_PLOCK (1 << 26) - -#define PLLFEED_FEED1 0x000000AA -#define PLLFEED_FEED2 0x00000055 - -#define NVIC_IRQ_WDT 0u // IRQ0, exception number 16 -#define NVIC_IRQ_TIMER0 1u // IRQ1, exception number 17 -#define NVIC_IRQ_TIMER1 2u // IRQ2, exception number 18 -#define NVIC_IRQ_TIMER2 3u // IRQ3, exception number 19 -#define NVIC_IRQ_TIMER3 4u // IRQ4, exception number 20 -#define NVIC_IRQ_UART0 5u // IRQ5, exception number 21 -#define NVIC_IRQ_UART1 6u // IRQ6, exception number 22 -#define NVIC_IRQ_UART2 7u // IRQ7, exception number 23 -#define NVIC_IRQ_UART3 8u // IRQ8, exception number 24 -#define NVIC_IRQ_PWM1 9u // IRQ9, exception number 25 -#define NVIC_IRQ_I2C0 10u // IRQ10, exception number 26 -#define NVIC_IRQ_I2C1 11u // IRQ11, exception number 27 -#define NVIC_IRQ_I2C2 12u // IRQ12, exception number 28 -#define NVIC_IRQ_SPI 13u // IRQ13, exception number 29 -#define NVIC_IRQ_SSP0 14u // IRQ14, exception number 30 -#define NVIC_IRQ_SSP1 15u // IRQ15, exception number 31 -#define NVIC_IRQ_PLL0 16u // IRQ16, exception number 32 -#define NVIC_IRQ_RTC 17u // IRQ17, exception number 33 -#define NVIC_IRQ_EINT0 18u // IRQ18, exception number 34 -#define NVIC_IRQ_EINT1 19u // IRQ19, exception number 35 -#define NVIC_IRQ_EINT2 20u // IRQ20, exception number 36 -#define NVIC_IRQ_EINT3 21u // IRQ21, exception number 37 -#define NVIC_IRQ_ADC 22u // IRQ22, exception number 38 -#define NVIC_IRQ_BOD 23u // IRQ23, exception number 39 -#define NVIC_IRQ_USB 24u // IRQ24, exception number 40 -#define NVIC_IRQ_CAN 25u // IRQ25, exception number 41 -#define NVIC_IRQ_GPDMA 26u // IRQ26, exception number 42 -#define NVIC_IRQ_I2S 27u // IRQ27, exception number 43 -#define NVIC_IRQ_ETHERNET 28u // IRQ28, exception number 44 -#define NVIC_IRQ_RIT 29u // IRQ29, exception number 45 -#define NVIC_IRQ_MCPWM 30u // IRQ30, exception number 46 -#define NVIC_IRQ_QE 31u // IRQ31, exception number 47 -#define NVIC_IRQ_PLL1 32u // IRQ32, exception number 48 -#define NVIC_IRQ_USB_ACT 33u // IRQ33, exception number 49 -#define NVIC_IRQ_CAN_ACT 34u // IRQ34, exception number 50 - - -#endif // __LPC17xx_H - - -#ifndef CMSIS_17xx_H -#define CMSIS_17xx_H - -/****************************************************************************** - * @file: LPC17xx.h - * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File for - * NXP LPC17xx Device Series - * @version: V1.1 - * @date: 14th May 2009 - *---------------------------------------------------------------------------- - * - * Copyright (C) 2008 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-M3 - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - -#ifndef __LPC17xx_H__ -#define __LPC17xx_H__ - -/* - * ========================================================================== - * ---------- Interrupt Number Definition ----------------------------------- - * ========================================================================== - */ - -typedef enum IRQn -{ -/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/ - NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ - MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */ - BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */ - UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */ - SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */ - DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */ - PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */ - SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */ - -/****** LPC17xx Specific Interrupt Numbers *******************************************************/ - WDT_IRQn = 0, /*!< Watchdog Timer Interrupt */ - TIMER0_IRQn = 1, /*!< Timer0 Interrupt */ - TIMER1_IRQn = 2, /*!< Timer1 Interrupt */ - TIMER2_IRQn = 3, /*!< Timer2 Interrupt */ - TIMER3_IRQn = 4, /*!< Timer3 Interrupt */ - UART0_IRQn = 5, /*!< UART0 Interrupt */ - UART1_IRQn = 6, /*!< UART1 Interrupt */ - UART2_IRQn = 7, /*!< UART2 Interrupt */ - UART3_IRQn = 8, /*!< UART3 Interrupt */ - PWM1_IRQn = 9, /*!< PWM1 Interrupt */ - I2C0_IRQn = 10, /*!< I2C0 Interrupt */ - I2C1_IRQn = 11, /*!< I2C1 Interrupt */ - I2C2_IRQn = 12, /*!< I2C2 Interrupt */ - SPI_IRQn = 13, /*!< SPI Interrupt */ - SSP0_IRQn = 14, /*!< SSP0 Interrupt */ - SSP1_IRQn = 15, /*!< SSP1 Interrupt */ - PLL0_IRQn = 16, /*!< PLL0 Lock (Main PLL) Interrupt */ - RTC_IRQn = 17, /*!< Real Time Clock Interrupt */ - EINT0_IRQn = 18, /*!< External Interrupt 0 Interrupt */ - EINT1_IRQn = 19, /*!< External Interrupt 1 Interrupt */ - EINT2_IRQn = 20, /*!< External Interrupt 2 Interrupt */ - EINT3_IRQn = 21, /*!< External Interrupt 3 Interrupt */ - ADC_IRQn = 22, /*!< A/D Converter Interrupt */ - BOD_IRQn = 23, /*!< Brown-Out Detect Interrupt */ - USB_IRQn = 24, /*!< USB Interrupt */ - CAN_IRQn = 25, /*!< CAN Interrupt */ - DMA_IRQn = 26, /*!< General Purpose DMA Interrupt */ - I2S_IRQn = 27, /*!< I2S Interrupt */ - ENET_IRQn = 28, /*!< Ethernet Interrupt */ - RIT_IRQn = 29, /*!< Repetitive Interrupt Timer Interrupt */ - MCPWM_IRQn = 30, /*!< Motor Control PWM Interrupt */ - QEI_IRQn = 31, /*!< Quadrature Encoder Interface Interrupt */ - PLL1_IRQn = 32, /*!< PLL1 Lock (USB PLL) Interrupt */ -} IRQn_Type; - - -/* - * ========================================================================== - * ----------- Processor and Core Peripheral Section ------------------------ - * ========================================================================== - */ - -/* Configuration of the Cortex-M3 Processor and Core Peripherals */ -#define __MPU_PRESENT 1 /*!< MPU present or not */ -#define __NVIC_PRIO_BITS 5 /*!< Number of Bits used for Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ - - -//#include "..\core_cm3.h" /* Cortex-M3 processor and core peripherals */ -#include "core_cm3.h" -#include "system_LPC17xx.h" /* System Header */ - - - -/** - * Initialize the system clock - * - * @param none - * @return none - * - * @brief Setup the microcontroller system. - * Initialize the System and update the SystemFrequency variable. - */ -extern void SystemInit (void); - - -/******************************************************************************/ -/* Device Specific Peripheral registers structures */ -/******************************************************************************/ - -/*------------- System Control (SC) ------------------------------------------*/ -typedef struct -{ - __IO uint32_t FLASHCFG; /* Flash Accelerator Module */ - uint32_t RESERVED0[31]; - __IO uint32_t PLL0CON; /* Clocking and Power Control */ - __IO uint32_t PLL0CFG; - __I uint32_t PLL0STAT; - __O uint32_t PLL0FEED; - uint32_t RESERVED1[4]; - __IO uint32_t PLL1CON; - __IO uint32_t PLL1CFG; - __I uint32_t PLL1STAT; - __O uint32_t PLL1FEED; - uint32_t RESERVED2[4]; - __IO uint32_t PCON; - __IO uint32_t PCONP; - uint32_t RESERVED3[15]; - __IO uint32_t CCLKCFG; - __IO uint32_t USBCLKCFG; - __IO uint32_t CLKSRCSEL; - uint32_t RESERVED4[12]; - __IO uint32_t EXTINT; /* External Interrupts */ - uint32_t RESERVED5; - __IO uint32_t EXTMODE; - __IO uint32_t EXTPOLAR; - uint32_t RESERVED6[12]; - __IO uint32_t RSID; /* Reset */ - uint32_t RESERVED7[7]; - __IO uint32_t SCS; /* Syscon Miscellaneous Registers */ - __IO uint32_t IRCTRIM; /* Clock Dividers */ - __IO uint32_t PCLKSEL0; - __IO uint32_t PCLKSEL1; - uint32_t RESERVED8[4]; - __IO uint32_t USBIntSt; /* USB Device/OTG Interrupt Register */ - uint32_t RESERVED9; - __IO uint32_t CLKOUTCFG; /* Clock Output Configuration */ - } SC_TypeDef; - -/*------------- Pin Connect Block (PINCON) -----------------------------------*/ -typedef struct -{ - __IO uint32_t PINSEL0; - __IO uint32_t PINSEL1; - __IO uint32_t PINSEL2; - __IO uint32_t PINSEL3; - __IO uint32_t PINSEL4; - __IO uint32_t PINSEL5; - __IO uint32_t PINSEL6; - __IO uint32_t PINSEL7; - __IO uint32_t PINSEL8; - __IO uint32_t PINSEL9; - __IO uint32_t PINSEL10; - uint32_t RESERVED0[5]; - __IO uint32_t PINMODE0; - __IO uint32_t PINMODE1; - __IO uint32_t PINMODE2; - __IO uint32_t PINMODE3; - __IO uint32_t PINMODE4; - __IO uint32_t PINMODE5; - __IO uint32_t PINMODE6; - __IO uint32_t PINMODE7; - __IO uint32_t PINMODE8; - __IO uint32_t PINMODE9; - __IO uint32_t PINMODE_OD0; - __IO uint32_t PINMODE_OD1; - __IO uint32_t PINMODE_OD2; - __IO uint32_t PINMODE_OD3; - __IO uint32_t PINMODE_OD4; -} PINCON_TypeDef; - -/*------------- General Purpose Input/Output (GPIO) --------------------------*/ -typedef struct -{ - __IO uint32_t FIODIR; - uint32_t RESERVED0[3]; - __IO uint32_t FIOMASK; - __IO uint32_t FIOPIN; - __IO uint32_t FIOSET; - __O uint32_t FIOCLR; -} GPIO_TypeDef; - -typedef struct -{ - __I uint32_t IntStatus; - __I uint32_t IO0IntStatR; - __I uint32_t IO0IntStatF; - __O uint32_t IO0IntClr; - __IO uint32_t IO0IntEnR; - __IO uint32_t IO0IntEnF; - uint32_t RESERVED0[3]; - __I uint32_t IO2IntStatR; - __I uint32_t IO2IntStatF; - __O uint32_t IO2IntClr; - __IO uint32_t IO2IntEnR; - __IO uint32_t IO2IntEnF; -} GPIOINT_TypeDef; - -/*------------- Timer (TIM) --------------------------------------------------*/ -typedef struct -{ - __IO uint32_t IR; - __IO uint32_t TCR; - __IO uint32_t TC; - __IO uint32_t PR; - __IO uint32_t PC; - __IO uint32_t MCR; - __IO uint32_t MR0; - __IO uint32_t MR1; - __IO uint32_t MR2; - __IO uint32_t MR3; - __IO uint32_t CCR; - __I uint32_t CR0; - __I uint32_t CR1; - uint32_t RESERVED0[2]; - __IO uint32_t EMR; - uint32_t RESERVED1[24]; - __IO uint32_t CTCR; -} TIM_TypeDef; - -/*------------- Pulse-Width Modulation (PWM) ---------------------------------*/ -typedef struct -{ - __IO uint32_t IR; - __IO uint32_t TCR; - __IO uint32_t TC; - __IO uint32_t PR; - __IO uint32_t PC; - __IO uint32_t MCR; - __IO uint32_t MR0; - __IO uint32_t MR1; - __IO uint32_t MR2; - __IO uint32_t MR3; - __IO uint32_t CCR; - __I uint32_t CR0; - __I uint32_t CR1; - __I uint32_t CR2; - __I uint32_t CR3; - __IO uint32_t MR4; - __IO uint32_t MR5; - __IO uint32_t MR6; - __IO uint32_t PCR; - __IO uint32_t LER; - uint32_t RESERVED0[7]; - __IO uint32_t CTCR; -} PWM_TypeDef; - -/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/ -typedef struct -{ - union { - __I uint8_t RBR; - __O uint8_t THR; - __IO uint8_t DLL; - uint32_t RESERVED0; - }; - union { - __IO uint8_t DLM; - __IO uint32_t IER; - }; - union { - __I uint32_t IIR; - __O uint8_t FCR; - }; - __IO uint8_t LCR; - uint8_t RESERVED1[7]; - __IO uint8_t LSR; - uint8_t RESERVED2[7]; - __IO uint8_t SCR; - uint8_t RESERVED3[3]; - __IO uint32_t ACR; - __IO uint8_t ICR; - uint8_t RESERVED4[3]; - __IO uint8_t FDR; - uint8_t RESERVED5[7]; - __IO uint8_t TER; - uint8_t RESERVED6[27]; - __IO uint8_t RS485CTRL; - uint8_t RESERVED7[3]; - __IO uint8_t ADRMATCH; -} UART_TypeDef; - -typedef struct -{ - union { - __I uint8_t RBR; - __O uint8_t THR; - __IO uint8_t DLL; - uint32_t RESERVED0; - }; - union { - __IO uint8_t DLM; - __IO uint32_t IER; - }; - union { - __I uint32_t IIR; - __O uint8_t FCR; - }; - __IO uint8_t LCR; - uint8_t RESERVED1[3]; - __IO uint8_t MCR; - uint8_t RESERVED2[3]; - __IO uint8_t LSR; - uint8_t RESERVED3[3]; - __IO uint8_t MSR; - uint8_t RESERVED4[3]; - __IO uint8_t SCR; - uint8_t RESERVED5[3]; - __IO uint32_t ACR; - uint32_t RESERVED6; - __IO uint32_t FDR; - uint32_t RESERVED7; - __IO uint8_t TER; - uint8_t RESERVED8[27]; - __IO uint8_t RS485CTRL; - uint8_t RESERVED9[3]; - __IO uint8_t ADRMATCH; - uint8_t RESERVED10[3]; - __IO uint8_t RS485DLY; -} UART1_TypeDef; - -/*------------- Serial Peripheral Interface (SPI) ----------------------------*/ -typedef struct -{ - __IO uint32_t SPCR; - __I uint32_t SPSR; - __IO uint32_t SPDR; - __IO uint32_t SPCCR; - uint32_t RESERVED0[3]; - __IO uint32_t SPINT; -} SPI_TypeDef; - -/*------------- Synchronous Serial Communication (SSP) -----------------------*/ -typedef struct -{ - __IO uint32_t CR0; - __IO uint32_t CR1; - __IO uint32_t DR; - __I uint32_t SR; - __IO uint32_t CPSR; - __IO uint32_t IMSC; - __IO uint32_t RIS; - __IO uint32_t MIS; - __IO uint32_t ICR; - __IO uint32_t DMACR; -} SSP_TypeDef; - -/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/ -typedef struct -{ - __IO uint32_t I2CONSET; - __I uint32_t I2STAT; - __IO uint32_t I2DAT; - __IO uint32_t I2ADR0; - __IO uint32_t I2SCLH; - __IO uint32_t I2SCLL; - __O uint32_t I2CONCLR; - __IO uint32_t MMCTRL; - __IO uint32_t I2ADR1; - __IO uint32_t I2ADR2; - __IO uint32_t I2ADR3; - __I uint32_t I2DATA_BUFFER; - __IO uint32_t I2MASK0; - __IO uint32_t I2MASK1; - __IO uint32_t I2MASK2; - __IO uint32_t I2MASK3; -} I2C_TypeDef; - -/*------------- Inter IC Sound (I2S) -----------------------------------------*/ -typedef struct -{ - __IO uint32_t I2SDAO; - __IO uint32_t I2SDAI; - __O uint32_t I2STXFIFO; - __I uint32_t I2SRXFIFO; - __I uint32_t I2SSTATE; - __IO uint32_t I2SDMA1; - __IO uint32_t I2SDMA2; - __IO uint32_t I2SIRQ; - __IO uint32_t I2STXRATE; - __IO uint32_t I2SRXRATE; - __IO uint32_t I2STXBITRATE; - __IO uint32_t I2SRXBITRATE; - __IO uint32_t I2STXMODE; - __IO uint32_t I2SRXMODE; -} I2S_TypeDef; - -/*------------- Repetitive Interrupt Timer (RIT) -----------------------------*/ -typedef struct -{ - __IO uint32_t RICOMPVAL; - __IO uint32_t RIMASK; - __IO uint8_t RICTRL; - uint8_t RESERVED0[3]; - __IO uint32_t RICOUNTER; -} RIT_TypeDef; - -/*------------- Real-Time Clock (RTC) ----------------------------------------*/ -typedef struct -{ - __IO uint8_t ILR; - uint8_t RESERVED0[3]; - __IO uint8_t CCR; - uint8_t RESERVED1[3]; - __IO uint8_t CIIR; - uint8_t RESERVED2[3]; - __IO uint8_t AMR; - uint8_t RESERVED3[3]; - __I uint32_t CTIME0; - __I uint32_t CTIME1; - __I uint32_t CTIME2; - __IO uint8_t SEC; - uint8_t RESERVED4[3]; - __IO uint8_t MIN; - uint8_t RESERVED5[3]; - __IO uint8_t HOUR; - uint8_t RESERVED6[3]; - __IO uint8_t DOM; - uint8_t RESERVED7[3]; - __IO uint8_t DOW; - uint8_t RESERVED8[3]; - __IO uint16_t DOY; - uint16_t RESERVED9; - __IO uint8_t MONTH; - uint8_t RESERVED10[3]; - __IO uint16_t YEAR; - uint16_t RESERVED11; - __IO uint32_t CALIBRATION; - __IO uint32_t GPREG0; - __IO uint32_t GPREG1; - __IO uint32_t GPREG2; - __IO uint32_t GPREG3; - __IO uint32_t GPREG4; - __IO uint8_t WAKEUPDIS; - uint8_t RESERVED12[3]; - __IO uint8_t PWRCTRL; - uint8_t RESERVED13[3]; - __IO uint8_t ALSEC; - uint8_t RESERVED14[3]; - __IO uint8_t ALMIN; - uint8_t RESERVED15[3]; - __IO uint8_t ALHOUR; - uint8_t RESERVED16[3]; - __IO uint8_t ALDOM; - uint8_t RESERVED17[3]; - __IO uint8_t ALDOW; - uint8_t RESERVED18[3]; - __IO uint16_t ALDOY; - uint16_t RESERVED19; - __IO uint8_t ALMON; - uint8_t RESERVED20[3]; - __IO uint16_t ALYEAR; - uint16_t RESERVED21; -} RTC_TypeDef; - -/*------------- Watchdog Timer (WDT) -----------------------------------------*/ -typedef struct -{ - __IO uint8_t WDMOD; - uint8_t RESERVED0[3]; - __IO uint32_t WDTC; - __O uint8_t WDFEED; - uint8_t RESERVED1[3]; - __I uint32_t WDTV; - __IO uint32_t WDCLKSEL; -} WDT_TypeDef; - -/*------------- Analog-to-Digital Converter (ADC) ----------------------------*/ -typedef struct -{ - __IO uint32_t ADCR; - __IO uint32_t ADGDR; - uint32_t RESERVED0; - __IO uint32_t ADINTEN; - __I uint32_t ADDR0; - __I uint32_t ADDR1; - __I uint32_t ADDR2; - __I uint32_t ADDR3; - __I uint32_t ADDR4; - __I uint32_t ADDR5; - __I uint32_t ADDR6; - __I uint32_t ADDR7; - __I uint32_t ADSTAT; - __IO uint32_t ADTRM; -} ADC_TypeDef; - -/*------------- Digital-to-Analog Converter (DAC) ----------------------------*/ -typedef struct -{ - __IO uint32_t DACR; - __IO uint32_t DACCTRL; - __IO uint16_t DACCNTVAL; -} DAC_TypeDef; - -/*------------- Motor Control Pulse-Width Modulation (MCPWM) -----------------*/ -typedef struct -{ - __I uint32_t MCCON; - __O uint32_t MCCON_SET; - __O uint32_t MCCON_CLR; - __I uint32_t MCCAPCON; - __O uint32_t MCCAPCON_SET; - __O uint32_t MCCAPCON_CLR; - __IO uint32_t MCTIM0; - __IO uint32_t MCTIM1; - __IO uint32_t MCTIM2; - __IO uint32_t MCPER0; - __IO uint32_t MCPER1; - __IO uint32_t MCPER2; - __IO uint32_t MCPW0; - __IO uint32_t MCPW1; - __IO uint32_t MCPW2; - __IO uint32_t MCDEADTIME; - __IO uint32_t MCCCP; - __IO uint32_t MCCR0; - __IO uint32_t MCCR1; - __IO uint32_t MCCR2; - __I uint32_t MCINTEN; - __O uint32_t MCINTEN_SET; - __O uint32_t MCINTEN_CLR; - __I uint32_t MCCNTCON; - __O uint32_t MCCNTCON_SET; - __O uint32_t MCCNTCON_CLR; - __I uint32_t MCINTFLAG; - __O uint32_t MCINTFLAG_SET; - __O uint32_t MCINTFLAG_CLR; - __O uint32_t MCCAP_CLR; -} MCPWM_TypeDef; - -/*------------- Quadrature Encoder Interface (QEI) ---------------------------*/ -typedef struct -{ - __O uint32_t QEICON; - __I uint32_t QEISTAT; - __IO uint32_t QEICONF; - __I uint32_t QEIPOS; - __IO uint32_t QEIMAXPOS; - __IO uint32_t CMPOS0; - __IO uint32_t CMPOS1; - __IO uint32_t CMPOS2; - __I uint32_t INXCNT; - __IO uint32_t INXCMP; - __IO uint32_t QEILOAD; - __I uint32_t QEITIME; - __I uint32_t QEIVEL; - __I uint32_t QEICAP; - __IO uint32_t VELCOMP; - __IO uint32_t FILTER; - uint32_t RESERVED0[998]; - __O uint32_t QEIIEC; - __O uint32_t QEIIES; - __I uint32_t QEIINTSTAT; - __I uint32_t QEIIE; - __O uint32_t QEICLR; - __O uint32_t QEISET; -} QEI_TypeDef; - -/*------------- Controller Area Network (CAN) --------------------------------*/ -typedef struct -{ - __IO uint32_t mask[512]; /* ID Masks */ -} CANAF_RAM_TypeDef; - -typedef struct /* Acceptance Filter Registers */ -{ - __IO uint32_t AFMR; - __IO uint32_t SFF_sa; - __IO uint32_t SFF_GRP_sa; - __IO uint32_t EFF_sa; - __IO uint32_t EFF_GRP_sa; - __IO uint32_t ENDofTable; - __I uint32_t LUTerrAd; - __I uint32_t LUTerr; -} CANAF_TypeDef; - -typedef struct /* Central Registers */ -{ - __I uint32_t CANTxSR; - __I uint32_t CANRxSR; - __I uint32_t CANMSR; -} CANCR_TypeDef; - -typedef struct /* Controller Registers */ -{ - __IO uint32_t MOD; - __O uint32_t CMR; - __IO uint32_t GSR; - __I uint32_t ICR; - __IO uint32_t IER; - __IO uint32_t BTR; - __IO uint32_t EWL; - __I uint32_t SR; - __IO uint32_t RFS; - __IO uint32_t RID; - __IO uint32_t RDA; - __IO uint32_t RDB; - __IO uint32_t TFI1; - __IO uint32_t TID1; - __IO uint32_t TDA1; - __IO uint32_t TDB1; - __IO uint32_t TFI2; - __IO uint32_t TID2; - __IO uint32_t TDA2; - __IO uint32_t TDB2; - __IO uint32_t TFI3; - __IO uint32_t TID3; - __IO uint32_t TDA3; - __IO uint32_t TDB3; -} CAN_TypeDef; - -/*------------- General Purpose Direct Memory Access (GPDMA) -----------------*/ -typedef struct /* Common Registers */ -{ - __I uint32_t DMACIntStat; - __I uint32_t DMACIntTCStat; - __O uint32_t DMACIntTCClear; - __I uint32_t DMACIntErrStat; - __O uint32_t DMACIntErrClr; - __I uint32_t DMACRawIntTCStat; - __I uint32_t DMACRawIntErrStat; - __I uint32_t DMACEnbldChns; - __IO uint32_t DMACSoftBReq; - __IO uint32_t DMACSoftSReq; - __IO uint32_t DMACSoftLBReq; - __IO uint32_t DMACSoftLSReq; - __IO uint32_t DMACConfig; - __IO uint32_t DMACSync; -} GPDMA_TypeDef; - -typedef struct /* Channel Registers */ -{ - __IO uint32_t DMACCSrcAddr; - __IO uint32_t DMACCDestAddr; - __IO uint32_t DMACCLLI; - __IO uint32_t DMACCControl; - __IO uint32_t DMACCConfig; -} GPDMACH_TypeDef; - -/*------------- Universal Serial Bus (USB) -----------------------------------*/ -typedef struct -{ - __I uint32_t HcRevision; /* USB Host Registers */ - __IO uint32_t HcControl; - __IO uint32_t HcCommandStatus; - __IO uint32_t HcInterruptStatus; - __IO uint32_t HcInterruptEnable; - __IO uint32_t HcInterruptDisable; - __IO uint32_t HcHCCA; - __I uint32_t HcPeriodCurrentED; - __IO uint32_t HcControlHeadED; - __IO uint32_t HcControlCurrentED; - __IO uint32_t HcBulkHeadED; - __IO uint32_t HcBulkCurrentED; - __I uint32_t HcDoneHead; - __IO uint32_t HcFmInterval; - __I uint32_t HcFmRemaining; - __I uint32_t HcFmNumber; - __IO uint32_t HcPeriodicStart; - __IO uint32_t HcLSTreshold; - __IO uint32_t HcRhDescriptorA; - __IO uint32_t HcRhDescriptorB; - __IO uint32_t HcRhStatus; - __IO uint32_t HcRhPortStatus1; - __IO uint32_t HcRhPortStatus2; - uint32_t RESERVED0[40]; - __I uint32_t Module_ID; - - __I uint32_t OTGIntSt; /* USB On-The-Go Registers */ - __IO uint32_t OTGIntEn; - __O uint32_t OTGIntSet; - __O uint32_t OTGIntClr; - __IO uint32_t OTGStCtrl; - __IO uint32_t OTGTmr; - uint32_t RESERVED1[58]; - - __I uint32_t USBDevIntSt; /* USB Device Interrupt Registers */ - __IO uint32_t USBDevIntEn; - __O uint32_t USBDevIntClr; - __O uint32_t USBDevIntSet; - - __O uint32_t USBCmdCode; /* USB Device SIE Command Registers */ - __I uint32_t USBCmdData; - - __I uint32_t USBRxData; /* USB Device Transfer Registers */ - __O uint32_t USBTxData; - __I uint32_t USBRxPLen; - __O uint32_t USBTxPLen; - __IO uint32_t USBCtrl; - __O uint32_t USBDevIntPri; - - __I uint32_t USBEpIntSt; /* USB Device Endpoint Interrupt Regs */ - __IO uint32_t USBEpIntEn; - __O uint32_t USBEpIntClr; - __O uint32_t USBEpIntSet; - __O uint32_t USBEpIntPri; - - __IO uint32_t USBReEp; /* USB Device Endpoint Realization Reg*/ - __O uint32_t USBEpInd; - __IO uint32_t USBMaxPSize; - - __I uint32_t USBDMARSt; /* USB Device DMA Registers */ - __O uint32_t USBDMARClr; - __O uint32_t USBDMARSet; - uint32_t RESERVED2[9]; - __IO uint32_t USBUDCAH; - __I uint32_t USBEpDMASt; - __O uint32_t USBEpDMAEn; - __O uint32_t USBEpDMADis; - __I uint32_t USBDMAIntSt; - __IO uint32_t USBDMAIntEn; - uint32_t RESERVED3[2]; - __I uint32_t USBEoTIntSt; - __O uint32_t USBEoTIntClr; - __O uint32_t USBEoTIntSet; - __I uint32_t USBNDDRIntSt; - __O uint32_t USBNDDRIntClr; - __O uint32_t USBNDDRIntSet; - __I uint32_t USBSysErrIntSt; - __O uint32_t USBSysErrIntClr; - __O uint32_t USBSysErrIntSet; - uint32_t RESERVED4[15]; - - __I uint32_t I2C_RX; /* USB OTG I2C Registers */ - __O uint32_t I2C_WO; - __I uint32_t I2C_STS; - __IO uint32_t I2C_CTL; - __IO uint32_t I2C_CLKHI; - __O uint32_t I2C_CLKLO; - uint32_t RESERVED5[823]; - - union { - __IO uint32_t USBClkCtrl; /* USB Clock Control Registers */ - __IO uint32_t OTGClkCtrl; - } ; - union { - __I uint32_t USBClkSt; - __I uint32_t OTGClkSt; - }; -} USB_TypeDef; - -/*------------- Ethernet Media Access Controller (EMAC) ----------------------*/ -typedef struct -{ - __IO uint32_t MAC1; /* MAC Registers */ - __IO uint32_t MAC2; - __IO uint32_t IPGT; - __IO uint32_t IPGR; - __IO uint32_t CLRT; - __IO uint32_t MAXF; - __IO uint32_t SUPP; - __IO uint32_t TEST; - __IO uint32_t MCFG; - __IO uint32_t MCMD; - __IO uint32_t MADR; - __O uint32_t MWTD; - __I uint32_t MRDD; - __I uint32_t MIND; - uint32_t RESERVED0[2]; - __IO uint32_t SA0; - __IO uint32_t SA1; - __IO uint32_t SA2; - uint32_t RESERVED1[45]; - __IO uint32_t Command; /* Control Registers */ - __I uint32_t Status; - __IO uint32_t RxDescriptor; - __IO uint32_t RxStatus; - __IO uint32_t RxDescriptorNumber; - __I uint32_t RxProduceIndex; - __IO uint32_t RxConsumeIndex; - __IO uint32_t TxDescriptor; - __IO uint32_t TxStatus; - __IO uint32_t TxDescriptorNumber; - __IO uint32_t TxProduceIndex; - __I uint32_t TxConsumeIndex; - uint32_t RESERVED2[10]; - __I uint32_t TSV0; - __I uint32_t TSV1; - __I uint32_t RSV; - uint32_t RESERVED3[3]; - __IO uint32_t FlowControlCounter; - __I uint32_t FlowControlStatus; - uint32_t RESERVED4[34]; - __IO uint32_t RxFilterCtrl; /* Rx Filter Registers */ - __IO uint32_t RxFilterWoLStatus; - __IO uint32_t RxFilterWoLClear; - uint32_t RESERVED5; - __IO uint32_t HashFilterL; - __IO uint32_t HashFilterH; - uint32_t RESERVED6[882]; - __I uint32_t IntStatus; /* Module Control Registers */ - __IO uint32_t IntEnable; - __O uint32_t IntClear; - __O uint32_t IntSet; - uint32_t RESERVED7; - __IO uint32_t PowerDown; - uint32_t RESERVED8; - __IO uint32_t Module_ID; -} EMAC_TypeDef; - -/******************************************************************************/ -/* Peripheral memory map */ -/******************************************************************************/ -/* Base addresses */ -#define FLASH_BASE (0x00000000UL) -#define RAM_BASE (0x10000000UL) -#define GPIO_BASE (0x2009C000UL) -#define APB0_BASE (0x40000000UL) -#define APB1_BASE (0x40080000UL) -#define AHB_BASE (0x50000000UL) -#define CM3_BASE (0xE0000000UL) - -/* APB0 peripherals */ -#define WDT_BASE (APB0_BASE + 0x00000) -#define TIM0_BASE (APB0_BASE + 0x04000) -#define TIM1_BASE (APB0_BASE + 0x08000) -#define UART0_BASE (APB0_BASE + 0x0C000) -#define UART1_BASE (APB0_BASE + 0x10000) -#define PWM1_BASE (APB0_BASE + 0x18000) -#define I2C0_BASE (APB0_BASE + 0x1C000) -#define SPI_BASE (APB0_BASE + 0x20000) -#define RTC_BASE (APB0_BASE + 0x24000) -#define GPIOINT_BASE (APB0_BASE + 0x28080) -#define PINCON_BASE (APB0_BASE + 0x2C000) -#define SSP1_BASE (APB0_BASE + 0x30000) -#define ADC_BASE (APB0_BASE + 0x34000) -#define CANAF_RAM_BASE (APB0_BASE + 0x38000) -#define CANAF_BASE (APB0_BASE + 0x3C000) -#define CANCR_BASE (APB0_BASE + 0x40000) -#define CAN1_BASE (APB0_BASE + 0x44000) -#define CAN2_BASE (APB0_BASE + 0x48000) -#define I2C1_BASE (APB0_BASE + 0x5C000) - -/* APB1 peripherals */ -#define SSP0_BASE (APB1_BASE + 0x08000) -#define DAC_BASE (APB1_BASE + 0x0C000) -#define TIM2_BASE (APB1_BASE + 0x10000) -#define TIM3_BASE (APB1_BASE + 0x14000) -#define UART2_BASE (APB1_BASE + 0x18000) -#define UART3_BASE (APB1_BASE + 0x1C000) -#define I2C2_BASE (APB1_BASE + 0x20000) -#define I2S_BASE (APB1_BASE + 0x28000) -#define RIT_BASE (APB1_BASE + 0x30000) -#define MCPWM_BASE (APB1_BASE + 0x38000) -#define QEI_BASE (APB1_BASE + 0x3C000) -#define SC_BASE (APB1_BASE + 0x7C000) - -/* AHB peripherals */ -#define EMAC_BASE (AHB_BASE + 0x00000) -#define GPDMA_BASE (AHB_BASE + 0x04000) -#define GPDMACH0_BASE (AHB_BASE + 0x04100) -#define GPDMACH1_BASE (AHB_BASE + 0x04120) -#define GPDMACH2_BASE (AHB_BASE + 0x04140) -#define GPDMACH3_BASE (AHB_BASE + 0x04160) -#define GPDMACH4_BASE (AHB_BASE + 0x04180) -#define GPDMACH5_BASE (AHB_BASE + 0x041A0) -#define GPDMACH6_BASE (AHB_BASE + 0x041C0) -#define GPDMACH7_BASE (AHB_BASE + 0x041E0) -#define USB_BASE (AHB_BASE + 0x0C000) - -/* GPIOs */ -#define GPIO0_BASE (GPIO_BASE + 0x00000) -#define GPIO1_BASE (GPIO_BASE + 0x00020) -#define GPIO2_BASE (GPIO_BASE + 0x00040) -#define GPIO3_BASE (GPIO_BASE + 0x00060) -#define GPIO4_BASE (GPIO_BASE + 0x00080) - - -/******************************************************************************/ -/* Peripheral declaration */ -/******************************************************************************/ -#define SC (( SC_TypeDef *) SC_BASE) -#define GPIO0 (( GPIO_TypeDef *) GPIO0_BASE) -#define GPIO1 (( GPIO_TypeDef *) GPIO1_BASE) -#define GPIO2 (( GPIO_TypeDef *) GPIO2_BASE) -#define GPIO3 (( GPIO_TypeDef *) GPIO3_BASE) -#define GPIO4 (( GPIO_TypeDef *) GPIO4_BASE) -#define WDT (( WDT_TypeDef *) WDT_BASE) -#define TIM0 (( TIM_TypeDef *) TIM0_BASE) -#define TIM1 (( TIM_TypeDef *) TIM1_BASE) -#define TIM2 (( TIM_TypeDef *) TIM2_BASE) -#define TIM3 (( TIM_TypeDef *) TIM3_BASE) -#define RIT (( RIT_TypeDef *) RIT_BASE) -#define UART0 (( UART_TypeDef *) UART0_BASE) -#define UART1 (( UART1_TypeDef *) UART1_BASE) -#define UART2 (( UART_TypeDef *) UART2_BASE) -#define UART3 (( UART_TypeDef *) UART3_BASE) -#define PWM1 (( PWM_TypeDef *) PWM1_BASE) -#define I2C0 (( I2C_TypeDef *) I2C0_BASE) -#define I2C1 (( I2C_TypeDef *) I2C1_BASE) -#define I2C2 (( I2C_TypeDef *) I2C2_BASE) -#define I2S (( I2S_TypeDef *) I2S_BASE) -#define SPI (( SPI_TypeDef *) SPI_BASE) -#define RTC (( RTC_TypeDef *) RTC_BASE) -#define GPIOINT (( GPIOINT_TypeDef *) GPIOINT_BASE) -#define PINCON (( PINCON_TypeDef *) PINCON_BASE) -#define SSP0 (( SSP_TypeDef *) SSP0_BASE) -#define SSP1 (( SSP_TypeDef *) SSP1_BASE) -#define ADC (( ADC_TypeDef *) ADC_BASE) -#define DAC (( DAC_TypeDef *) DAC_BASE) -#define CANAF_RAM ((CANAF_RAM_TypeDef *) CANAF_RAM_BASE) -#define CANAF (( CANAF_TypeDef *) CANAF_BASE) -#define CANCR (( CANCR_TypeDef *) CANCR_BASE) -#define CAN1 (( CAN_TypeDef *) CAN1_BASE) -#define CAN2 (( CAN_TypeDef *) CAN2_BASE) -#define MCPWM (( MCPWM_TypeDef *) MCPWM_BASE) -#define QEI (( QEI_TypeDef *) QEI_BASE) -#define EMAC (( EMAC_TypeDef *) EMAC_BASE) -#define GPDMA (( GPDMA_TypeDef *) GPDMA_BASE) -#define GPDMACH0 (( GPDMACH_TypeDef *) GPDMACH0_BASE) -#define GPDMACH1 (( GPDMACH_TypeDef *) GPDMACH1_BASE) -#define GPDMACH2 (( GPDMACH_TypeDef *) GPDMACH2_BASE) -#define GPDMACH3 (( GPDMACH_TypeDef *) GPDMACH3_BASE) -#define GPDMACH4 (( GPDMACH_TypeDef *) GPDMACH4_BASE) -#define GPDMACH5 (( GPDMACH_TypeDef *) GPDMACH5_BASE) -#define GPDMACH6 (( GPDMACH_TypeDef *) GPDMACH6_BASE) -#define GPDMACH7 (( GPDMACH_TypeDef *) GPDMACH7_BASE) -#define USB (( USB_TypeDef *) USB_BASE) - -#endif // __LPC17xx_H__ - - -#endif diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/core_cm3.h b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/core_cm3.h deleted file mode 100644 index b6f9696bf..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/core_cm3.h +++ /dev/null @@ -1,1367 +0,0 @@ -/****************************************************************************** - * @file: core_cm3.h - * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File - * @version: V1.20 - * @date: 22. May 2009 - *---------------------------------------------------------------------------- - * - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-Mx - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - -#ifndef __CM3_CORE_H__ -#define __CM3_CORE_H__ - -#ifdef __cplusplus - extern "C" { -#endif - -#define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */ -#define __CM3_CMSIS_VERSION_SUB (0x20) /*!< [15:0] CMSIS HAL sub version */ -#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x03) /*!< Cortex core */ - -/** - * Lint configuration \n - * ----------------------- \n - * - * The following Lint messages will be suppressed and not shown: \n - * \n - * --- Error 10: --- \n - * register uint32_t __regBasePri __asm("basepri"); \n - * Error 10: Expecting ';' \n - * \n - * --- Error 530: --- \n - * return(__regBasePri); \n - * Warning 530: Symbol '__regBasePri' (line 264) not initialized \n - * \n - * --- Error 550: --- \n - * __regBasePri = (basePri & 0x1ff); \n - * } \n - * Warning 550: Symbol '__regBasePri' (line 271) not accessed \n - * \n - * --- Error 754: --- \n - * uint32_t RESERVED0[24]; \n - * Info 754: local structure member '' (line 109, file ./cm3_core.h) not referenced \n - * \n - * --- Error 750: --- \n - * #define __CM3_CORE_H__ \n - * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced \n - * \n - * --- Error 528: --- \n - * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n - * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced \n - * \n - * --- Error 751: --- \n - * } InterruptType_Type; \n - * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced \n - * \n - * \n - * Note: To re-enable a Message, insert a space before 'lint' * \n - * - */ - -/*lint -save */ -/*lint -e10 */ -/*lint -e530 */ -/*lint -e550 */ -/*lint -e754 */ -/*lint -e750 */ -/*lint -e528 */ -/*lint -e751 */ - - -#include /* Include standard types */ - -#if defined (__ICCARM__) - #include /* IAR Intrinsics */ -#endif - - -#ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */ -#endif - - - - -/** - * IO definitions - * - * define access restrictions to peripheral registers - */ - -#ifdef __cplusplus -#define __I volatile /*!< defines 'read only' permissions */ -#else -#define __I volatile const /*!< defines 'read only' permissions */ -#endif -#define __O volatile /*!< defines 'write only' permissions */ -#define __IO volatile /*!< defines 'read / write' permissions */ - - - -/******************************************************************************* - * Register Abstraction - ******************************************************************************/ - - -/* System Reset */ -#define NVIC_VECTRESET 0 /*!< Vector Reset Bit */ -#define NVIC_SYSRESETREQ 2 /*!< System Reset Request */ -#define NVIC_AIRCR_VECTKEY (0x5FA << 16) /*!< AIRCR Key for write access */ -#define NVIC_AIRCR_ENDIANESS 15 /*!< Endianess */ - -/* Core Debug */ -#define CoreDebug_DEMCR_TRCENA (1 << 24) /*!< DEMCR TRCENA enable */ -#define ITM_TCR_ITMENA 1 /*!< ITM enable */ - - - - -/* memory mapping struct for Nested Vectored Interrupt Controller (NVIC) */ -typedef struct -{ - __IO uint32_t ISER[8]; /*!< Interrupt Set Enable Register */ - uint32_t RESERVED0[24]; - __IO uint32_t ICER[8]; /*!< Interrupt Clear Enable Register */ - uint32_t RSERVED1[24]; - __IO uint32_t ISPR[8]; /*!< Interrupt Set Pending Register */ - uint32_t RESERVED2[24]; - __IO uint32_t ICPR[8]; /*!< Interrupt Clear Pending Register */ - uint32_t RESERVED3[24]; - __IO uint32_t IABR[8]; /*!< Interrupt Active bit Register */ - uint32_t RESERVED4[56]; - __IO uint8_t IP[240]; /*!< Interrupt Priority Register, 8Bit wide */ - uint32_t RESERVED5[644]; - __O uint32_t STIR; /*!< Software Trigger Interrupt Register */ -} NVIC_Type; - - -/* memory mapping struct for System Control Block */ -typedef struct -{ - __I uint32_t CPUID; /*!< CPU ID Base Register */ - __IO uint32_t ICSR; /*!< Interrupt Control State Register */ - __IO uint32_t VTOR; /*!< Vector Table Offset Register */ - __IO uint32_t AIRCR; /*!< Application Interrupt / Reset Control Register */ - __IO uint32_t SCR; /*!< System Control Register */ - __IO uint32_t CCR; /*!< Configuration Control Register */ - __IO uint8_t SHP[12]; /*!< System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IO uint32_t SHCSR; /*!< System Handler Control and State Register */ - __IO uint32_t CFSR; /*!< Configurable Fault Status Register */ - __IO uint32_t HFSR; /*!< Hard Fault Status Register */ - __IO uint32_t DFSR; /*!< Debug Fault Status Register */ - __IO uint32_t MMFAR; /*!< Mem Manage Address Register */ - __IO uint32_t BFAR; /*!< Bus Fault Address Register */ - __IO uint32_t AFSR; /*!< Auxiliary Fault Status Register */ - __I uint32_t PFR[2]; /*!< Processor Feature Register */ - __I uint32_t DFR; /*!< Debug Feature Register */ - __I uint32_t ADR; /*!< Auxiliary Feature Register */ - __I uint32_t MMFR[4]; /*!< Memory Model Feature Register */ - __I uint32_t ISAR[5]; /*!< ISA Feature Register */ -} SCB_Type; - - -/* memory mapping struct for SysTick */ -typedef struct -{ - __IO uint32_t CTRL; /*!< SysTick Control and Status Register */ - __IO uint32_t LOAD; /*!< SysTick Reload Value Register */ - __IO uint32_t VAL; /*!< SysTick Current Value Register */ - __I uint32_t CALIB; /*!< SysTick Calibration Register */ -} SysTick_Type; - - -/* memory mapping structur for ITM */ -typedef struct -{ - __O union - { - __O uint8_t u8; /*!< ITM Stimulus Port 8-bit */ - __O uint16_t u16; /*!< ITM Stimulus Port 16-bit */ - __O uint32_t u32; /*!< ITM Stimulus Port 32-bit */ - } PORT [32]; /*!< ITM Stimulus Port Registers */ - uint32_t RESERVED0[864]; - __IO uint32_t TER; /*!< ITM Trace Enable Register */ - uint32_t RESERVED1[15]; - __IO uint32_t TPR; /*!< ITM Trace Privilege Register */ - uint32_t RESERVED2[15]; - __IO uint32_t TCR; /*!< ITM Trace Control Register */ - uint32_t RESERVED3[29]; - __IO uint32_t IWR; /*!< ITM Integration Write Register */ - __IO uint32_t IRR; /*!< ITM Integration Read Register */ - __IO uint32_t IMCR; /*!< ITM Integration Mode Control Register */ - uint32_t RESERVED4[43]; - __IO uint32_t LAR; /*!< ITM Lock Access Register */ - __IO uint32_t LSR; /*!< ITM Lock Status Register */ - uint32_t RESERVED5[6]; - __I uint32_t PID4; /*!< ITM Product ID Registers */ - __I uint32_t PID5; - __I uint32_t PID6; - __I uint32_t PID7; - __I uint32_t PID0; - __I uint32_t PID1; - __I uint32_t PID2; - __I uint32_t PID3; - __I uint32_t CID0; - __I uint32_t CID1; - __I uint32_t CID2; - __I uint32_t CID3; -} ITM_Type; - - -/* memory mapped struct for Interrupt Type */ -typedef struct -{ - uint32_t RESERVED0; - __I uint32_t ICTR; /*!< Interrupt Control Type Register */ -#if ((defined __CM3_REV) && (__CM3_REV >= 0x200)) - __IO uint32_t ACTLR; /*!< Auxiliary Control Register */ -#else - uint32_t RESERVED1; -#endif -} InterruptType_Type; - - -/* Memory Protection Unit */ -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) -typedef struct -{ - __I uint32_t TYPE; /*!< MPU Type Register */ - __IO uint32_t CTRL; /*!< MPU Control Register */ - __IO uint32_t RNR; /*!< MPU Region RNRber Register */ - __IO uint32_t RBAR; /*!< MPU Region Base Address Register */ - __IO uint32_t RASR; /*!< MPU Region Attribute and Size Register */ - __IO uint32_t RBAR_A1; /*!< MPU Alias 1 Region Base Address Register */ - __IO uint32_t RASR_A1; /*!< MPU Alias 1 Region Attribute and Size Register */ - __IO uint32_t RBAR_A2; /*!< MPU Alias 2 Region Base Address Register */ - __IO uint32_t RASR_A2; /*!< MPU Alias 2 Region Attribute and Size Register */ - __IO uint32_t RBAR_A3; /*!< MPU Alias 3 Region Base Address Register */ - __IO uint32_t RASR_A3; /*!< MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; -#endif - - -/* Core Debug Register */ -typedef struct -{ - __IO uint32_t DHCSR; /*!< Debug Halting Control and Status Register */ - __O uint32_t DCRSR; /*!< Debug Core Register Selector Register */ - __IO uint32_t DCRDR; /*!< Debug Core Register Data Register */ - __IO uint32_t DEMCR; /*!< Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - - -/* Memory mapping of Cortex-M3 Hardware */ -#define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000) /*!< ITM Base Address */ -#define CoreDebug_BASE (0xE000EDF0) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */ - -#define InterruptType ((InterruptType_Type *) SCS_BASE) /*!< Interrupt Type Register */ -#define SCB ((SCB_Type *) SCB_BASE) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) - #define MPU_BASE (SCS_BASE + 0x0D90) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type*) MPU_BASE) /*!< Memory Protection Unit */ -#endif - - - -/******************************************************************************* - * Hardware Abstraction Layer - ******************************************************************************/ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - -#endif - - -/* ################### Compiler specific Intrinsics ########################### */ - -#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ -/* ARM armcc specific functions */ - -#define __enable_fault_irq __enable_fiq -#define __disable_fault_irq __disable_fiq - -#define __NOP __nop -#define __WFI __wfi -#define __WFE __wfe -#define __SEV __sev -#define __ISB() __isb(0) -#define __DSB() __dsb(0) -#define __DMB() __dmb(0) -#define __REV __rev -#define __RBIT __rbit -#define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr)) -#define __LDREXH(ptr) ((unsigned short) __ldrex(ptr)) -#define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr)) -#define __STREXB(value, ptr) __strex(value, ptr) -#define __STREXH(value, ptr) __strex(value, ptr) -#define __STREXW(value, ptr) __strex(value, ptr) - - -/* intrinsic unsigned long long __ldrexd(volatile void *ptr) */ -/* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */ -/* intrinsic void __enable_irq(); */ -/* intrinsic void __disable_irq(); */ - - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/* - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param int16_t value to reverse - * @return int32_t reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - - -#if (__ARMCC_VERSION < 400000) - -/** - * @brief Remove the exclusive lock created by ldrex - * - * @param none - * @return none - * - * Removes the exclusive lock which is created by ldrex. - */ -extern void __CLREX(void); - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value - * - * @param none - * @return uint32_t Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -#else /* (__ARMCC_VERSION >= 400000) */ - - -/** - * @brief Remove the exclusive lock created by ldrex - * - * @param none - * @return none - * - * Removes the exclusive lock which is created by ldrex. - */ -#define __CLREX __clrex - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -static __INLINE uint32_t __get_BASEPRI(void) -{ - register uint32_t __regBasePri __ASM("basepri"); - return(__regBasePri); -} - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -static __INLINE void __set_BASEPRI(uint32_t basePri) -{ - register uint32_t __regBasePri __ASM("basepri"); - __regBasePri = (basePri & 0x1ff); -} - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -static __INLINE uint32_t __get_PRIMASK(void) -{ - register uint32_t __regPriMask __ASM("primask"); - return(__regPriMask); -} - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -static __INLINE void __set_PRIMASK(uint32_t priMask) -{ - register uint32_t __regPriMask __ASM("primask"); - __regPriMask = (priMask); -} - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -static __INLINE uint32_t __get_FAULTMASK(void) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - return(__regFaultMask); -} - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -static __INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - __regFaultMask = (faultMask & 1); -} - -/** - * @brief Return the Control Register value - * - * @param none - * @return uint32_t Control value - * - * Return the content of the control register - */ -static __INLINE uint32_t __get_CONTROL(void) -{ - register uint32_t __regControl __ASM("control"); - return(__regControl); -} - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -static __INLINE void __set_CONTROL(uint32_t control) -{ - register uint32_t __regControl __ASM("control"); - __regControl = control; -} - -#endif /* __ARMCC_VERSION */ - - - -#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ -/* IAR iccarm specific functions */ - -#define __enable_irq __enable_interrupt /*!< global Interrupt enable */ -#define __disable_irq __disable_interrupt /*!< global Interrupt disable */ - -static __INLINE void __enable_fault_irq() { __ASM ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM ("cpsid f"); } - -#define __NOP __no_operation() /*!< no operation intrinsic in IAR Compiler */ -static __INLINE void __WFI() { __ASM ("wfi"); } -static __INLINE void __WFE() { __ASM ("wfe"); } -static __INLINE void __SEV() { __ASM ("sev"); } -static __INLINE void __CLREX() { __ASM ("clrex"); } - -/* intrinsic void __ISB(void) */ -/* intrinsic void __DSB(void) */ -/* intrinsic void __DMB(void) */ -/* intrinsic void __set_PRIMASK(); */ -/* intrinsic void __get_PRIMASK(); */ -/* intrinsic void __set_FAULTMASK(); */ -/* intrinsic void __get_FAULTMASK(); */ -/* intrinsic uint32_t __REV(uint32_t value); */ -/* intrinsic uint32_t __REVSH(uint32_t value); */ -/* intrinsic unsigned long __STREX(unsigned long, unsigned long); */ -/* intrinsic unsigned long __LDREX(unsigned long *); */ - - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse bit order of value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive - * - * @param uint8_t* address - * @return uint8_t value of (*address) - * - * Exclusive LDR command - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint16_t* address - * @return uint16_t value of (*address) - * - * Exclusive LDR command - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint32_t* address - * @return uint32_t value of (*address) - * - * Exclusive LDR command - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint8_t *address - * @param uint8_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint16_t *address - * @param uint16_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint32_t *address - * @param uint32_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - - -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ -/* GNU gcc specific functions */ - -static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); } -static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); } - -static __INLINE void __enable_fault_irq() { __ASM volatile ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM volatile ("cpsid f"); } - -static __INLINE void __NOP() { __ASM volatile ("nop"); } -static __INLINE void __WFI() { __ASM volatile ("wfi"); } -static __INLINE void __WFE() { __ASM volatile ("wfe"); } -static __INLINE void __SEV() { __ASM volatile ("sev"); } -static __INLINE void __ISB() { __ASM volatile ("isb"); } -static __INLINE void __DSB() { __ASM volatile ("dsb"); } -static __INLINE void __DMB() { __ASM volatile ("dmb"); } -static __INLINE void __CLREX() { __ASM volatile ("clrex"); } - - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value -* -* @param none -* @return uint32_t Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -/** - * @brief Reverse byte order in integer value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in integer value - */ -extern uint32_t __REV(uint32_t value); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/* - * Reverse byte order in signed short value with sign extension to integer - * - * @param int16_t value to reverse - * @return int32_t reversed value - * - * @brief Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - -/** - * @brief Reverse bit order of value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive - * - * @param uint8_t* address - * @return uint8_t value of (*address) - * - * Exclusive LDR command - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint16_t* address - * @return uint16_t value of (*address) - * - * Exclusive LDR command - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint32_t* address - * @return uint32_t value of (*address) - * - * Exclusive LDR command - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint8_t *address - * @param uint8_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint16_t *address - * @param uint16_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint32_t *address - * @param uint32_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - -#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ -/* TASKING carm specific functions */ - -/* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all instrinsics, - * Including the CMSIS ones. - */ - -#endif - - - -/* ########################## NVIC functions #################################### */ - - -/** - * @brief Set the Priority Grouping in NVIC Interrupt Controller - * - * @param uint32_t priority_grouping is priority grouping field - * @return none - * - * Set the priority grouping field using the required unlock sequence. - * The parameter priority_grouping is assigned to the field - * SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - */ -static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((0xFFFFU << 16) | (0x0F << 8)); /* clear bits to change */ - reg_value = ((reg_value | NVIC_AIRCR_VECTKEY | (PriorityGroupTmp << 8))); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - -/** - * @brief Get the Priority Grouping from NVIC Interrupt Controller - * - * @param none - * @return uint32_t priority grouping field - * - * Get the priority grouping from NVIC Interrupt Controller. - * priority grouping is SCB->AIRCR [10:8] PRIGROUP field. - */ -static __INLINE uint32_t NVIC_GetPriorityGrouping(void) -{ - return ((SCB->AIRCR >> 8) & 0x07); /* read priority grouping field */ -} - -/** - * @brief Enable Interrupt in NVIC Interrupt Controller - * - * @param IRQn_Type IRQn specifies the interrupt number - * @return none - * - * Enable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ -} - -/** - * @brief Disable the interrupt line for external interrupt specified - * - * @param IRQn_Type IRQn is the positive number of the external interrupt - * @return none - * - * Disable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ -} - -/** - * @brief Read the interrupt pending bit for a device specific interrupt source - * - * @param IRQn_Type IRQn is the number of the device specifc interrupt - * @return uint32_t 1 if pending interrupt else 0 - * - * Read the pending register in NVIC and return 1 if its status is pending, - * otherwise it returns 0 - */ -static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */ -} - -/** - * @brief Set the pending bit for an external interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return none - * - * Set the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ -} - -/** - * @brief Clear the pending bit for an external interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return none - * - * Clear the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */ -} - -/** - * @brief Read the active bit for an external interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return uint32_t 1 if active else 0 - * - * Read the active register in NVIC and returns 1 if its status is active, - * otherwise it returns 0. - */ -static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) -{ - return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */ -} - -/** - * @brief Set the priority for an interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @param priority is the priority for the interrupt - * @return none - * - * Set the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. \n - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if(IRQn < 0) { - SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M3 System Interrupts */ - else { - NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */ -} - -/** - * @brief Read the priority for an interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return uint32_t priority is the priority for the interrupt - * - * Read the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. - * - * The returned priority value is automatically aligned to the implemented - * priority bits of the microcontroller. - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if(IRQn < 0) { - return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M3 system interrupts */ - else { - return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */ -} - - -/** - * @brief Encode the priority for an interrupt - * - * @param uint32_t PriorityGroup is the used priority group - * @param uint32_t PreemptPriority is the preemptive priority value (starting from 0) - * @param uint32_t SubPriority is the sub priority value (starting from 0) - * @return uint32_t the priority for the interrupt - * - * Encode the priority for an interrupt with the given priority group, - * preemptive priority value and sub priority value. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. - * - * The returned priority value can be used for NVIC_SetPriority(...) function - */ -static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; - SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; - - return ( - ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) | - ((SubPriority & ((1 << (SubPriorityBits )) - 1))) - ); -} - - -/** - * @brief Decode the priority of an interrupt - * - * @param uint32_t Priority the priority for the interrupt - * @param uint32_t PrioGroup is the used priority group - * @param uint32_t* pPreemptPrio is the preemptive priority value (starting from 0) - * @param uint32_t* pSubPrio is the sub priority value (starting from 0) - * @return none - * - * Decode an interrupt priority value with the given priority group to - * preemptive priority value and sub priority value. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. - * - * The priority value can be retrieved with NVIC_GetPriority(...) function - */ -static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; - SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; - - *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1); - *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1); -} - - - -/* ################################## SysTick function ############################################ */ - -#if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0) - -/* SysTick constants */ -#define SYSTICK_ENABLE 0 /* Config-Bit to start or stop the SysTick Timer */ -#define SYSTICK_TICKINT 1 /* Config-Bit to enable or disable the SysTick interrupt */ -#define SYSTICK_CLKSOURCE 2 /* Clocksource has the offset 2 in SysTick Control and Status Register */ -#define SYSTICK_MAXCOUNT ((1<<24) -1) /* SysTick MaxCount */ - -/** - * @brief Initialize and start the SysTick counter and its interrupt. - * - * @param uint32_t ticks is the number of ticks between two interrupts - * @return none - * - * Initialise the system tick timer and its interrupt and start the - * system tick timer / counter in free running mode to generate - * periodical interrupts. - */ -static __INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if (ticks > SYSTICK_MAXCOUNT) return (1); /* Reload value impossible */ - - SysTick->LOAD = (ticks & SYSTICK_MAXCOUNT) - 1; /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */ - SysTick->VAL = (0x00); /* Load the SysTick Counter Value */ - SysTick->CTRL = (1 << SYSTICK_CLKSOURCE) | (1<AIRCR = (NVIC_AIRCR_VECTKEY | (SCB->AIRCR & (0x700)) | (1<DEMCR & CoreDebug_DEMCR_TRCENA) && - (ITM->TCR & ITM_TCR_ITMENA) && - (ITM->TER & (1UL << 0)) ) - { - while (ITM->PORT[0].u32 == 0); - ITM->PORT[0].u8 = (uint8_t) ch; - } - return (ch); -} - -#ifdef __cplusplus -} -#endif - -#endif /* __CM3_CORE_H__ */ - -/*lint -restore */ diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/cr_startup_lpc17.c b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/cr_startup_lpc17.c deleted file mode 100644 index 8c891ac74..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/cr_startup_lpc17.c +++ /dev/null @@ -1,361 +0,0 @@ -//***************************************************************************** -// +--+ -// | ++----+ -// +-++ | -// | | -// +-+--+ | -// | +--+--+ -// +----+ Copyright (c) 2009 Code Red Technologies Ltd. -// -// Microcontroller Startup code for use with Red Suite -// -// Software License Agreement -// -// The software is owned by Code Red Technologies and/or its suppliers, and is -// protected under applicable copyright laws. All rights are reserved. Any -// use in violation of the foregoing restrictions may subject the user to criminal -// sanctions under applicable laws, as well as to civil liability for the breach -// of the terms and conditions of this license. -// -// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED -// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. -// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT -// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH -// CODE RED TECHNOLOGIES LTD. -// -//***************************************************************************** -#define WEAK __attribute__ ((weak)) -#define ALIAS(f) __attribute__ ((weak, alias (#f))) - -//***************************************************************************** -// -// Forward declaration of the default handlers. -// -//***************************************************************************** -void Reset_Handler(void); -void ResetISR(void) ALIAS(Reset_Handler); -static void NMI_Handler(void); -static void HardFault_Handler(void); -static void MemManage_Handler(void) __attribute__((naked)); -static void BusFault_Handler(void) __attribute__((naked)); -static void UsageFault_Handler(void) __attribute__((naked)); -static void DebugMon_Handler(void); - -//***************************************************************************** -// -// Forward declaration of the specific IRQ handlers. These are aliased -// to the IntDefaultHandler, which is a 'forever' loop. When the application -// defines a handler (with the same name), this will automatically take -// precedence over these weak definitions -// -//***************************************************************************** -void WDT_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART0_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART1_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART2_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART3_IRQHandler(void) ALIAS(IntDefaultHandler); -void PWM1_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2C2_IRQHandler(void) ALIAS(IntDefaultHandler); -void SPI_IRQHandler(void) ALIAS(IntDefaultHandler); -void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler); -void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler); -void PLL0_IRQHandler(void) ALIAS(IntDefaultHandler); -void RTC_IRQHandler(void) ALIAS(IntDefaultHandler); -void EINT0_IRQHandler(void) ALIAS(IntDefaultHandler); -void EINT1_IRQHandler(void) ALIAS(IntDefaultHandler); -void EINT2_IRQHandler(void) ALIAS(IntDefaultHandler); -void EINT3_IRQHandler(void) ALIAS(IntDefaultHandler); -void ADC_IRQHandler(void) ALIAS(IntDefaultHandler); -void BOD_IRQHandler(void) ALIAS(IntDefaultHandler); -void USB_IRQHandler(void) ALIAS(IntDefaultHandler); -void CAN_IRQHandler(void) ALIAS(IntDefaultHandler); -void DMA_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2S_IRQHandler(void) ALIAS(IntDefaultHandler); -void ENET_IRQHandler(void) ALIAS(IntDefaultHandler); -void RIT_IRQHandler(void) ALIAS(IntDefaultHandler); -void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler); -void QEI_IRQHandler(void) ALIAS(IntDefaultHandler); -void PLL1_IRQHandler(void) ALIAS(IntDefaultHandler); - -extern void xPortSysTickHandler(void); -extern void xPortPendSVHandler(void); -extern void vPortSVCHandler( void ); - - -//***************************************************************************** -// -// The entry point for the C++ library startup -// -//***************************************************************************** -extern WEAK void __libc_init_array(void); - -//***************************************************************************** -// -// The entry point for the application. -// __main() is the entry point for redlib based applications -// main() is the entry point for newlib based applications -// -//***************************************************************************** -extern WEAK void __main(void); -extern WEAK void main(void); -//***************************************************************************** -// -// External declaration for the pointer to the stack top from the Linker Script -// -//***************************************************************************** -extern void _vStackTop; - -//***************************************************************************** -// -// The vector table. -// This relies on the linker script to place at correct location in memory. -// -//***************************************************************************** -__attribute__ ((section(".isr_vector"))) -void (* const g_pfnVectors[])(void) = -{ - // Core Level - CM3 - (void *)&_vStackTop, // The initial stack pointer - Reset_Handler, // The reset handler - NMI_Handler, // The NMI handler - HardFault_Handler, // The hard fault handler - MemManage_Handler, // The MPU fault handler - BusFault_Handler, // The bus fault handler - UsageFault_Handler, // The usage fault handler - 0, // Reserved - 0, // Reserved - 0, // Reserved - 0, // Reserved - vPortSVCHandler, // SVCall handler - DebugMon_Handler, // Debug monitor handler - 0, // Reserved - xPortPendSVHandler, // The PendSV handler - xPortSysTickHandler, // The SysTick handler - - // Chip Level - LPC17 - WDT_IRQHandler, // 16, 0x40 - WDT - TIMER0_IRQHandler, // 17, 0x44 - TIMER0 - TIMER1_IRQHandler, // 18, 0x48 - TIMER1 - TIMER2_IRQHandler, // 19, 0x4c - TIMER2 - TIMER3_IRQHandler, // 20, 0x50 - TIMER3 - UART0_IRQHandler, // 21, 0x54 - UART0 - UART1_IRQHandler, // 22, 0x58 - UART1 - UART2_IRQHandler, // 23, 0x5c - UART2 - UART3_IRQHandler, // 24, 0x60 - UART3 - PWM1_IRQHandler, // 25, 0x64 - PWM1 - I2C0_IRQHandler, // 26, 0x68 - I2C0 - I2C1_IRQHandler, // 27, 0x6c - I2C1 - I2C2_IRQHandler, // 28, 0x70 - I2C2 - SPI_IRQHandler, // 29, 0x74 - SPI - SSP0_IRQHandler, // 30, 0x78 - SSP0 - SSP1_IRQHandler, // 31, 0x7c - SSP1 - PLL0_IRQHandler, // 32, 0x80 - PLL0 (Main PLL) - RTC_IRQHandler, // 33, 0x84 - RTC - EINT0_IRQHandler, // 34, 0x88 - EINT0 - EINT1_IRQHandler, // 35, 0x8c - EINT1 - EINT2_IRQHandler, // 36, 0x90 - EINT2 - EINT3_IRQHandler, // 37, 0x94 - EINT3 - ADC_IRQHandler, // 38, 0x98 - ADC - BOD_IRQHandler, // 39, 0x9c - BOD - USB_IRQHandler, // 40, 0xA0 - USB - CAN_IRQHandler, // 41, 0xa4 - CAN - DMA_IRQHandler, // 42, 0xa8 - GP DMA - I2S_IRQHandler, // 43, 0xac - I2S - ENET_IRQHandler, // Ethernet. - RIT_IRQHandler, // 45, 0xb4 - RITINT - MCPWM_IRQHandler, // 46, 0xb8 - Motor Control PWM - QEI_IRQHandler, // 47, 0xbc - Quadrature Encoder - PLL1_IRQHandler, // 48, 0xc0 - PLL1 (USB PLL) -}; - -//***************************************************************************** -// -// The following are constructs created by the linker, indicating where the -// the "data" and "bss" segments reside in memory. The initializers for the -// for the "data" segment resides immediately following the "text" segment. -// -//***************************************************************************** -extern unsigned long _etext; -extern unsigned long _data; -extern unsigned long _edata; -extern unsigned long _bss; -extern unsigned long _ebss; -extern unsigned long __privileged_data_start__; -extern unsigned long __privileged_data_end__; - -//***************************************************************************** -// Reset entry point for your code. -// Sets up a simple runtime environment and initializes the C/C++ -// library. -// -//***************************************************************************** -void Reset_Handler(void) -{ - unsigned long *pulSrc, *pulDest; - - // - // Copy the data segment initializers from flash to SRAM. - // - pulSrc = &_etext; - for(pulDest = &_data; pulDest < &_edata; ) - { - *pulDest++ = *pulSrc++; - } - - // - // Zero fill the bss segment. This is done with inline assembly since this - // will clear the value of pulDest if it is not kept in a register. - // - __asm(" ldr r0, =_bss\n" - " ldr r1, =_ebss\n" - " mov r2, #0\n" - " .thumb_func\n" - "zero_loop_bss:\n" - " cmp r0, r1\n" - " it lt\n" - " strlt r2, [r0], #4\n" - " blt zero_loop_bss"); - - - // - // Call C++ library initilisation, if present - // - if (__libc_init_array) - __libc_init_array() ; - - // - // Call the application's entry point. - // __main() is the entry point for redlib based applications (which calls main()) - // main() is the entry point for newlib based applications - // - if (__main) - __main() ; - else - main() ; - - // - // main() shouldn't return, but if it does, we'll just enter an infinite loop - // - while (1) { - ; - } -} - -//***************************************************************************** -// -// This is the code that gets called when the processor receives a NMI. This -// simply enters an infinite loop, preserving the system state for examination -// by a debugger. -// -//***************************************************************************** -static void NMI_Handler(void) -{ - while(1) - { - } -} - -static void HardFault_Handler(void) -{ - for( ;; ); -} - -void pop_registers_from_fault_stack(unsigned int * hardfault_args) -{ -unsigned int stacked_r0; -unsigned int stacked_r1; -unsigned int stacked_r2; -unsigned int stacked_r3; -unsigned int stacked_r12; -unsigned int stacked_lr; -unsigned int stacked_pc; -unsigned int stacked_psr; - - stacked_r0 = ((unsigned long) hardfault_args[0]); - stacked_r1 = ((unsigned long) hardfault_args[1]); - stacked_r2 = ((unsigned long) hardfault_args[2]); - stacked_r3 = ((unsigned long) hardfault_args[3]); - - stacked_r12 = ((unsigned long) hardfault_args[4]); - stacked_lr = ((unsigned long) hardfault_args[5]); - stacked_pc = ((unsigned long) hardfault_args[6]); - stacked_psr = ((unsigned long) hardfault_args[7]); - - /* Inspect stacked_pc to locate the offending instruction. */ - for( ;; ); -} - -static void MemManage_Handler(void) -{ - __asm volatile - ( - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - " ldr r1, [r0, #24] \n" - " ldr r2, handler2_address_const \n" - " bx r2 \n" - " handler2_address_const: .word pop_registers_from_fault_stack \n" - ); -} - -static void BusFault_Handler(void) -{ - __asm volatile - ( - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - " ldr r1, [r0, #24] \n" - " ldr r2, handler3_address_const \n" - " bx r2 \n" - " handler3_address_const: .word pop_registers_from_fault_stack \n" - ); -} - -static void UsageFault_Handler(void) -{ - __asm volatile - ( - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - " ldr r1, [r0, #24] \n" - " ldr r2, handler4_address_const \n" - " bx r2 \n" - " handler4_address_const: .word pop_registers_from_fault_stack \n" - ); -} - -static void DebugMon_Handler(void) -{ - while(1) - { - } -} - -//***************************************************************************** -// -// Processor ends up here if an unexpected interrupt occurs or a handler -// is not present in the application code. -// -//***************************************************************************** -static void IntDefaultHandler(void) -{ - // - // Go into an infinite loop. - // - while(1) - { - } -} diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/main.c b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/main.c deleted file mode 100644 index 9688d92e6..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/main.c +++ /dev/null @@ -1,1008 +0,0 @@ -/* - FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#error "The batch file Demo\CORTEX_LPC1768_GCC_RedSuite\CreateProjectDirectoryStructure.bat must be executed before the first build. After executing the batch file hit F5 to refrech the Eclipse project, then delete this line." - - -/* - * This file demonstrates the use of FreeRTOS-MPU. It creates tasks in both - * User mode and Privileged mode, and using both the original xTaskCreate() and - * the new xTaskCreateRestricted() API functions. The purpose of each created - * task is documented in the comments above the task function prototype (in - * this file), with the task behaviour demonstrated and documented within the - * task function itself. In addition a queue is used to demonstrate passing - * data between protected/restricted tasks as well as passing data between an - * interrupt and a protected/restricted task. - */ - - - -/* Library includes. */ -#include - -/* Scheduler includes. */ -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" -#include "semphr.h" - -/* Red Suite includes. */ -#include "lcd_driver.h" -#include "lcd.h" - - -/*-----------------------------------------------------------*/ - -/* Misc constants. */ -#define mainDONT_BLOCK ( 0 ) - -/* Definitions for the messages that can be sent to the check task. */ -#define mainREG_TEST_1_STILL_EXECUTING ( 0 ) -#define mainREG_TEST_2_STILL_EXECUTING ( 1 ) -#define mainPRINT_SYSTEM_STATUS ( 2 ) - -/* GCC specifics. */ -#define mainALIGN_TO( x ) __attribute__((aligned(x))) - -/* Hardware specifics. The start and end address are chosen to ensure the -required GPIO are covered while also ensuring the necessary alignment is -achieved. */ -#define mainGPIO_START_ADDRESS ( ( unsigned long * ) 0x2009c000 ) -#define mainGPIO_END_ADDRESS ( mainGPIO_START_ADDRESS + ( 64 * 1024 ) ) - - -/*-----------------------------------------------------------*/ -/* Prototypes for functions that implement tasks. -----------*/ -/*-----------------------------------------------------------*/ - -/* - * Prototype for the reg test tasks. Amongst other things, these fill the CPU - * registers with known values before checking that the registers still contain - * the expected values. Each of the two tasks use different values so an error - * in the context switch mechanism can be caught. Both reg test tasks execute - * at the idle priority so will get preempted regularly. Each task repeatedly - * sends a message on a queue so long as it remains functioning correctly. If - * an error is detected within the task the task is simply deleted. - */ -static void prvRegTest1Task( void *pvParameters ); -static void prvRegTest2Task( void *pvParameters ); - -/* - * Prototype for the check task. The check task demonstrates various features - * of the MPU before entering a loop where it waits for messages to arrive on a - * queue. - * - * Two types of messages can be processes: - * - * 1) "I'm Alive" messages sent from the reg test tasks, indicating that the - * task is still operational. - * - * 2) "Print Status commands" sent periodically by the tick hook function (and - * therefore from within an interrupt) which command the check task to write - * either pass or fail to the terminal, depending on the status of the reg - * test tasks. - */ -static void prvCheckTask( void *pvParameters ); - -/* - * Prototype for a task created in User mode using the original vTaskCreate() - * API function. The task demonstrates the characteristics of such a task, - * before simply deleting itself. - */ -static void prvOldStyleUserModeTask( void *pvParameters ); - -/* - * Prototype for a task created in Privileged mode using the original - * vTaskCreate() API function. The task demonstrates the characteristics of - * such a task, before simply deleting itself. - */ -static void prvOldStylePrivilegedModeTask( void *pvParameters ); - - -/*-----------------------------------------------------------*/ -/* Prototypes for other misc functions. --------------------*/ -/*-----------------------------------------------------------*/ - -/* - * Just configures any clocks and IO necessary. - */ -static void prvSetupHardware( void ); - -/* - * Simply deletes the calling task. The function is provided only because it - * is simpler to call from asm code than the normal vTaskDelete() API function. - * It has the noinline attribute because it is called from asm code. - */ -static void prvDeleteMe( void ) __attribute__((noinline)); - -/* - * Used by both reg test tasks to send messages to the check task. The message - * just lets the check task know that the task is still functioning correctly. - * If a reg test task detects an error it will delete itself, and in so doing - * prevent itself from sending any more 'I'm Alive' messages to the check task. - */ -static void prvSendImAlive( QueueHandle_t xHandle, unsigned long ulTaskNumber ); - -/* - * The check task is created with access to three memory regions (plus its - * stack). Each memory region is configured with different parameters and - * prvTestMemoryRegions() demonstrates what can and cannot be accessed for each - * region. prvTestMemoryRegions() also demonstrates a task that was created - * as a privileged task settings its own privilege level down to that of a user - * task. - */ -static void prvTestMemoryRegions( void ); - -/*-----------------------------------------------------------*/ - -/* The handle of the queue used to communicate between tasks and between tasks -and interrupts. Note that this is a file scope variable that falls outside of -any MPU region. As such other techniques have to be used to allow the tasks -to gain access to the queue. See the comments in the tasks themselves for -further information. */ -static QueueHandle_t xFileScopeCheckQueue = NULL; - - - -/*-----------------------------------------------------------*/ -/* Data used by the 'check' task. ---------------------------*/ -/*-----------------------------------------------------------*/ - -/* Define the constants used to allocate the check task stack. Note that the -stack size is defined in words, not bytes. */ -#define mainCHECK_TASK_STACK_SIZE_WORDS 128 -#define mainCHECK_TASK_STACK_ALIGNMENT ( mainCHECK_TASK_STACK_SIZE_WORDS * sizeof( portSTACK_TYPE ) ) - -/* Declare the stack that will be used by the check task. The kernel will - automatically create an MPU region for the stack. The stack alignment must - match its size, so if 128 words are reserved for the stack then it must be - aligned to ( 128 * 4 ) bytes. */ -static portSTACK_TYPE xCheckTaskStack[ mainCHECK_TASK_STACK_SIZE_WORDS ] mainALIGN_TO( mainCHECK_TASK_STACK_ALIGNMENT ); - -/* Declare three arrays - an MPU region will be created for each array -using the TaskParameters_t structure below. THIS IS JUST TO DEMONSTRATE THE -MPU FUNCTIONALITY, the data is not used by the check tasks primary function -of monitoring the reg test tasks and printing out status information. - -Note that the arrays allocate slightly more RAM than is actually assigned to -the MPU region. This is to permit writes off the end of the array to be -detected even when the arrays are placed in adjacent memory locations (with no -gaps between them). The align size must be a power of two. */ -#define mainREAD_WRITE_ARRAY_SIZE 130 -#define mainREAD_WRITE_ALIGN_SIZE 128 -char cReadWriteArray[ mainREAD_WRITE_ARRAY_SIZE ] mainALIGN_TO( mainREAD_WRITE_ALIGN_SIZE ); - -#define mainREAD_ONLY_ARRAY_SIZE 260 -#define mainREAD_ONLY_ALIGN_SIZE 256 -char cReadOnlyArray[ mainREAD_ONLY_ARRAY_SIZE ] mainALIGN_TO( mainREAD_ONLY_ALIGN_SIZE ); - -#define mainPRIVILEGED_ONLY_ACCESS_ARRAY_SIZE 130 -#define mainPRIVILEGED_ONLY_ACCESS_ALIGN_SIZE 128 -char cPrivilegedOnlyAccessArray[ mainPRIVILEGED_ONLY_ACCESS_ALIGN_SIZE ] mainALIGN_TO( mainPRIVILEGED_ONLY_ACCESS_ALIGN_SIZE ); - -/* Fill in a TaskParameters_t structure to define the check task - this is the -structure passed to the xTaskCreateRestricted() function. */ -static const TaskParameters_t xCheckTaskParameters = -{ - prvCheckTask, /* pvTaskCode - the function that implements the task. */ - "Check", /* pcName */ - mainCHECK_TASK_STACK_SIZE_WORDS, /* usStackDepth - defined in words, not bytes. */ - ( void * ) 0x12121212, /* pvParameters - this value is just to test that the parameter is being passed into the task correctly. */ - ( tskIDLE_PRIORITY + 1 ) | portPRIVILEGE_BIT,/* uxPriority - this is the highest priority task in the system. The task is created in privileged mode to demonstrate accessing the privileged only data. */ - xCheckTaskStack, /* puxStackBuffer - the array to use as the task stack, as declared above. */ - - /* xRegions - In this case the xRegions array is used to create MPU regions - for all three of the arrays declared directly above. Each MPU region is - created with different parameters. Again, THIS IS JUST TO DEMONSTRATE THE - MPU FUNCTIONALITY, the data is not used by the check tasks primary function - of monitoring the reg test tasks and printing out status information.*/ - { - /* Base address Length Parameters */ - { cReadWriteArray, mainREAD_WRITE_ALIGN_SIZE, portMPU_REGION_READ_WRITE }, - { cReadOnlyArray, mainREAD_ONLY_ALIGN_SIZE, portMPU_REGION_READ_ONLY }, - { cPrivilegedOnlyAccessArray, mainPRIVILEGED_ONLY_ACCESS_ALIGN_SIZE, portMPU_REGION_PRIVILEGED_READ_WRITE } - } -}; - -/* Three MPU regions are defined for use by the 'check' task when the task is -created. These are only used to demonstrate the MPU features and are not -actually necessary for the check task to fulfill its primary purpose. Instead -the MPU regions are replaced with those defined by xAltRegions prior to the -check task receiving any data on the queue or printing any messages to the -debug console. The MPU region defined below covers the GPIO peripherals used -to write to the LCD. */ -static const MemoryRegion_t xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] = -{ - /* Base address Length Parameters */ - { mainGPIO_START_ADDRESS, ( 64 * 1024 ), portMPU_REGION_READ_WRITE }, - { 0, 0, 0 }, - { 0, 0, 0 } -}; - - - -/*-----------------------------------------------------------*/ -/* Data used by the 'reg test' tasks. -----------------------*/ -/*-----------------------------------------------------------*/ - -/* Define the constants used to allocate the reg test task stacks. Note that -that stack size is defined in words, not bytes. */ -#define mainREG_TEST_STACK_SIZE_WORDS 128 -#define mainREG_TEST_STACK_ALIGNMENT ( mainREG_TEST_STACK_SIZE_WORDS * sizeof( portSTACK_TYPE ) ) - -/* Declare the stacks that will be used by the reg test tasks. The kernel will -automatically create an MPU region for the stack. The stack alignment must -match its size, so if 128 words are reserved for the stack then it must be -aligned to ( 128 * 4 ) bytes. */ -static portSTACK_TYPE xRegTest1Stack[ mainREG_TEST_STACK_SIZE_WORDS ] mainALIGN_TO( mainREG_TEST_STACK_ALIGNMENT ); -static portSTACK_TYPE xRegTest2Stack[ mainREG_TEST_STACK_SIZE_WORDS ] mainALIGN_TO( mainREG_TEST_STACK_ALIGNMENT ); - -/* Fill in a TaskParameters_t structure per reg test task to define the tasks. */ -static const TaskParameters_t xRegTest1Parameters = -{ - prvRegTest1Task, /* pvTaskCode - the function that implements the task. */ - "RegTest1", /* pcName */ - mainREG_TEST_STACK_SIZE_WORDS, /* usStackDepth */ - ( void * ) 0x12345678, /* pvParameters - this value is just to test that the parameter is being passed into the task correctly. */ - tskIDLE_PRIORITY | portPRIVILEGE_BIT, /* uxPriority - note that this task is created with privileges to demonstrate one method of passing a queue handle into the task. */ - xRegTest1Stack, /* puxStackBuffer - the array to use as the task stack, as declared above. */ - { /* xRegions - this task does not use any non-stack data hence all members are zero. */ - /* Base address Length Parameters */ - { 0x00, 0x00, 0x00 }, - { 0x00, 0x00, 0x00 }, - { 0x00, 0x00, 0x00 } - } -}; -/*-----------------------------------------------------------*/ - -static TaskParameters_t xRegTest2Parameters = -{ - prvRegTest2Task, /* pvTaskCode - the function that implements the task. */ - "RegTest2", /* pcName */ - mainREG_TEST_STACK_SIZE_WORDS, /* usStackDepth */ - ( void * ) NULL, /* pvParameters - this task uses the parameter to pass in a queue handle, but the queue is not created yet. */ - tskIDLE_PRIORITY, /* uxPriority */ - xRegTest2Stack, /* puxStackBuffer - the array to use as the task stack, as declared above. */ - { /* xRegions - this task does not use any non-stack data hence all members are zero. */ - /* Base address Length Parameters */ - { 0x00, 0x00, 0x00 }, - { 0x00, 0x00, 0x00 }, - { 0x00, 0x00, 0x00 } - } -}; - -/*-----------------------------------------------------------*/ - -int main( void ) -{ - prvSetupHardware(); - - /* Create the queue used to pass "I'm alive" messages to the check task. */ - xFileScopeCheckQueue = xQueueCreate( 1, sizeof( unsigned long ) ); - - /* One check task uses the task parameter to receive the queue handle. - This allows the file scope variable to be accessed from within the task. - The pvParameters member of xRegTest2Parameters can only be set after the - queue has been created so is set here. */ - xRegTest2Parameters.pvParameters = xFileScopeCheckQueue; - - /* Create the three test tasks. Handles to the created tasks are not - required, hence the second parameter is NULL. */ - xTaskCreateRestricted( &xRegTest1Parameters, NULL ); - xTaskCreateRestricted( &xRegTest2Parameters, NULL ); - xTaskCreateRestricted( &xCheckTaskParameters, NULL ); - - /* Create the tasks that are created using the original xTaskCreate() API - function. */ - xTaskCreate( prvOldStyleUserModeTask, /* The function that implements the task. */ - "Task1", /* Text name for the task. */ - 100, /* Stack depth in words. */ - NULL, /* Task parameters. */ - 3, /* Priority and mode (user in this case). */ - NULL /* Handle. */ - ); - - xTaskCreate( prvOldStylePrivilegedModeTask, /* The function that implements the task. */ - "Task2", /* Text name for the task. */ - 100, /* Stack depth in words. */ - NULL, /* Task parameters. */ - ( 3 | portPRIVILEGE_BIT ), /* Priority and mode. */ - NULL /* Handle. */ - ); - - /* Start the scheduler. */ - vTaskStartScheduler(); - - /* Will only get here if there was insufficient memory to create the idle - task. */ - for( ;; ); - return 0; -} -/*-----------------------------------------------------------*/ - -static void prvCheckTask( void *pvParameters ) -{ -/* This task is created in privileged mode so can access the file scope -queue variable. Take a stack copy of this before the task is set into user -mode. Once that task is in user mode the file scope queue variable will no -longer be accessible but the stack copy will. */ -QueueHandle_t xQueue = xFileScopeCheckQueue; -long lMessage; -unsigned long ulStillAliveCounts[ 2 ] = { 0 }; -char *pcStatusMessage = "PASS\r\n"; -unsigned char x = 5, y = 10; - - /* Just to remove compiler warning. */ - ( void ) pvParameters; - - /* Demonstrate how the various memory regions can and can't be accessed. - The task privilege is set down to user mode within this function. */ - prvTestMemoryRegions(); - - /* Change the memory regions allocated to this task to those initially - set up for demonstration purposes to those actually required by the task. */ - vTaskAllocateMPURegions( NULL, xAltRegions ); - - /* This loop performs the main function of the task, which is blocking - on a message queue then processing each message as it arrives. */ - for( ;; ) - { - /* Wait for the next message to arrive. */ - xQueueReceive( xQueue, &lMessage, portMAX_DELAY ); - - switch( lMessage ) - { - case mainREG_TEST_1_STILL_EXECUTING : - /* Message from task 1, so task 1 must still be executing. */ - ( ulStillAliveCounts[ 0 ] )++; - break; - - case mainREG_TEST_2_STILL_EXECUTING : - /* Message from task 2, so task 2 must still be executing. */ - ( ulStillAliveCounts[ 1 ] )++; - break; - - case mainPRINT_SYSTEM_STATUS : - /* Message from tick hook, time to print out the system - status. If messages has stopped arriving from either reg - test task then the status must be set to fail. */ - if( ( ulStillAliveCounts[ 0 ] == 0 ) || ( ulStillAliveCounts[ 1 ] == 0 ) ) - { - /* One or both of the test tasks are no longer sending - 'still alive' messages. */ - pcStatusMessage = "FAIL\r\n"; - } - - /* Print a pass/fail message to the LCD - moving the - message each time to provide feedback that the output - is still being produced. LCD_PrintString() accesses const - data stored in flash, which all tasks are at liberty to do, - and GPIO for which an MPU region has been set up for it. */ - LCD_ClearScreen(); - LCD_PrintString( x>>1, y>>1, pcStatusMessage, 6, COLOR_RED ); - x += 7; - y += 9; - - /* Reset the count of 'still alive' messages. */ - memset( ulStillAliveCounts, 0x00, sizeof( ulStillAliveCounts ) ); - break; - - default : - /* Something unexpected happened. Delete this task so the - error is apparent (no output will be displayed). */ - prvDeleteMe(); - break; - } - } -} -/*-----------------------------------------------------------*/ - -static void prvTestMemoryRegions( void ) -{ -long l; -char cTemp; - - /* The check task (from which this function is called) is created in the - Privileged mode. The privileged array can be both read from and written - to while this task is privileged. */ - cPrivilegedOnlyAccessArray[ 0 ] = 'a'; - if( cPrivilegedOnlyAccessArray[ 0 ] != 'a' ) - { - /* Something unexpected happened. Delete this task so the error is - apparent (no output will be displayed). */ - prvDeleteMe(); - } - - /* Writing off the end of the RAM allocated to this task will *NOT* cause a - protection fault because the task is still executing in a privileged mode. - Uncomment the following to test. */ - /* cPrivilegedOnlyAccessArray[ mainPRIVILEGED_ONLY_ACCESS_ALIGN_SIZE ] = 'a'; */ - - /* Now set the task into user mode. */ - portSWITCH_TO_USER_MODE(); - - /* Accessing the privileged only array will now cause a fault. Uncomment - the following line to test. */ - /* cPrivilegedOnlyAccessArray[ 0 ] = 'a'; */ - - /* The read/write array can still be successfully read and written. */ - for( l = 0; l < mainREAD_WRITE_ALIGN_SIZE; l++ ) - { - cReadWriteArray[ l ] = 'a'; - if( cReadWriteArray[ l ] != 'a' ) - { - /* Something unexpected happened. Delete this task so the error is - apparent (no output will be displayed). */ - prvDeleteMe(); - } - } - - /* But attempting to read or write off the end of the RAM allocated to this - task will cause a fault. Uncomment either of the following two lines to - test. */ - /* cReadWriteArray[ 0 ] = cReadWriteArray[ -1 ]; */ - /* cReadWriteArray[ mainREAD_WRITE_ALIGN_SIZE ] = 0x00; */ - - /* The read only array can be successfully read... */ - for( l = 0; l < mainREAD_ONLY_ALIGN_SIZE; l++ ) - { - cTemp = cReadOnlyArray[ l ]; - } - - /* ...but cannot be written. Uncomment the following line to test. */ - /* cReadOnlyArray[ 0 ] = 'a'; */ - - /* Writing to the first and last locations in the stack array should not - cause a protection fault. Note that doing this will cause the kernel to - detect a stack overflow if configCHECK_FOR_STACK_OVERFLOW is greater than - 1. */ - xCheckTaskStack[ 0 ] = 0; - xCheckTaskStack[ mainCHECK_TASK_STACK_SIZE_WORDS - 1 ] = 0; - - /* Writing off either end of the stack array should cause a protection - fault, uncomment either of the following two lines to test. */ - /* xCheckTaskStack[ -1 ] = 0; */ - /* xCheckTaskStack[ mainCHECK_TASK_STACK_SIZE_WORDS ] = 0; */ -} -/*-----------------------------------------------------------*/ - -static void prvRegTest1Task( void *pvParameters ) -{ -/* This task is created in privileged mode so can access the file scope -queue variable. Take a stack copy of this before the task is set into user -mode. Once this task is in user mode the file scope queue variable will no -longer be accessible but the stack copy will. */ -QueueHandle_t xQueue = xFileScopeCheckQueue; - - /* Now the queue handle has been obtained the task can switch to user - mode. This is just one method of passing a handle into a protected - task, the other reg test task uses the task parameter instead. */ - portSWITCH_TO_USER_MODE(); - - /* First check that the parameter value is as expected. */ - if( pvParameters != ( void * ) 0x12345678 ) - { - /* Error detected. Delete the task so it stops communicating with - the check task. */ - prvDeleteMe(); - } - - - for( ;; ) - { - /* This task tests the kernel context switch mechanism by reading and - writing directly to registers - which requires the test to be written - in assembly code. */ - __asm volatile - ( - " MOV R4, #104 \n" /* Set registers to a known value. R0 to R1 are done in the loop below. */ - " MOV R5, #105 \n" - " MOV R6, #106 \n" - " MOV R8, #108 \n" - " MOV R9, #109 \n" - " MOV R10, #110 \n" - " MOV R11, #111 \n" - "reg1loop: \n" - " MOV R0, #100 \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */ - " MOV R1, #101 \n" - " MOV R2, #102 \n" - " MOV R3, #103 \n" - " MOV R12, #112 \n" - " SVC #1 \n" /* Yield just to increase test coverage. */ - " CMP R0, #100 \n" /* Check all the registers still contain their expected values. */ - " BNE prvDeleteMe \n" /* Value was not as expected, delete the task so it stops communicating with the check task. */ - " CMP R1, #101 \n" - " BNE prvDeleteMe \n" - " CMP R2, #102 \n" - " BNE prvDeleteMe \n" - " CMP R3, #103 \n" - " BNE prvDeleteMe \n" - " CMP R4, #104 \n" - " BNE prvDeleteMe \n" - " CMP R5, #105 \n" - " BNE prvDeleteMe \n" - " CMP R6, #106 \n" - " BNE prvDeleteMe \n" - " CMP R8, #108 \n" - " BNE prvDeleteMe \n" - " CMP R9, #109 \n" - " BNE prvDeleteMe \n" - " CMP R10, #110 \n" - " BNE prvDeleteMe \n" - " CMP R11, #111 \n" - " BNE prvDeleteMe \n" - " CMP R12, #112 \n" - " BNE prvDeleteMe \n" - :::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12" - ); - - /* Send mainREG_TEST_1_STILL_EXECUTING to the check task to indicate that this - task is still functioning. */ - prvSendImAlive( xQueue, mainREG_TEST_1_STILL_EXECUTING ); - - /* Go back to check all the register values again. */ - __asm volatile( " B reg1loop " ); - } -} -/*-----------------------------------------------------------*/ - -static void prvRegTest2Task( void *pvParameters ) -{ -/* The queue handle is passed in as the task parameter. This is one method of -passing data into a protected task, the other reg test task uses a different -method. */ -QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters; - - for( ;; ) - { - /* This task tests the kernel context switch mechanism by reading and - writing directly to registers - which requires the test to be written - in assembly code. */ - __asm volatile - ( - " MOV R4, #4 \n" /* Set registers to a known value. R0 to R1 are done in the loop below. */ - " MOV R5, #5 \n" - " MOV R6, #6 \n" - " MOV R8, #8 \n" /* Frame pointer is omitted as it must not be changed. */ - " MOV R9, #9 \n" - " MOV R10, 10 \n" - " MOV R11, #11 \n" - "reg2loop: \n" - " MOV R0, #13 \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */ - " MOV R1, #1 \n" - " MOV R2, #2 \n" - " MOV R3, #3 \n" - " MOV R12, #12 \n" - " CMP R0, #13 \n" /* Check all the registers still contain their expected values. */ - " BNE prvDeleteMe \n" /* Value was not as expected, delete the task so it stops communicating with the check task */ - " CMP R1, #1 \n" - " BNE prvDeleteMe \n" - " CMP R2, #2 \n" - " BNE prvDeleteMe \n" - " CMP R3, #3 \n" - " BNE prvDeleteMe \n" - " CMP R4, #4 \n" - " BNE prvDeleteMe \n" - " CMP R5, #5 \n" - " BNE prvDeleteMe \n" - " CMP R6, #6 \n" - " BNE prvDeleteMe \n" - " CMP R8, #8 \n" - " BNE prvDeleteMe \n" - " CMP R9, #9 \n" - " BNE prvDeleteMe \n" - " CMP R10, #10 \n" - " BNE prvDeleteMe \n" - " CMP R11, #11 \n" - " BNE prvDeleteMe \n" - " CMP R12, #12 \n" - " BNE prvDeleteMe \n" - :::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12" - ); - - /* Send mainREG_TEST_2_STILL_EXECUTING to the check task to indicate that this - task is still functioning. */ - prvSendImAlive( xQueue, mainREG_TEST_2_STILL_EXECUTING ); - - /* Go back to check all the register values again. */ - __asm volatile( " B reg2loop " ); - } -} -/*-----------------------------------------------------------*/ - -void vApplicationIdleHook( void ) -{ -extern unsigned long __SRAM_segment_end__[]; -extern unsigned long __privileged_data_start__[]; -extern unsigned long __privileged_data_end__[]; -extern unsigned long __FLASH_segment_start__[]; -extern unsigned long __FLASH_segment_end__[]; -volatile unsigned long *pul; -volatile unsigned long ulReadData; - - /* The idle task, and therefore this function, run in Supervisor mode and - can therefore access all memory. Try reading from corners of flash and - RAM to ensure a memory fault does not occur. - - Start with the edges of the privileged data area. */ - pul = __privileged_data_start__; - ulReadData = *pul; - pul = __privileged_data_end__ - 1; - ulReadData = *pul; - - /* Next the standard SRAM area. */ - pul = __SRAM_segment_end__ - 1; - ulReadData = *pul; - - /* And the standard Flash area - the start of which is marked for - privileged access only. */ - pul = __FLASH_segment_start__; - ulReadData = *pul; - pul = __FLASH_segment_end__ - 1; - ulReadData = *pul; - - /* Reading off the end of Flash or SRAM space should cause a fault. - Uncomment one of the following two pairs of lines to test. */ - - /* pul = __FLASH_segment_end__ + 4; - ulReadData = *pul; */ - - /* pul = __SRAM_segment_end__ + 1; - ulReadData = *pul; */ -} -/*-----------------------------------------------------------*/ - -static void prvOldStyleUserModeTask( void *pvParameters ) -{ -extern unsigned long __privileged_data_start__[]; -extern unsigned long __privileged_data_end__[]; -extern unsigned long __SRAM_segment_end__[]; -extern unsigned long __privileged_functions_end__[]; -extern unsigned long __FLASH_segment_start__[]; -extern unsigned long __FLASH_segment_end__[]; -const volatile unsigned long *pulStandardPeripheralRegister = ( volatile unsigned long * ) 0x400FC0C4; /* PCONP */ -volatile unsigned long *pul; -volatile unsigned long ulReadData; - -/* The following lines are commented out to prevent the unused variable -compiler warnings when the tests that use the variable are also commented out. -extern unsigned long __privileged_functions_start__[]; -const volatile unsigned long *pulSystemPeripheralRegister = ( volatile unsigned long * ) 0xe000e014; */ - - ( void ) pvParameters; - - /* This task is created in User mode using the original xTaskCreate() API - function. It should have access to all Flash and RAM except that marked - as Privileged access only. Reading from the start and end of the non- - privileged RAM should not cause a problem (the privileged RAM is the first - block at the bottom of the RAM memory). */ - pul = __privileged_data_end__ + 1; - ulReadData = *pul; - pul = __SRAM_segment_end__ - 1; - ulReadData = *pul; - - /* Likewise reading from the start and end of the non-privileged Flash - should not be a problem (the privileged Flash is the first block at the - bottom of the Flash memory). */ - pul = __privileged_functions_end__ + 1; - ulReadData = *pul; - pul = __FLASH_segment_end__ - 1; - ulReadData = *pul; - - /* Standard peripherals are accessible. */ - ulReadData = *pulStandardPeripheralRegister; - - /* System peripherals are not accessible. Uncomment the following line - to test. Also uncomment the declaration of pulSystemPeripheralRegister - at the top of this function. */ - /* ulReadData = *pulSystemPeripheralRegister; */ - - /* Reading from anywhere inside the privileged Flash or RAM should cause a - fault. This can be tested by uncommenting any of the following pairs of - lines. Also uncomment the declaration of __privileged_functions_start__ - at the top of this function. */ - - /* pul = __privileged_functions_start__; - ulReadData = *pul; */ - - /* pul = __privileged_functions_end__ - 1; - ulReadData = *pul; */ - - /* pul = __privileged_data_start__; - ulReadData = *pul; */ - - /* pul = __privileged_data_end__ - 1; - ulReadData = *pul; */ - - /* Must not just run off the end of a task function, so delete this task. - Note that because this task was created using xTaskCreate() the stack was - allocated dynamically and I have not included any code to free it again. */ - vTaskDelete( NULL ); -} -/*-----------------------------------------------------------*/ - -static void prvOldStylePrivilegedModeTask( void *pvParameters ) -{ -extern unsigned long __privileged_data_start__[]; -extern unsigned long __privileged_data_end__[]; -extern unsigned long __SRAM_segment_end__[]; -extern unsigned long __privileged_functions_start__[]; -extern unsigned long __privileged_functions_end__[]; -extern unsigned long __FLASH_segment_start__[]; -extern unsigned long __FLASH_segment_end__[]; -volatile unsigned long *pul; -volatile unsigned long ulReadData; -const volatile unsigned long *pulSystemPeripheralRegister = ( volatile unsigned long * ) 0xe000e014; /* Systick */ -const volatile unsigned long *pulStandardPeripheralRegister = ( volatile unsigned long * ) 0x400FC0C4; /* PCONP */ - - ( void ) pvParameters; - - /* This task is created in Privileged mode using the original xTaskCreate() - API function. It should have access to all Flash and RAM including that - marked as Privileged access only. So reading from the start and end of the - non-privileged RAM should not cause a problem (the privileged RAM is the - first block at the bottom of the RAM memory). */ - pul = __privileged_data_end__ + 1; - ulReadData = *pul; - pul = __SRAM_segment_end__ - 1; - ulReadData = *pul; - - /* Likewise reading from the start and end of the non-privileged Flash - should not be a problem (the privileged Flash is the first block at the - bottom of the Flash memory). */ - pul = __privileged_functions_end__ + 1; - ulReadData = *pul; - pul = __FLASH_segment_end__ - 1; - ulReadData = *pul; - - /* Reading from anywhere inside the privileged Flash or RAM should also - not be a problem. */ - pul = __privileged_functions_start__; - ulReadData = *pul; - pul = __privileged_functions_end__ - 1; - ulReadData = *pul; - pul = __privileged_data_start__; - ulReadData = *pul; - pul = __privileged_data_end__ - 1; - ulReadData = *pul; - - /* Finally, accessing both System and normal peripherals should both be - possible. */ - ulReadData = *pulSystemPeripheralRegister; - ulReadData = *pulStandardPeripheralRegister; - - /* Must not just run off the end of a task function, so delete this task. - Note that because this task was created using xTaskCreate() the stack was - allocated dynamically and I have not included any code to free it again. */ - vTaskDelete( NULL ); -} -/*-----------------------------------------------------------*/ - -static void prvDeleteMe( void ) -{ - vTaskDelete( NULL ); -} -/*-----------------------------------------------------------*/ - -static void prvSendImAlive( QueueHandle_t xHandle, unsigned long ulTaskNumber ) -{ - if( xHandle != NULL ) - { - xQueueSend( xHandle, &ulTaskNumber, mainDONT_BLOCK ); - } -} -/*-----------------------------------------------------------*/ - -void prvSetupHardware( void ) -{ - /* Disable peripherals power. */ - SC->PCONP = 0; - - /* Enable GPIO power. */ - SC->PCONP = PCONP_PCGPIO; - - /* Disable TPIU. */ - PINCON->PINSEL10 = 0; - - if ( SC->PLL0STAT & ( 1 << 25 ) ) - { - /* Enable PLL, disconnected. */ - SC->PLL0CON = 1; - SC->PLL0FEED = PLLFEED_FEED1; - SC->PLL0FEED = PLLFEED_FEED2; - } - - /* Disable PLL, disconnected. */ - SC->PLL0CON = 0; - SC->PLL0FEED = PLLFEED_FEED1; - SC->PLL0FEED = PLLFEED_FEED2; - - /* Enable main OSC. */ - SC->SCS |= 0x20; - while( !( SC->SCS & 0x40 ) ); - - /* select main OSC, 12MHz, as the PLL clock source. */ - SC->CLKSRCSEL = 0x1; - - SC->PLL0CFG = 0x20031; - SC->PLL0FEED = PLLFEED_FEED1; - SC->PLL0FEED = PLLFEED_FEED2; - - /* Enable PLL, disconnected. */ - SC->PLL0CON = 1; - SC->PLL0FEED = PLLFEED_FEED1; - SC->PLL0FEED = PLLFEED_FEED2; - - /* Set clock divider. */ - SC->CCLKCFG = 0x03; - - /* Configure flash accelerator. */ - SC->FLASHCFG = 0x403a; - - /* Check lock bit status. */ - while( ( ( SC->PLL0STAT & ( 1 << 26 ) ) == 0 ) ); - - /* Enable and connect. */ - SC->PLL0CON = 3; - SC->PLL0FEED = PLLFEED_FEED1; - SC->PLL0FEED = PLLFEED_FEED2; - while( ( ( SC->PLL0STAT & ( 1 << 25 ) ) == 0 ) ); - - - - - /* Configure the clock for the USB. */ - - if( SC->PLL1STAT & ( 1 << 9 ) ) - { - /* Enable PLL, disconnected. */ - SC->PLL1CON = 1; - SC->PLL1FEED = PLLFEED_FEED1; - SC->PLL1FEED = PLLFEED_FEED2; - } - - /* Disable PLL, disconnected. */ - SC->PLL1CON = 0; - SC->PLL1FEED = PLLFEED_FEED1; - SC->PLL1FEED = PLLFEED_FEED2; - - SC->PLL1CFG = 0x23; - SC->PLL1FEED = PLLFEED_FEED1; - SC->PLL1FEED = PLLFEED_FEED2; - - /* Enable PLL, disconnected. */ - SC->PLL1CON = 1; - SC->PLL1FEED = PLLFEED_FEED1; - SC->PLL1FEED = PLLFEED_FEED2; - while( ( ( SC->PLL1STAT & ( 1 << 10 ) ) == 0 ) ); - - /* Enable and connect. */ - SC->PLL1CON = 3; - SC->PLL1FEED = PLLFEED_FEED1; - SC->PLL1FEED = PLLFEED_FEED2; - while( ( ( SC->PLL1STAT & ( 1 << 9 ) ) == 0 ) ); - - /* Setup the peripheral bus to be the same as the PLL output (64 MHz). */ - SC->PCLKSEL0 = 0x05555555; - - /* Prepare the LCD. */ - LCDdriver_initialisation(); - LCD_PrintString( 5, 10, "FreeRTOS.org", 14, COLOR_GREEN); -} -/*-----------------------------------------------------------*/ - -void vApplicationTickHook( void ) -{ -static unsigned long ulCallCount; -const unsigned long ulCallsBetweenSends = 5000 / portTICK_PERIOD_MS; -const unsigned long ulMessage = mainPRINT_SYSTEM_STATUS; -portBASE_TYPE xDummy; - - /* If configUSE_TICK_HOOK is set to 1 then this function will get called - from each RTOS tick. It is called from the tick interrupt and therefore - will be executing in the privileged state. */ - - ulCallCount++; - - /* Is it time to print out the pass/fail message again? */ - if( ulCallCount >= ulCallsBetweenSends ) - { - ulCallCount = 0; - - /* Send a message to the check task to command it to check that all - the tasks are still running then print out the status. - - This is running in an ISR so has to use the "FromISR" version of - xQueueSend(). Because it is in an ISR it is running with privileges - so can access xFileScopeCheckQueue directly. */ - xQueueSendFromISR( xFileScopeCheckQueue, &ulMessage, &xDummy ); - } -} -/*-----------------------------------------------------------*/ - -void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName ) -{ - /* If configCHECK_FOR_STACK_OVERFLOW is set to either 1 or 2 then this - function will automatically get called if a task overflows its stack. */ - ( void ) pxTask; - ( void ) pcTaskName; - for( ;; ); -} -/*-----------------------------------------------------------*/ - -void vApplicationMallocFailedHook( void ) -{ - /* If configUSE_MALLOC_FAILED_HOOK is set to 1 then this function will - be called automatically if a call to pvPortMalloc() fails. pvPortMalloc() - is called automatically when a task, queue or semaphore is created. */ - for( ;; ); -} -/*-----------------------------------------------------------*/ - - diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/printf-stdarg.c b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/printf-stdarg.c deleted file mode 100644 index b5ac41be7..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/printf-stdarg.c +++ /dev/null @@ -1,293 +0,0 @@ -/* - Copyright 2001, 2002 Georges Menie (www.menie.org) - stdarg version contributed by Christian Ettinger - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU Lesser General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -/* - putchar is the only external dependency for this file, - if you have a working putchar, leave it commented out. - If not, uncomment the define below and - replace outbyte(c) by your own function call. - -*/ - -#define putchar(c) c - -#include - -static void printchar(char **str, int c) -{ - //extern int putchar(int c); - - if (str) { - **str = (char)c; - ++(*str); - } - else - { - (void)putchar(c); - } -} - -#define PAD_RIGHT 1 -#define PAD_ZERO 2 - -static int prints(char **out, const char *string, int width, int pad) -{ - register int pc = 0, padchar = ' '; - - if (width > 0) { - register int len = 0; - register const char *ptr; - for (ptr = string; *ptr; ++ptr) ++len; - if (len >= width) width = 0; - else width -= len; - if (pad & PAD_ZERO) padchar = '0'; - } - if (!(pad & PAD_RIGHT)) { - for ( ; width > 0; --width) { - printchar (out, padchar); - ++pc; - } - } - for ( ; *string ; ++string) { - printchar (out, *string); - ++pc; - } - for ( ; width > 0; --width) { - printchar (out, padchar); - ++pc; - } - - return pc; -} - -/* the following should be enough for 32 bit int */ -#define PRINT_BUF_LEN 12 - -static int printi(char **out, int i, int b, int sg, int width, int pad, int letbase) -{ - char print_buf[PRINT_BUF_LEN]; - register char *s; - register int t, neg = 0, pc = 0; - register unsigned int u = (unsigned int)i; - - if (i == 0) { - print_buf[0] = '0'; - print_buf[1] = '\0'; - return prints (out, print_buf, width, pad); - } - - if (sg && b == 10 && i < 0) { - neg = 1; - u = (unsigned int)-i; - } - - s = print_buf + PRINT_BUF_LEN-1; - *s = '\0'; - - while (u) { - t = (unsigned int)u % b; - if( t >= 10 ) - t += letbase - '0' - 10; - *--s = (char)(t + '0'); - u /= b; - } - - if (neg) { - if( width && (pad & PAD_ZERO) ) { - printchar (out, '-'); - ++pc; - --width; - } - else { - *--s = '-'; - } - } - - return pc + prints (out, s, width, pad); -} - -static int print( char **out, const char *format, va_list args ) -{ - register int width, pad; - register int pc = 0; - char scr[2]; - - for (; *format != 0; ++format) { - if (*format == '%') { - ++format; - width = pad = 0; - if (*format == '\0') break; - if (*format == '%') goto out; - if (*format == '-') { - ++format; - pad = PAD_RIGHT; - } - while (*format == '0') { - ++format; - pad |= PAD_ZERO; - } - for ( ; *format >= '0' && *format <= '9'; ++format) { - width *= 10; - width += *format - '0'; - } - if( *format == 's' ) { - register char *s = (char *)va_arg( args, int ); - pc += prints (out, s?s:"(null)", width, pad); - continue; - } - if( *format == 'd' ) { - pc += printi (out, va_arg( args, int ), 10, 1, width, pad, 'a'); - continue; - } - if( *format == 'x' ) { - pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'a'); - continue; - } - if( *format == 'X' ) { - pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'A'); - continue; - } - if( *format == 'u' ) { - pc += printi (out, va_arg( args, int ), 10, 0, width, pad, 'a'); - continue; - } - if( *format == 'c' ) { - /* char are converted to int then pushed on the stack */ - scr[0] = (char)va_arg( args, int ); - scr[1] = '\0'; - pc += prints (out, scr, width, pad); - continue; - } - } - else { - out: - printchar (out, *format); - ++pc; - } - } - if (out) **out = '\0'; - va_end( args ); - return pc; -} - -int printf(const char *format, ...) -{ - va_list args; - - va_start( args, format ); - return print( 0, format, args ); -} - -int sprintf(char *out, const char *format, ...) -{ - va_list args; - - va_start( args, format ); - return print( &out, format, args ); -} - - -int snprintf( char *buf, unsigned int count, const char *format, ... ) -{ - va_list args; - - ( void ) count; - - va_start( args, format ); - return print( &buf, format, args ); -} - - -#ifdef TEST_PRINTF -int main(void) -{ - char *ptr = "Hello world!"; - char *np = 0; - int i = 5; - unsigned int bs = sizeof(int)*8; - int mi; - char buf[80]; - - mi = (1 << (bs-1)) + 1; - printf("%s\n", ptr); - printf("printf test\n"); - printf("%s is null pointer\n", np); - printf("%d = 5\n", i); - printf("%d = - max int\n", mi); - printf("char %c = 'a'\n", 'a'); - printf("hex %x = ff\n", 0xff); - printf("hex %02x = 00\n", 0); - printf("signed %d = unsigned %u = hex %x\n", -3, -3, -3); - printf("%d %s(s)%", 0, "message"); - printf("\n"); - printf("%d %s(s) with %%\n", 0, "message"); - sprintf(buf, "justif: \"%-10s\"\n", "left"); printf("%s", buf); - sprintf(buf, "justif: \"%10s\"\n", "right"); printf("%s", buf); - sprintf(buf, " 3: %04d zero padded\n", 3); printf("%s", buf); - sprintf(buf, " 3: %-4d left justif.\n", 3); printf("%s", buf); - sprintf(buf, " 3: %4d right justif.\n", 3); printf("%s", buf); - sprintf(buf, "-3: %04d zero padded\n", -3); printf("%s", buf); - sprintf(buf, "-3: %-4d left justif.\n", -3); printf("%s", buf); - sprintf(buf, "-3: %4d right justif.\n", -3); printf("%s", buf); - - return 0; -} - -/* - * if you compile this file with - * gcc -Wall $(YOUR_C_OPTIONS) -DTEST_PRINTF -c printf.c - * you will get a normal warning: - * printf.c:214: warning: spurious trailing `%' in format - * this line is testing an invalid % at the end of the format string. - * - * this should display (on 32bit int machine) : - * - * Hello world! - * printf test - * (null) is null pointer - * 5 = 5 - * -2147483647 = - max int - * char a = 'a' - * hex ff = ff - * hex 00 = 00 - * signed -3 = unsigned 4294967293 = hex fffffffd - * 0 message(s) - * 0 message(s) with % - * justif: "left " - * justif: " right" - * 3: 0003 zero padded - * 3: 3 left justif. - * 3: 3 right justif. - * -3: -003 zero padded - * -3: -3 left justif. - * -3: -3 right justif. - */ - -#endif - - -/* To keep linker happy. */ -int write( int i, char* c, int n) -{ - (void)i; - (void)n; - (void)c; - return 0; -} - diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/rtosdemo_rdb1768_Debug.ld b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/rtosdemo_rdb1768_Debug.ld deleted file mode 100644 index 60b252b4e..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/rtosdemo_rdb1768_Debug.ld +++ /dev/null @@ -1,122 +0,0 @@ -/* - * GENERATED FILE - DO NOT EDIT - * (C) Code Red Technologies Ltd, 2008-9 - * Generated C linker script file for LPC1768 - * (created from nxp_lpc13_c.ld (v2.0.11 (200907061347)) on Thu Jul 09 12:44:31 BST 2009) -*/ - -GROUP(libgcc.a libc.a) - -MEMORY -{ - FLASH (rx) : ORIGIN = 0x0 LENGTH = 0x80000 - SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 - AHBRAM0 : ORIGIN = 0x2007c000, LENGTH = 0x4000 - AHBRAM1 : ORIGIN = 0x20080000, LENGTH = 0x4000 -} - -_vRamTop = ORIGIN( SRAM ) + LENGTH( SRAM ); - -/* Variables used by FreeRTOS-MPU. */ -_Privileged_Functions_Region_Size = 16K; -_Privileged_Data_Region_Size = 256; - -__FLASH_segment_start__ = ORIGIN( FLASH ); -__FLASH_segment_end__ = __FLASH_segment_start__ + LENGTH( FLASH ); - -__privileged_functions_start__ = ORIGIN( FLASH ); -__privileged_functions_end__ = __privileged_functions_start__ + _Privileged_Functions_Region_Size; - -__SRAM_segment_start__ = ORIGIN( SRAM ); -__SRAM_segment_end__ = __SRAM_segment_start__ + LENGTH( SRAM ); - -__privileged_data_start__ = ORIGIN( SRAM ); -__privileged_data_end__ = ORIGIN( SRAM ) + _Privileged_Data_Region_Size; - -ENTRY(ResetISR) - -SECTIONS -{ - /* Privileged section at the start of the flash - vectors must be first - whatever. */ - privileged_functions : - { - KEEP(*(.isr_vector)) - *(privileged_functions) - } > FLASH - - .text : - { - /* Non privileged code kept out of the first 16K or flash. */ - . = __privileged_functions_start__ + _Privileged_Functions_Region_Size; - - *(.text*) - *(.rodata*) - - } > FLASH - - - /* for exception handling/unwind - some Newlib functions (in common with C++ and STDC++) use this. */ - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH - - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH - __exidx_end = .; - - _etext = .; - - /* zero initialized data */ - privileged_data : - { - _bss = .; - *(privileged_data) - /* Non kernel data is kept out of the first 256 bytes of SRAM. */ - } > SRAM - - . = ORIGIN( SRAM ) + _Privileged_Data_Region_Size; - - .bss : - { - *(.bss*) - *(COMMON) - _ebss = .; - } > SRAM - - .data : AT (__exidx_end) - { - _data = .; - *(vtable) - *(.data*) - _edata = .; - } > SRAM - - - /* Where we put the heap with cr_clib */ - .cr_heap : - { - end = .; - _pvHeapStart = .; - } > SRAM - -/* - Note: (ref: M0000066) - Moving the stack down by 16 is to work around a GDB bug. - This space can be reclaimed for Production Builds. -*/ - _vStackTop = _vRamTop - 16; - - .ETHRAM : - { - } > AHBRAM0 - - .USBRAM : - { - } > AHBRAM1 -} diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/syscalls.c b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/syscalls.c deleted file mode 100644 index 3053cfa8b..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/syscalls.c +++ /dev/null @@ -1,82 +0,0 @@ -/* Don't need anything here. */ - -#include -#include - -int _read_r (struct _reent *r, int file, char * ptr, int len) -{ - ( void ) r; - ( void ) file; - ( void ) ptr; - ( void ) len; - return -1; -} - -/***************************************************************************/ - -int _lseek_r (struct _reent *r, int file, int ptr, int dir) -{ - ( void ) r; - ( void ) file; - ( void ) ptr; - ( void ) dir; - - return 0; -} - -/***************************************************************************/ - -int _write_r (struct _reent *r, int file, char * ptr, int len) -{ - ( void ) r; - ( void ) file; - ( void ) ptr; - ( void ) len; - - return 0; -} - -/***************************************************************************/ - -int _close_r (struct _reent *r, int file) -{ - ( void ) r; - ( void ) file; - - return 0; -} - -/***************************************************************************/ - -caddr_t _sbrk_r (struct _reent *r, int incr) -{ - ( void ) r; - ( void ) incr; - - return 0; -} - -/***************************************************************************/ - -int _fstat_r (struct _reent *r, int file, struct stat * st) -{ - ( void ) r; - ( void ) file; - ( void ) st; - - return 0; -} - -/***************************************************************************/ - -int _isatty_r(struct _reent *r, int fd) -{ - ( void ) r; - ( void ) fd; - - return 0; -} - - - - diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/system_LPC17xx.h b/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/system_LPC17xx.h deleted file mode 100644 index a5c9727d4..000000000 --- a/FreeRTOS/Demo/CORTEX_MPU_LPC1768_GCC_RedSuite/src/system_LPC17xx.h +++ /dev/null @@ -1,40 +0,0 @@ -/****************************************************************************** - * @file: system_LPC17xx.h - * @purpose: CMSIS Cortex-M3 Device Peripheral Access Layer Header File - * for the NXP LPC17xx Device Series - * @version: V1.0 - * @date: 25. Nov. 2008 - *---------------------------------------------------------------------------- - * - * Copyright (C) 2008 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-M3 - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - -#ifndef __SYSTEM_LPC17xx_H -#define __SYSTEM_LPC17xx_H - -extern uint32_t SystemFrequency; /*!< System Clock Frequency (Core Clock) */ - - -/** - * Initialize the system - * - * @param none - * @return none - * - * @brief Setup the microcontroller system. - * Initialize the System and update the SystemFrequency variable. - */ -extern void SystemInit (void); -#endif diff --git a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/FreeRTOSConfig.h index f1cda5bab..3ff76a163 100644 --- a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/FreeRTOSConfig.h +++ b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/FreeRTOSConfig.h @@ -93,7 +93,7 @@ build, this configuration file has all options turned on. */ #define configUSE_PREEMPTION 1 #define configTICK_RATE_HZ ( 1000 ) -#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 #define configUSE_QUEUE_SETS 1 #define configUSE_IDLE_HOOK 1 #define configUSE_TICK_HOOK 1 @@ -162,12 +162,12 @@ to exclude the API function. */ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */ #define configPRIO_BITS __NVIC_PRIO_BITS #else - #define configPRIO_BITS 3 /* 7 priority levels */ + #define configPRIO_BITS 4 /* 15 priority levels */ #endif /* The lowest interrupt priority that can be used in a call to a "set priority" function. */ -#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x7 +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0xf /* The highest interrupt priority that can be used by any interrupt service routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL @@ -191,7 +191,7 @@ standard names. */ /* Normal assert() semantics without relying on the provision of an assert.h header file. */ -#define configASSERT( x ) if( ( x ) == 0UL ) { __asm volatile( "cpsid i" ); for( ;; ); } +#define configASSERT( x ) if( ( x ) == 0UL ) { taskENTER_CRITICAL(); for( ;; ); } /* LED not used at present, so just increment a variable to keep a count of the number of times the LED would otherwise have been toggled. */ diff --git a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RTOSDemo.uvguix.barryri b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RTOSDemo.uvguix.barryri index a37d287ab..867b36cd4 100644 --- a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RTOSDemo.uvguix.barryri +++ b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RTOSDemo.uvguix.barryri @@ -92,8 +92,8 @@ 0 - 276 - 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@@ -132,7 +132,7 @@ 0 16 - 03000000620000000A01000008030000 + 03000000620000000A01000024030000 16 @@ -152,7 +152,7 @@ 0 16 - 03000000620000000A01000008030000 + 03000000620000000A01000024030000 16 @@ -432,7 +432,7 @@ 0 16 - 03000000620000000A01000008030000 + 03000000620000000A01000024030000 16 @@ -452,7 +452,7 @@ 0 16 - 03000000620000000A01000008030000 + 03000000620000000A01000024030000 16 @@ -472,7 +472,7 @@ 0 16 - 030000003C0300008D060000BF030000 + 03000000580300007D07000055040000 16 @@ -512,7 +512,7 @@ 0 16 - 030000003C0300008D060000BF030000 + 03000000580300007D07000055040000 16 @@ -1112,7 +1112,7 @@ 0 16 - 03000000620000000A01000008030000 + 03000000620000000A01000024030000 16 @@ -1132,7 +1132,7 @@ 0 16 - 030000003C0300008D060000BF030000 + 03000000580300007D07000055040000 16 @@ -1152,7 +1152,7 @@ 0 16 - 030000003C0300008D060000BF030000 + 03000000580300007D07000055040000 16 @@ -1232,7 +1232,7 @@ 0 16 - 00000000D803000090060000EB030000 + 000000006E0400008007000081040000 16 @@ -1281,14 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1423 @@ -2574,8 +2574,8 @@ 0 - 1680 - 1050 + 1920 + 1200 @@ -2585,12 +2585,57 @@ 0 100 - 0 + 2 + + ..\..\..\Source\portable\Common\mpu_wrappers.c + 2 + 1071 + 1136 + 1 + + 0 + + + ..\FreeRTOSConfig.h + 68 + 147 + 194 + 1 + + 0 + ..\main.c 0 - 70 - 847 + 510 + 382 + 1 + + 0 + + + ..\..\..\Source\portable\GCC\ARM_CM3_MPU\port.c + 23 + 382 + 424 + 1 + + 0 + + + .\startup_ARMCM4.S + 0 + 125 + 139 + 1 + + 0 + + + C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Source\portable\GCC\ARM_CM3_MPU\portmacro.h + 49 + 241 + 253 1 0 diff --git a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RTOSDemo.uvoptx b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RTOSDemo.uvoptx index 764d15f68..5ea158a3e 100644 --- a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RTOSDemo.uvoptx +++ b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RTOSDemo.uvoptx @@ -149,9 +149,9 @@ 0 0 - 1170 + 1169 1 -
37552
+
38532
0 0 0 @@ -160,23 +160,7 @@ 1 C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\CORTEX_MPU_Simulator_Keil_GCC\main.c - \\RTOSDemo\../main.c\1170 - - - 1 - 0 - 1162 - 1 -
0
- 0 - 0 - 0 - 0 - 0 - 0 - C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\CORTEX_MPU_Simulator_Keil_GCC\main.c - - + \\RTOSDemo\../main.c\1169 @@ -265,7 +249,7 @@ main_and_config - 1 + 0 0 0 0 @@ -385,6 +369,18 @@ 0 0 + + 3 + 11 + 1 + 0 + 0 + 0 + ..\..\..\Source\portable\Common\mpu_wrappers.c + mpu_wrappers.c + 0 + 0 + diff --git a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RTOSDemo.uvprojx b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RTOSDemo.uvprojx index d1700fe14..af7dabaea 100644 --- a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RTOSDemo.uvprojx +++ b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RTOSDemo.uvprojx @@ -334,6 +334,11 @@ 1 ..\..\..\Source\portable\GCC\ARM_CM3_MPU\port.c + + mpu_wrappers.c + 1 + ..\..\..\Source\portable\Common\mpu_wrappers.c + diff --git a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/main.c b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/main.c index 9164070cd..080046e11 100644 --- a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/main.c +++ b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/main.c @@ -397,9 +397,10 @@ int main( void ) xTaskCreateRestricted( &xRegTest2Parameters, NULL ); xTaskCreateRestricted( &xCheckTaskParameters, NULL ); - /* Create a task that does nothing but get deleted. This is done for code - coverage test purposes only. The task's handle is saved in xTaskToDelete - so it can get deleted in the idle task hook. */ + /* Create a task that does nothing but ensure some of the MPU API functions + can be called correctly, then get deleted. This is done for code coverage + test purposes only. The task's handle is saved in xTaskToDelete so it can + get deleted in the idle task hook. */ xTaskCreateRestricted( &xTaskToDeleteParameters, &xTaskToDelete ); /* Create the tasks that are created using the original xTaskCreate() API @@ -844,6 +845,12 @@ static void prvTaskToDelete( void *pvParameters ) /* Remove compiler warnings about unused parameters. */ ( void ) pvParameters; + /* Check the enter and exit critical macros are working correctly. If the + SVC priority is below configMAX_SYSCALL_INTERRUPT_PRIORITY then this will + fault. */ + taskENTER_CRITICAL(); + taskEXIT_CRITICAL(); + /* Exercise the API of various RTOS objects. */ prvExerciseEventGroupAPI(); prvExerciseSemaphoreAPI(); diff --git a/FreeRTOS/Source/portable/Common/mpu_wrappers.c b/FreeRTOS/Source/portable/Common/mpu_wrappers.c new file mode 100644 index 000000000..18435cb2f --- /dev/null +++ b/FreeRTOS/Source/portable/Common/mpu_wrappers.c @@ -0,0 +1,1140 @@ +/* + FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd. + All rights reserved + + VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. + + *************************************************************************** + >>! NOTE: The modification to the GPL is included to allow you to !<< + >>! distribute a combined work that includes FreeRTOS without being !<< + >>! obliged to provide the source code for proprietary components !<< + >>! outside of the FreeRTOS kernel. !<< + *************************************************************************** + + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. Full license text is available on the following + link: http://www.freertos.org/a00114.html + + *************************************************************************** + * * + * FreeRTOS provides completely free yet professionally developed, * + * robust, strictly quality controlled, supported, and cross * + * platform software that is more than just the market leader, it * + * is the industry's de facto standard. * + * * + * Help yourself get started quickly while simultaneously helping * + * to support the FreeRTOS project by purchasing a FreeRTOS * + * tutorial book, reference manual, or both: * + * http://www.FreeRTOS.org/Documentation * + * * + *************************************************************************** + + http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading + the FAQ page "My application does not run, what could be wrong?". Have you + defined configASSERT()? + + http://www.FreeRTOS.org/support - In return for receiving this top quality + embedded software for free we request you assist our global community by + participating in the support forum. + + http://www.FreeRTOS.org/training - Investing in training allows your team to + be as productive as possible as early as possible. Now you can receive + FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers + Ltd, and the world's leading authority on the world's leading RTOS. + + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, + including FreeRTOS+Trace - an indispensable productivity tool, a DOS + compatible FAT file system, and our tiny thread aware UDP/IP stack. + + http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. + Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. + + http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High + Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS + licenses offer ticketed support, indemnification and commercial middleware. + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and + mission critical applications that require provable dependability. + + 1 tab == 4 spaces! +*/ + +/* + * Implementation of the wrapper functions used to raise the processor privilege + * before calling a standard FreeRTOS API function. + */ + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining +all the API functions to use the MPU wrappers. That should only be done when +task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" +#include "timers.h" +#include "event_groups.h" +#include "mpu_prototypes.h" + +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +/* + * Checks to see if being called from the context of an unprivileged task, and + * if so raises the privilege level and returns false - otherwise does nothing + * other than return true. + */ +extern BaseType_t xPortRaisePrivilege( void ); + +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) +{ +BaseType_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskCreateRestricted( pxTaskDefinition, pxCreatedTask ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + BaseType_t MPU_xTaskCreate( TaskFunction_t pvTaskCode, const char * const pcName, uint16_t usStackDepth, void *pvParameters, UBaseType_t uxPriority, TaskHandle_t *pxCreatedTask ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ) + { + TaskHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskCreateStatic( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif /* configSUPPORT_STATIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const xRegions ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskAllocateMPURegions( xTask, xRegions ); + vPortResetPrivilege( xRunningPrivileged ); +} +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_vTaskDelete == 1 ) + void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskDelete( pxTaskToDelete ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_vTaskDelayUntil == 1 ) + void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_xTaskAbortDelay == 1 ) + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskAbortDelay( xTask ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_vTaskDelay == 1 ) + void MPU_vTaskDelay( TickType_t xTicksToDelay ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskDelay( xTicksToDelay ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_uxTaskPriorityGet == 1 ) + UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t pxTask ) + { + UBaseType_t uxReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + uxReturn = uxTaskPriorityGet( pxTask ); + vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_vTaskPrioritySet == 1 ) + void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskPrioritySet( pxTask, uxNewPriority ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_eTaskGetState == 1 ) + eTaskState MPU_eTaskGetState( TaskHandle_t pxTask ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + eTaskState eReturn; + + eReturn = eTaskGetState( pxTask ); + vPortResetPrivilege( xRunningPrivileged ); + return eReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TRACE_FACILITY == 1 ) + void MPU_vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskGetInfo( xTask, pxTaskStatus, xGetFreeStackSpace, eState ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) + { + TaskHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskGetIdleTaskHandle(); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_vTaskSuspend == 1 ) + void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskSuspend( pxTaskToSuspend ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_vTaskSuspend == 1 ) + void MPU_vTaskResume( TaskHandle_t pxTaskToResume ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskResume( pxTaskToResume ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +void MPU_vTaskSuspendAll( void ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskSuspendAll(); + vPortResetPrivilege( xRunningPrivileged ); +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xTaskResumeAll( void ) +{ +BaseType_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskResumeAll(); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +TickType_t MPU_xTaskGetTickCount( void ) +{ +TickType_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskGetTickCount(); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) +{ +UBaseType_t uxReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + uxReturn = uxTaskGetNumberOfTasks(); + vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; +} +/*-----------------------------------------------------------*/ + +char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) +{ +char *pcReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + pcReturn = pcTaskGetName( xTaskToQuery ); + vPortResetPrivilege( xRunningPrivileged ); + return pcReturn; +} +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_xTaskGetHandle == 1 ) + TaskHandle_t MPU_xTaskGetHandle( const char *pcNameToQuery ) + { + TaskHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskGetHandle( pcNameToQuery ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_TRACE_FACILITY == 1 ) + void MPU_vTaskList( char *pcWriteBuffer ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskList( pcWriteBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configGENERATE_RUN_TIME_STATS == 1 ) + void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskGetRunTimeStats( pcWriteBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxTagValue ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskSetApplicationTaskTag( xTask, pxTagValue ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) + { + TaskHookFunction_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskGetApplicationTaskTag( xTask ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskSetThreadLocalStoragePointer( xTaskToSet, xIndex, pvValue ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + void *MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) + { + void *pvReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + pvReturn = pvTaskGetThreadLocalStoragePointer( xTaskToQuery, xIndex ); + vPortResetPrivilege( xRunningPrivileged ); + return pvReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t *pxTaskStatusArray, UBaseType_t uxArraySize, uint32_t *pulTotalRunTime ) + { + UBaseType_t uxReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime ); + vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) + { + UBaseType_t uxReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + uxReturn = uxTaskGetStackHighWaterMark( xTask ); + vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) + { + TaskHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskGetCurrentTaskHandle(); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + BaseType_t MPU_xTaskGetSchedulerState( void ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskGetSchedulerState(); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskSetTimeOutState( pxTimeOut ); + vPortResetPrivilege( xRunningPrivileged ); +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) +{ +BaseType_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskCheckForTimeOut( pxTimeOut, pxTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +#if( configUSE_TASK_NOTIFICATIONS == 1 ) + BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskGenericNotify( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TASK_NOTIFICATIONS == 1 ) + BaseType_t MPU_xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskNotifyWait( ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TASK_NOTIFICATIONS == 1 ) + uint32_t MPU_ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) + { + uint32_t ulReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + ulReturn = ulTaskNotifyTake( xClearCountOnExit, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + return ulReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TASK_NOTIFICATIONS == 1 ) + BaseType_t MPU_xTaskNotifyStateClear( TaskHandle_t xTask ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskNotifyStateClear( xTask ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength, UBaseType_t uxItemSize, uint8_t ucQueueType ) + { + QueueHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) + { + QueueHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueGenericCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxStaticQueue, ucQueueType ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue ) +{ +BaseType_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueGenericReset( pxQueue, xNewQueue ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition ) +{ +BaseType_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); +UBaseType_t uxReturn; + + uxReturn = uxQueueMessagesWaiting( pxQueue ); + vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; +} +/*-----------------------------------------------------------*/ + +UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); +UBaseType_t uxReturn; + + uxReturn = uxQueueSpacesAvailable( xQueue ); + vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xQueueGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); +BaseType_t xReturn; + + xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t pxQueue, void * const pvBuffer ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); +BaseType_t xReturn; + + xReturn = xQueuePeekFromISR( pxQueue, pvBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +void* MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); +void * xReturn; + + xReturn = ( void * ) xQueueGetMutexHolder( xSemaphore ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) + { + QueueHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueCreateMutex( ucQueueType ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) + QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) + { + QueueHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueCreateMutexStatic( ucQueueType, pxStaticQueue ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue, UBaseType_t uxInitialCount ) + { + QueueHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) + + QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) + { + QueueHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueCreateCountingSemaphoreStatic( uxMaxCount, uxInitialCount, pxStaticQueue ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_MUTEXES == 1 ) + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_MUTEXES == 1 ) + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueGiveMutexRecursive( xMutex ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_QUEUE_SETS == 1 ) + QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength ) + { + QueueSetHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueCreateSet( uxEventQueueLength ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_QUEUE_SETS == 1 ) + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t xBlockTimeTicks ) + { + QueueSetMemberHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_QUEUE_SETS == 1 ) + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_QUEUE_SETS == 1 ) + BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if configQUEUE_REGISTRY_SIZE > 0 + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vQueueAddToRegistry( xQueue, pcName ); + + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if configQUEUE_REGISTRY_SIZE > 0 + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vQueueUnregisterQueue( xQueue ); + + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if configQUEUE_REGISTRY_SIZE > 0 + const char *MPU_pcQueueGetName( QueueHandle_t xQueue ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + const char *pcReturn; + + pcReturn = pcQueueGetName( xQueue ); + + vPortResetPrivilege( xRunningPrivileged ); + return pcReturn; + } +#endif +/*-----------------------------------------------------------*/ + +void MPU_vQueueDelete( QueueHandle_t xQueue ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vQueueDelete( xQueue ); + + vPortResetPrivilege( xRunningPrivileged ); +} +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + + void *MPU_pvPortMalloc( size_t xSize ) + { + void *pvReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + pvReturn = pvPortMalloc( xSize ); + + vPortResetPrivilege( xRunningPrivileged ); + + return pvReturn; + } + +#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + + void MPU_vPortFree( void *pv ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vPortFree( pv ); + + vPortResetPrivilege( xRunningPrivileged ); + } + +#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +void MPU_vPortInitialiseBlocks( void ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vPortInitialiseBlocks(); + + vPortResetPrivilege( xRunningPrivileged ); +} +/*-----------------------------------------------------------*/ + +size_t MPU_xPortGetFreeHeapSize( void ) +{ +size_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xPortGetFreeHeapSize(); + + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) ) + TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction ) + { + TimerHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) ) + TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ) + { + TimerHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerCreateStatic( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxTimerBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + void *MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) + { + void * pvReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + pvReturn = pvTimerGetTimerID( xTimer ); + vPortResetPrivilege( xRunningPrivileged ); + + return pvReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTimerSetTimerID( xTimer, pvNewID ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerIsTimerActive( xTimer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) + { + TaskHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerGetTimerDaemonTaskHandle(); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) + BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerPendFunctionCall( xFunctionToPend, pvParameter1, ulParameter2, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) + { + const char * pcReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + pcReturn = pcTimerGetName( xTimer ); + vPortResetPrivilege( xRunningPrivileged ); + + return pcReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) + { + TickType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerGetPeriod( xTimer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) + { + TickType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerGetExpiryTime( xTimer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerGenericCommand( xTimer, xCommandID, xOptionalValue, pxHigherPriorityTaskWoken, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + EventGroupHandle_t MPU_xEventGroupCreate( void ) + { + EventGroupHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xEventGroupCreate(); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) + { + EventGroupHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xEventGroupCreateStatic( pxEventGroupBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) +{ +EventBits_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xEventGroupWaitBits( xEventGroup, uxBitsToWaitFor, xClearOnExit, xWaitForAllBits, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) +{ +EventBits_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xEventGroupClearBits( xEventGroup, uxBitsToClear ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) +{ +EventBits_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xEventGroupSetBits( xEventGroup, uxBitsToSet ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) +{ +EventBits_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xEventGroupSync( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vEventGroupDelete( xEventGroup ); + vPortResetPrivilege( xRunningPrivileged ); +} +/*-----------------------------------------------------------*/ + + + + + +/* Functions that the application writer wants to execute in privileged mode +can be defined in application_defined_privileged_functions.h. The functions +must take the same format as those above whereby the privilege state on exit +equals the privilege state on entry. For example: + +void MPU_FunctionName( [parameters ] ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + FunctionName( [parameters ] ); + + vPortResetPrivilege( xRunningPrivileged ); +} +*/ + +#if configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS == 1 + #include "application_defined_privileged_functions.h" +#endif diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c index fa724340b..9997e5642 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c @@ -87,18 +87,18 @@ task.h is included from an application file. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /* Constants required to access and manipulate the NVIC. */ -#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 ) -#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 ) -#define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 ) -#define portNVIC_SYSPRI1 ( ( volatile uint32_t * ) 0xe000ed1c ) -#define portNVIC_SYS_CTRL_STATE ( ( volatile uint32_t * ) 0xe000ed24 ) +#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) ) +#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) ) +#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) ) +#define portNVIC_SYSPRI1_REG ( * ( ( volatile uint32_t * ) 0xe000ed1c ) ) +#define portNVIC_SYS_CTRL_STATE_REG ( * ( ( volatile uint32_t * ) 0xe000ed24 ) ) #define portNVIC_MEM_FAULT_ENABLE ( 1UL << 16UL ) /* Constants required to access and manipulate the MPU. */ -#define portMPU_TYPE ( ( volatile uint32_t * ) 0xe000ed90 ) -#define portMPU_REGION_BASE_ADDRESS ( ( volatile uint32_t * ) 0xe000ed9C ) -#define portMPU_REGION_ATTRIBUTE ( ( volatile uint32_t * ) 0xe000edA0 ) -#define portMPU_CTRL ( ( volatile uint32_t * ) 0xe000ed94 ) +#define portMPU_TYPE_REG ( * ( ( volatile uint32_t * ) 0xe000ed90 ) ) +#define portMPU_REGION_BASE_ADDRESS_REG ( * ( ( volatile uint32_t * ) 0xe000ed9C ) ) +#define portMPU_REGION_ATTRIBUTE_REG ( * ( ( volatile uint32_t * ) 0xe000edA0 ) ) +#define portMPU_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed94 ) ) #define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */ #define portMPU_ENABLE ( 0x01UL ) #define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL ) @@ -114,19 +114,26 @@ task.h is included from an application file. */ #define portNVIC_SYSTICK_ENABLE ( 0x00000001UL ) #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL ) #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL ) -#define portNVIC_SVC_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL ) +#define portNVIC_SVC_PRI ( ( ( uint32_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY - 1UL ) << 24UL ) /* Constants required to set up the initial stack. */ #define portINITIAL_XPSR ( 0x01000000 ) #define portINITIAL_CONTROL_IF_UNPRIVILEGED ( 0x03 ) #define portINITIAL_CONTROL_IF_PRIVILEGED ( 0x02 ) +/* Constants required to check the validity of an interrupt priority. */ +#define portFIRST_USER_INTERRUPT_NUMBER ( 16 ) +#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 ) +#define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) ) +#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff ) +#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 ) +#define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 ) +#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL ) +#define portPRIGROUP_SHIFT ( 8UL ) + /* Offsets in the stack to the parameters when inside the SVC handler. */ #define portOFFSET_TO_PC ( 6 ) -/* Set the privilege level to user mode if xRunningPrivileged is false. */ -#define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0" :::"r0" ) - /* For strict compliance with the Cortex-M spec the task start address should have bit-0 clear, as it is loaded into the PC on exit from an ISR. */ #define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL ) @@ -158,7 +165,7 @@ static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes ) PRIVI * if so raises the privilege level and returns false - otherwise does nothing * other than return true. */ -static BaseType_t prvRaisePrivilege( void ) __attribute__(( naked )); +BaseType_t xPortRaisePrivilege( void ) __attribute__(( naked )); /* * Standard FreeRTOS exception handlers. @@ -178,6 +185,17 @@ static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVIL */ static void prvSVCHandler( uint32_t *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION; +/* + * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure + * FreeRTOS API functions are not called from interrupts that have been assigned + * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. + */ +#if ( configASSERT_DEFINED == 1 ) + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; + static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16; +#endif /* configASSERT_DEFINED */ + /*-----------------------------------------------------------*/ /* @@ -238,11 +256,11 @@ uint8_t ucSVCNumber; ucSVCNumber = ( ( uint8_t * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ]; switch( ucSVCNumber ) { - case portSVC_START_SCHEDULER : *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI; + case portSVC_START_SCHEDULER : portNVIC_SYSPRI1_REG |= portNVIC_SVC_PRI; prvRestoreContextOfFirstTask(); break; - case portSVC_YIELD : *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET; + case portSVC_YIELD : portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; /* Barriers are normally not required but do ensure the code is completely within the specified behaviour for the @@ -305,9 +323,55 @@ BaseType_t xPortStartScheduler( void ) http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ); - /* Make PendSV and SysTick the same priority as the kernel. */ - *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI; - *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI; + #if( configASSERT_DEFINED == 1 ) + { + volatile uint32_t ulOriginalPriority; + volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); + volatile uint8_t ucMaxPriorityValue; + + /* Determine the maximum priority from which ISR safe FreeRTOS API + functions can be called. ISR safe functions are those that end in + "FromISR". FreeRTOS maintains separate thread and ISR API functions to + ensure interrupt entry is as fast and simple as possible. + + Save the interrupt priority value that is about to be clobbered. */ + ulOriginalPriority = *pucFirstUserPriorityRegister; + + /* Determine the number of priority bits available. First write to all + possible bits. */ + *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; + + /* Read the value back to see how many bits stuck. */ + ucMaxPriorityValue = *pucFirstUserPriorityRegister; + + /* Use the same mask on the maximum system call priority. */ + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + + /* Calculate the maximum acceptable priority group value for the number + of bits read back. */ + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) + { + ulMaxPRIGROUPValue--; + ucMaxPriorityValue <<= ( uint8_t ) 0x01; + } + + /* Shift the priority group value back to its position within the AIRCR + register. */ + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + + /* Restore the clobbered interrupt priority register to its original + value. */ + *pucFirstUserPriorityRegister = ulOriginalPriority; + } + #endif /* conifgASSERT_DEFINED */ + + /* Make PendSV and SysTick the same priority as the kernel, and the SVC + handler higher priority so it can be used to exit a critical section (where + lower priorities are masked). */ + portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI; + portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI; /* Configure the regions in the MPU that are common to all tasks. */ prvSetupMPU(); @@ -338,18 +402,18 @@ void vPortEndScheduler( void ) void vPortEnterCritical( void ) { -BaseType_t xRunningPrivileged = prvRaisePrivilege(); +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); portDISABLE_INTERRUPTS(); uxCriticalNesting++; - portRESET_PRIVILEGE( xRunningPrivileged ); + vPortResetPrivilege( xRunningPrivileged ); } /*-----------------------------------------------------------*/ void vPortExitCritical( void ) { -BaseType_t xRunningPrivileged = prvRaisePrivilege(); +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); configASSERT( uxCriticalNesting ); uxCriticalNesting--; @@ -357,7 +421,7 @@ BaseType_t xRunningPrivileged = prvRaisePrivilege(); { portENABLE_INTERRUPTS(); } - portRESET_PRIVILEGE( xRunningPrivileged ); + vPortResetPrivilege( xRunningPrivileged ); } /*-----------------------------------------------------------*/ @@ -413,7 +477,7 @@ uint32_t ulDummy; if( xTaskIncrementTick() != pdFALSE ) { /* Pend a context switch. */ - *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET; + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy ); @@ -427,8 +491,8 @@ uint32_t ulDummy; static void prvSetupTimerInterrupt( void ) { /* Configure SysTick to interrupt at the requested rate. */ - *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE; + portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE; } /*-----------------------------------------------------------*/ @@ -441,14 +505,14 @@ extern uint32_t __privileged_data_start__[]; extern uint32_t __privileged_data_end__[]; /* Check the expected MPU is present. */ - if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE ) + if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE ) { /* First setup the entire flash for unprivileged read only access. */ - *portMPU_REGION_BASE_ADDRESS = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */ - ( portMPU_REGION_VALID ) | - ( portUNPRIVILEGED_FLASH_REGION ); + portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */ + ( portMPU_REGION_VALID ) | + ( portUNPRIVILEGED_FLASH_REGION ); - *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_ONLY ) | + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_ONLY ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) | ( portMPU_REGION_ENABLE ); @@ -456,41 +520,41 @@ extern uint32_t __privileged_data_end__[]; /* Setup the first 16K for privileged only access (even though less than 10K is actually being used). This is where the kernel code is placed. */ - *portMPU_REGION_BASE_ADDRESS = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */ - ( portMPU_REGION_VALID ) | - ( portPRIVILEGED_FLASH_REGION ); + portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */ + ( portMPU_REGION_VALID ) | + ( portPRIVILEGED_FLASH_REGION ); - *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) | + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) | ( portMPU_REGION_ENABLE ); /* Setup the privileged data RAM region. This is where the kernel data is placed. */ - *portMPU_REGION_BASE_ADDRESS = ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */ - ( portMPU_REGION_VALID ) | - ( portPRIVILEGED_RAM_REGION ); + portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */ + ( portMPU_REGION_VALID ) | + ( portPRIVILEGED_RAM_REGION ); - *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | ( portMPU_REGION_ENABLE ); /* By default allow everything to access the general peripherals. The system peripherals and registers are protected. */ - *portMPU_REGION_BASE_ADDRESS = ( portPERIPHERALS_START_ADDRESS ) | - ( portMPU_REGION_VALID ) | - ( portGENERAL_PERIPHERALS_REGION ); + portMPU_REGION_BASE_ADDRESS_REG = ( portPERIPHERALS_START_ADDRESS ) | + ( portMPU_REGION_VALID ) | + ( portGENERAL_PERIPHERALS_REGION ); - *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) | + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) | ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) | ( portMPU_REGION_ENABLE ); /* Enable the memory fault exception. */ - *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE; + portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE; /* Enable the MPU with the background region configured. */ - *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE ); + portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE ); } } /*-----------------------------------------------------------*/ @@ -519,7 +583,7 @@ uint32_t ulRegionSize, ulReturnValue = 4; } /*-----------------------------------------------------------*/ -static BaseType_t prvRaisePrivilege( void ) +BaseType_t xPortRaisePrivilege( void ) { __asm volatile ( @@ -633,1046 +697,65 @@ uint32_t ul; } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) -{ -BaseType_t xReturn; -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskCreateRestricted( pxTaskDefinition, pxCreatedTask ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - BaseType_t MPU_xTaskCreate( TaskFunction_t pvTaskCode, const char * const pcName, uint16_t usStackDepth, void *pvParameters, UBaseType_t uxPriority, TaskHandle_t *pxCreatedTask ) - { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ -/*-----------------------------------------------------------*/ - -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ) - { - TaskHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskCreateStatic( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif /* configSUPPORT_STATIC_ALLOCATION */ -/*-----------------------------------------------------------*/ - -void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const xRegions ) -{ -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vTaskAllocateMPURegions( xTask, xRegions ); - portRESET_PRIVILEGE( xRunningPrivileged ); -} -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelete == 1 ) - void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vTaskDelete( pxTaskToDelete ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelayUntil == 1 ) - void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskAbortDelay == 1 ) - BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) - { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskAbortDelay( xTask ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelay == 1 ) - void MPU_vTaskDelay( TickType_t xTicksToDelay ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vTaskDelay( xTicksToDelay ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_uxTaskPriorityGet == 1 ) - UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t pxTask ) - { - UBaseType_t uxReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - uxReturn = uxTaskPriorityGet( pxTask ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return uxReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskPrioritySet == 1 ) - void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vTaskPrioritySet( pxTask, uxNewPriority ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_eTaskGetState == 1 ) - eTaskState MPU_eTaskGetState( TaskHandle_t pxTask ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - eTaskState eReturn; - - eReturn = eTaskGetState( pxTask ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return eReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( configUSE_TRACE_FACILITY == 1 ) - void MPU_vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vTaskGetInfo( xTask, pxTaskStatus, xGetFreeStackSpace, eState ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) - TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) - { - TaskHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskGetIdleTaskHandle(); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vTaskSuspend( pxTaskToSuspend ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - void MPU_vTaskResume( TaskHandle_t pxTaskToResume ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vTaskResume( pxTaskToResume ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -void MPU_vTaskSuspendAll( void ) -{ -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vTaskSuspendAll(); - portRESET_PRIVILEGE( xRunningPrivileged ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xTaskResumeAll( void ) -{ -BaseType_t xReturn; -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskResumeAll(); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -TickType_t MPU_xTaskGetTickCount( void ) -{ -TickType_t xReturn; -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskGetTickCount(); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) -{ -UBaseType_t uxReturn; -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - uxReturn = uxTaskGetNumberOfTasks(); - portRESET_PRIVILEGE( xRunningPrivileged ); - return uxReturn; -} -/*-----------------------------------------------------------*/ - -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) -{ -char *pcReturn; -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - pcReturn = pcTaskGetName( xTaskToQuery ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return pcReturn; -} -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskGetHandle == 1 ) - TaskHandle_t MPU_xTaskGetHandle( const char *pcNameToQuery ) - { - TaskHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskGetHandle( pcNameToQuery ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - void MPU_vTaskList( char *pcWriteBuffer ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vTaskList( pcWriteBuffer ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configGENERATE_RUN_TIME_STATS == 1 ) - void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vTaskGetRunTimeStats( pcWriteBuffer ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) - void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxTagValue ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vTaskSetApplicationTaskTag( xTask, pxTagValue ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) - TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) - { - TaskHookFunction_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskGetApplicationTaskTag( xTask ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) - void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vTaskSetThreadLocalStoragePointer( xTaskToSet, xIndex, pvValue ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) - void *MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) - { - void *pvReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - pvReturn = pvTaskGetThreadLocalStoragePointer( xTaskToQuery, xIndex ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return pvReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) - BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) - { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t *pxTaskStatusArray, UBaseType_t uxArraySize, uint32_t *pulTotalRunTime ) - { - UBaseType_t uxReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return uxReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) - UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) - { - UBaseType_t uxReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - uxReturn = uxTaskGetStackHighWaterMark( xTask ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return uxReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) - TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) - { - TaskHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskGetCurrentTaskHandle(); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) - BaseType_t MPU_xTaskGetSchedulerState( void ) - { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskGetSchedulerState(); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) -{ -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vTaskSetTimeOutState( pxTimeOut ); - portRESET_PRIVILEGE( xRunningPrivileged ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) -{ -BaseType_t xReturn; -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskCheckForTimeOut( pxTimeOut, pxTicksToWait ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if( configUSE_TASK_NOTIFICATIONS == 1 ) - BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) - { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskGenericNotify( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( configUSE_TASK_NOTIFICATIONS == 1 ) - BaseType_t MPU_xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) - { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskNotifyWait( ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( configUSE_TASK_NOTIFICATIONS == 1 ) - uint32_t MPU_ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) - { - uint32_t ulReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - ulReturn = ulTaskNotifyTake( xClearCountOnExit, xTicksToWait ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return ulReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( configUSE_TASK_NOTIFICATIONS == 1 ) - BaseType_t MPU_xTaskNotifyStateClear( TaskHandle_t xTask ) - { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskNotifyStateClear( xTask ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength, UBaseType_t uxItemSize, uint8_t ucQueueType ) - { - QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) - { - QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueGenericCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxStaticQueue, ucQueueType ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue ) -{ -BaseType_t xReturn; -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueGenericReset( pxQueue, xNewQueue ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition ) -{ -BaseType_t xReturn; -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue ) -{ -BaseType_t xRunningPrivileged = prvRaisePrivilege(); -UBaseType_t uxReturn; - - uxReturn = uxQueueMessagesWaiting( pxQueue ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return uxReturn; -} -/*-----------------------------------------------------------*/ - -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) -{ -BaseType_t xRunningPrivileged = prvRaisePrivilege(); -UBaseType_t uxReturn; - - uxReturn = uxQueueSpacesAvailable( xQueue ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return uxReturn; -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xQueueGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking ) -{ -BaseType_t xRunningPrivileged = prvRaisePrivilege(); -BaseType_t xReturn; - - xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t pxQueue, void * const pvBuffer ) -{ -BaseType_t xRunningPrivileged = prvRaisePrivilege(); -BaseType_t xReturn; - - xReturn = xQueuePeekFromISR( pxQueue, pvBuffer ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -void* MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) -{ -BaseType_t xRunningPrivileged = prvRaisePrivilege(); -void * xReturn; - - xReturn = ( void * ) xQueueGetMutexHolder( xSemaphore ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) - QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) - { - QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueCreateMutex( ucQueueType ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) - QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) - { - QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueCreateMutexStatic( ucQueueType, pxStaticQueue ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) - QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue, UBaseType_t uxInitialCount ) - { - QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) - - QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) - { - QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueCreateCountingSemaphoreStatic( uxMaxCount, uxInitialCount, pxStaticQueue ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_MUTEXES == 1 ) - BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime ) - { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_MUTEXES == 1 ) - BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex ) - { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueGiveMutexRecursive( xMutex ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_QUEUE_SETS == 1 ) - QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength ) - { - QueueSetHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueCreateSet( uxEventQueueLength ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_QUEUE_SETS == 1 ) - QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t xBlockTimeTicks ) - { - QueueSetMemberHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_QUEUE_SETS == 1 ) - BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) - { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_QUEUE_SETS == 1 ) - BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) - { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if configQUEUE_REGISTRY_SIZE > 0 - void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vQueueAddToRegistry( xQueue, pcName ); - - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if configQUEUE_REGISTRY_SIZE > 0 - void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vQueueUnregisterQueue( xQueue ); - - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if configQUEUE_REGISTRY_SIZE > 0 - const char *MPU_pcQueueGetName( QueueHandle_t xQueue ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - const char *pcReturn; - - pcReturn = pcQueueGetName( xQueue ); - - portRESET_PRIVILEGE( xRunningPrivileged ); - return pcReturn; - } -#endif -/*-----------------------------------------------------------*/ - -void MPU_vQueueDelete( QueueHandle_t xQueue ) -{ -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vQueueDelete( xQueue ); - - portRESET_PRIVILEGE( xRunningPrivileged ); -} -/*-----------------------------------------------------------*/ - -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - - void *MPU_pvPortMalloc( size_t xSize ) - { - void *pvReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - pvReturn = pvPortMalloc( xSize ); - - portRESET_PRIVILEGE( xRunningPrivileged ); - - return pvReturn; - } - -#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ -/*-----------------------------------------------------------*/ - -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) +#if( configASSERT_DEFINED == 1 ) - void MPU_vPortFree( void *pv ) + void vPortValidateInterruptPriority( void ) { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vPortFree( pv ); - - portRESET_PRIVILEGE( xRunningPrivileged ); - } - -#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ -/*-----------------------------------------------------------*/ - -void MPU_vPortInitialiseBlocks( void ) -{ -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vPortInitialiseBlocks(); - - portRESET_PRIVILEGE( xRunningPrivileged ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xPortGetFreeHeapSize( void ) -{ -size_t xReturn; -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xPortGetFreeHeapSize(); + uint32_t ulCurrentInterrupt; + uint8_t ucCurrentPriority; - portRESET_PRIVILEGE( xRunningPrivileged ); + /* Obtain the number of the currently executing interrupt. */ + __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) ) - TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction ) - { - TimerHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction ); - portRESET_PRIVILEGE( xRunningPrivileged ); - - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) ) - TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ) - { - TimerHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTimerCreateStatic( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxTimerBuffer ); - portRESET_PRIVILEGE( xRunningPrivileged ); - - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( configUSE_TIMERS == 1 ) - void *MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) - { - void * pvReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - pvReturn = pvTimerGetTimerID( xTimer ); - portRESET_PRIVILEGE( xRunningPrivileged ); - - return pvReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( configUSE_TIMERS == 1 ) - void MPU_vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ) - { - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vTimerSetTimerID( xTimer, pvNewID ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if( configUSE_TIMERS == 1 ) - BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) - { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTimerIsTimerActive( xTimer ); - portRESET_PRIVILEGE( xRunningPrivileged ); - - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( configUSE_TIMERS == 1 ) - TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) - { - TaskHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTimerGetTimerDaemonTaskHandle(); - portRESET_PRIVILEGE( xRunningPrivileged ); - - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) - BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) - { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTimerPendFunctionCall( xFunctionToPend, pvParameter1, ulParameter2, xTicksToWait ); - portRESET_PRIVILEGE( xRunningPrivileged ); - - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( configUSE_TIMERS == 1 ) - const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) - { - const char * pcReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - pcReturn = pcTimerGetName( xTimer ); - portRESET_PRIVILEGE( xRunningPrivileged ); - - return pcReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( configUSE_TIMERS == 1 ) - TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) - { - TickType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTimerGetPeriod( xTimer ); - portRESET_PRIVILEGE( xRunningPrivileged ); - - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( configUSE_TIMERS == 1 ) - TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) - { - TickType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTimerGetExpiryTime( xTimer ); - portRESET_PRIVILEGE( xRunningPrivileged ); - - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( configUSE_TIMERS == 1 ) - BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) - { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTimerGenericCommand( xTimer, xCommandID, xOptionalValue, pxHigherPriorityTaskWoken, xTicksToWait ); - portRESET_PRIVILEGE( xRunningPrivileged ); - - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - EventGroupHandle_t MPU_xEventGroupCreate( void ) - { - EventGroupHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xEventGroupCreate(); - portRESET_PRIVILEGE( xRunningPrivileged ); - - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) - { - EventGroupHandle_t xReturn; - BaseType_t xRunningPrivileged = prvRaisePrivilege(); + /* Is the interrupt number a user defined interrupt? */ + if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER ) + { + /* Look up the interrupt's priority. */ + ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ]; + + /* The following assertion will fail if a service routine (ISR) for + an interrupt that has been assigned a priority above + configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API + function. ISR safe FreeRTOS API functions must *only* be called + from interrupts that have been assigned a priority at or below + configMAX_SYSCALL_INTERRUPT_PRIORITY. + + Numerically low interrupt priority numbers represent logically high + interrupt priorities, therefore the priority of the interrupt must + be set to a value equal to or numerically *higher* than + configMAX_SYSCALL_INTERRUPT_PRIORITY. + + Interrupts that use the FreeRTOS API must not be left at their + default priority of zero as that is the highest possible priority, + which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY, + and therefore also guaranteed to be invalid. + + FreeRTOS maintains separate thread and ISR API functions to ensure + interrupt entry is as fast and simple as possible. + + The following links provide detailed information: + http://www.freertos.org/RTOS-Cortex-M3-M4.html + http://www.freertos.org/FAQHelp.html */ + configASSERT( ucCurrentPriority >= ucMaxSysCallPriority ); + } - xReturn = xEventGroupCreateStatic( pxEventGroupBuffer ); - portRESET_PRIVILEGE( xRunningPrivileged ); + /* Priority grouping: The interrupt controller (NVIC) allows the bits + that define each interrupt's priority to be split between bits that + define the interrupt's pre-emption priority bits and bits that define + the interrupt's sub-priority. For simplicity all bits must be defined + to be pre-emption priority bits. The following assertion will fail if + this is not the case (if some bits represent a sub-priority). - return xReturn; + If the application only uses CMSIS libraries for interrupt + configuration then the correct setting can be achieved on all Cortex-M + devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the + scheduler. Note however that some vendor specific peripheral libraries + assume a non-zero priority group setting, in which cases using a value + of zero will result in unpredicable behaviour. */ + configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue ); } -#endif -/*-----------------------------------------------------------*/ - -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) -{ -EventBits_t xReturn; -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xEventGroupWaitBits( xEventGroup, uxBitsToWaitFor, xClearOnExit, xWaitForAllBits, xTicksToWait ); - portRESET_PRIVILEGE( xRunningPrivileged ); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) -{ -EventBits_t xReturn; -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xEventGroupClearBits( xEventGroup, uxBitsToClear ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) -{ -EventBits_t xReturn; -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xEventGroupSetBits( xEventGroup, uxBitsToSet ); - portRESET_PRIVILEGE( xRunningPrivileged ); - - return xReturn; -} +#endif /* configASSERT_DEFINED */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) -{ -EventBits_t xReturn; -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xEventGroupSync( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTicksToWait ); - portRESET_PRIVILEGE( xRunningPrivileged ); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) -{ -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - vEventGroupDelete( xEventGroup ); - portRESET_PRIVILEGE( xRunningPrivileged ); -} -/*-----------------------------------------------------------*/ - - - - - -/* Functions that the application writer wants to execute in privileged mode -can be defined in application_defined_privileged_functions.h. The functions -must take the same format as those above whereby the privilege state on exit -equals the privilege state on entry. For example: - -void MPU_FunctionName( [parameters ] ) -{ -BaseType_t xRunningPrivileged = prvRaisePrivilege(); - - FunctionName( [parameters ] ); - - portRESET_PRIVILEGE( xRunningPrivileged ); -} -*/ - -#if configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS == 1 - #include "application_defined_privileged_functions.h" -#endif diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h index 3441b2780..3ffd3832e 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h @@ -160,62 +160,169 @@ typedef struct MPU_SETTINGS /* Scheduler utilities. */ #define portYIELD() __asm volatile ( " SVC %0 \n" :: "i" (portSVC_YIELD) ) -#define portYIELD_WITHIN_API() *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET +#define portYIELD_WITHIN_API() \ +{ \ + /* Set a PendSV to request a context switch. */ \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + \ + /* Barriers are normally not required but do ensure the code is completely \ + within the specified behaviour for the architecture. */ \ + __asm volatile( "dsb" ); \ + __asm volatile( "isb" ); \ +} -#define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 ) -#define portNVIC_PENDSVSET 0x10000000 -#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET +#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) ) +#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ - /* Critical section management. */ - -/* - * Set basepri to portMAX_SYSCALL_INTERRUPT_PRIORITY without effecting other - * registers. r0 is clobbered. - */ -#define portSET_INTERRUPT_MASK() \ - __asm volatile \ - ( \ - " mov r0, %0 \n" \ - " msr basepri, r0 \n" \ - ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY):"r0" \ - ) - -/* - * Set basepri back to 0 without effective other registers. - * r0 is clobbered. FAQ: Setting BASEPRI to 0 is not a bug. Please see - * http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing. - */ -#define portCLEAR_INTERRUPT_MASK() \ - __asm volatile \ - ( \ - " mov r0, #0 \n" \ - " msr basepri, r0 \n" \ - :::"r0" \ - ) - -/* FAQ: Setting BASEPRI to 0 is not a bug. Please see -http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() 0;portSET_INTERRUPT_MASK() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) portCLEAR_INTERRUPT_MASK();(void)x - extern void vPortEnterCritical( void ); extern void vPortExitCritical( void ); +#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortSetBASEPRI(x) +#define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI() +#define portENABLE_INTERRUPTS() vPortSetBASEPRI(0) +#define portENTER_CRITICAL() vPortEnterCritical() +#define portEXIT_CRITICAL() vPortExitCritical() -#define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK() -#define portENABLE_INTERRUPTS() portCLEAR_INTERRUPT_MASK() -#define portENTER_CRITICAL() vPortEnterCritical() -#define portEXIT_CRITICAL() vPortExitCritical() /*-----------------------------------------------------------*/ -/* Task function macros as described on the FreeRTOS.org WEB site. */ +/* Task function macros as described on the FreeRTOS.org WEB site. These are +not necessary for to use this port. They are defined so the common demo files +(which build with all the ports) will build. */ #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) +/*-----------------------------------------------------------*/ + +/* Architecture specific optimisations. */ +#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION + #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 +#endif + +#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 + /* Generic helper function. */ + __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap ) + { + uint8_t ucReturn; + + __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) ); + return ucReturn; + } + + /* Check the configuration. */ + #if( configMAX_PRIORITIES > 32 ) + #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice. + #endif + + /* Store/clear the ready priorities in a bit map. */ + #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) + #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) + + /*-----------------------------------------------------------*/ + + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) + +#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ + +/*-----------------------------------------------------------*/ + +#ifdef configASSERT + void vPortValidateInterruptPriority( void ); + #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() +#endif + +/* portNOP() is not required by this port. */ #define portNOP() +#define portINLINE __inline + +#ifndef portFORCE_INLINE + #define portFORCE_INLINE inline __attribute__(( always_inline)) +#endif + +/* Set the privilege level to user mode if xRunningPrivileged is false. */ +portFORCE_INLINE static void vPortResetPrivilege( BaseType_t xRunningPrivileged ) +{ + if( xRunningPrivileged != pdTRUE ) + { + __asm volatile ( " mrs r0, control \n" \ + " orr r0, #1 \n" \ + " msr control, r0 \n" \ + :::"r0" ); + } +} +/*-----------------------------------------------------------*/ + +portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void ) +{ +uint32_t ulCurrentInterrupt; +BaseType_t xReturn; + + /* Obtain the number of the currently executing interrupt. */ + __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) ); + + if( ulCurrentInterrupt == 0 ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + return xReturn; +} + +/*-----------------------------------------------------------*/ + +portFORCE_INLINE static void vPortRaiseBASEPRI( void ) +{ +uint32_t ulNewBASEPRI; + + __asm volatile + ( + " mov %0, %1 \n" \ + " msr basepri, %0 \n" \ + " isb \n" \ + " dsb \n" \ + :"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); +} + +/*-----------------------------------------------------------*/ + +portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void ) +{ +uint32_t ulOriginalBASEPRI, ulNewBASEPRI; + + __asm volatile + ( + " mrs %0, basepri \n" \ + " mov %1, %2 \n" \ + " msr basepri, %1 \n" \ + " isb \n" \ + " dsb \n" \ + :"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + + /* This return will not be reached but is necessary to prevent compiler + warnings. */ + return ulOriginalBASEPRI; +} +/*-----------------------------------------------------------*/ + +portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue ) +{ + __asm volatile + ( + " msr basepri, %0 " :: "r" ( ulNewMaskValue ) + ); +} +/*-----------------------------------------------------------*/ + #ifdef __cplusplus }