Øyvind Harboe [Wed, 30 Mar 2011 11:32:47 +0000 (13:32 +0200)]
target: add -dbgbase option to target configuration
Really a Cortex-A specific option, but there is no
system in place to support target specific options
currently and there has been no need for such a system
until now.
Olivier Schonken [Mon, 28 Mar 2011 17:31:17 +0000 (19:31 +0200)]
at91sam3: Modified cidr comparisson to ignore version bits
production processor versions increment, thus the version
bits should be ignored for future proofing. e.g.
Engineering sample version == 0x00, production version 0x01
Uwe Hermann [Thu, 17 Mar 2011 02:22:12 +0000 (03:22 +0100)]
Fix a bunch of typos.
Fix a bunch of typos.
Most are in code comments, so nothing should break. UNKOWN_COMMAND and
CMD_UNKOWN are not used elsewhere, so correcting the spelling should
also not break anything.
Aaron Carroll [Wed, 9 Mar 2011 19:39:55 +0000 (06:39 +1100)]
omap4430: force hardware breakpoints for GDB
Soft breakpoints are currently broken if the MMU is enabled due to incorrect
cache flushing. Until this is fixed, force the use of hardware breakpoints.
Mathias K [Thu, 24 Feb 2011 12:00:59 +0000 (13:00 +0100)]
ft2232: fix possible read buffer overflow
This patch fix a possible read buffer overflow in ft2232_execute_queue.
Also the correct read queue size for libftdi and libftd2xx was added and
and tested.
In function ft2232_write a uninitialized value was initialized because we
don't know if this value was set in the ftdi api call.
Mathias K [Sun, 20 Feb 2011 10:12:53 +0000 (11:12 +0100)]
dsp563xx: rudimentary gdb support
This patch add rudimentary gdb support. The gdb register list
order is corrected. All registers are now 32bit width. Events are
send to signalize gdb the current target status. Resume and step
function was corrected to consider a modified pc register. Read/write
memory now support L memory type, this means a memory with alternating
y/x memory words. The memspace variable, used by gdb, is now observed
before a default memory access is initiated. Dummy functions for breakpoint
and watchpoint are added.
Luca Ellero [Mon, 14 Feb 2011 21:46:53 +0000 (21:46 +0000)]
arm_adi_v5: add/move apsel member in struct adiv5_dap
This patch tries to make some order in "apsel" mess.
"dap apsel" command was quite useless (and broken) by itself.
With this patch we can use it to select between AHB or APB memory access
(previous patch 05ab8bdb813acdcd74afa71d6656c2df816cb230 was somehow broken).
- moves member apsel (in struct adiv5_dap) to ap_current
- adds apsel member
this strange choice is made trying to keep coherence in "dap apsel" command
and to keep compatibility with other code (for example cortex_a8).
Mathias K [Thu, 17 Feb 2011 08:11:25 +0000 (09:11 +0100)]
dsp563xx: minor fixes, code cleanup
This patch move the dsp563xx_target_create function to the
related code block. Also the target examine function was added
and the register cache is initialized in a separate function. The
missing functionality to invalidate the x memory context on memory
writes was also added.
Mathias K [Thu, 17 Feb 2011 08:05:42 +0000 (09:05 +0100)]
dsp563xx_once: Correct wrong return value on jtag communication errors
This patch change the return value on a jtag communication error
to TARGET_UNKNOWN because this function should return the current
target status and not a error code from the underlying api call.
Also the validity of the jtag_status is extended to all static
bits in this value.
Bjarne Steinsbo [Tue, 15 Feb 2011 19:23:40 +0000 (20:23 +0100)]
lpc32xx: Flash driver
Based on the lpc3180 driver, but released as a separate driver for two reasons:
1) I don't have an lpc3180 to test it against, so it might unintentionally break compatibility.
2) It's using a different OOB layout than lpc3180.
Rewritten so that it no longer borrows code from the NXP CDL library. Instead borrowing code from the u-boot port to lpc32xx, written by Kevin Wells.
Tested on lpc3250 (Hitex LPC3250-Stick). OOB layout is compatible with LPCLinux.
Phil Fong [Tue, 15 Feb 2011 19:17:33 +0000 (20:17 +0100)]
dsp563xx_once: Correct definition of JTAG_INSTR_CLAMP
I've been working on Rodrigo on adding support to flash
Freescale dsp56800e devices and have been looking at the
dsp563xx code. I think the define for the JTAG CLAMP
instruction in dsp563xx_once.c is incorrect. It should
be 0x05 according the Freescale AN2074 (and is also
0x05 in the dsp568xx according to AN1935). It won't
actually change anything in OpenOCD since this define
is not used anywhere (as far as I can tell).
Luca Ellero [Sat, 12 Feb 2011 11:54:42 +0000 (11:54 +0000)]
cortex_a9: move dap_ap_select to arm_avi_v5
dap_ap_select was used in the code at various points, but that can lead to
confusion, without any knowledge of what AP is really selected at some
points.
Some bugs derive from this (for example md/mw doesn't work well after
issueing "dap apsel" command).
Moving it to arm_adi_v5.c (using mem_ap_sel* functions instead of mem_ap_*)
make the code more clear and more easier to maintain.
In the future it should be made "static" to avoid its use outside arm_adi_v5
One further benefit is the various goto has been removed as well
Luca Ellero [Wed, 9 Feb 2011 20:36:14 +0000 (20:36 +0000)]
cortex_a9: implement read/write memory through APB-AP
This patch adds read/write capability to memory addresses not
accessible through AHB-AP (for example "boot ROM code").
To select AHB or APB, a "dap apsel" command must be issued:
dap apsel 0 -> following memory accesses are through AHB
dap apsel 1 -> following memory accesses are through APB
NOTE: at the moment APB memory accesses are very slow, compared
to AHB accesses. Work has to be done to get it faster (for
example LDR/STR instead od LDRB/STRB)
Mathias K [Tue, 1 Feb 2011 12:00:59 +0000 (13:00 +0100)]
more changes to dsp563xx code
Hello,
this patch adds the missing cpu registers and the correct read/write register functions and fixed
most of the halt/step/resume issues. The complete missing error propagation was added.
Aaron Carroll [Wed, 2 Feb 2011 07:16:26 +0000 (18:16 +1100)]
omap4430: fix reset sequence
* Write to the PRM reset control register should have been 'phys';
* Setup empty reset-assert handlers for the M3's, since the board-level reset
takes care of them;
* Remove the dbginit cruft, because it gets called implicitly on reset.
Aaron Carroll [Mon, 24 Jan 2011 07:06:44 +0000 (18:06 +1100)]
Add '-coreid' target option to support multiple cores per TAP.
ARM Cortex-A9 multi-core chips expose a single TAP/DAP which connects
to both cores. The '-coreid' option selects which core the target
should connect to.
Note that at present, OpenOCD can connect to either core, but not both
simulatenously, until ADI contexts can be shared.
projects / openocd / log