Steven Stallion [Sun, 10 Jul 2016 03:17:14 +0000 (22:17 -0500)]
kinetis: support mass erase on boards without SRST
NXP (nee Freescale) documents the mass erase procedure using the MDM-AP
block in AN4835. Existing support for this feature did not properly
handle boards without SRST. This patch updates the mass_erase command
such that it works correctly on these boards. Additionally, the core is
left in a halted state once complete to prevent reset loops due to the
watchdog as reported by some users.
Since the MDM-AP provides an additional method of halting and resetting
the core that is disconnected from the DAP, additional commands are
provided to manage this state. These commands are particularly helpful
when connecting to a target with an unknown state.
Change-Id: I40f006d5d964befb12b019c5d509988decdd3f91 Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/3540 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
at91sam7: do not touch flash banks which belong to other targets
at91sam7_read_part_info() walks throw all flash banks following
current one.
I don't know why it has to do it at all (possibly for multi-bank
devices like SAM7S512), but if there is more than one target in JTAG
chain, this lookup can touch flash bank of another (possibly not
halted) target, which cause probe error and current command
execution abort.
[andreas.fritiofson@gmail.com]: Change to for-loop and reduce
indentation
Change-Id: Ide50e93578786e1250f7a0fd0e3d296247924814 Signed-off-by: Sergey A. Borshch <sb-sf@users.sourceforge.net> Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2610 Tested-by: jenkins
This change adds JTAG transport in pass-through mode
to the cmsis-dap driver. The patch is originally from
Phillip Pearson <pp@myelin.co.nz>, with additions
by Maksym Hilliaka <oter@frozen-team.com>
Remco Bloemen [Tue, 9 Aug 2016 11:30:12 +0000 (12:30 +0100)]
interface: Add XDS100v3 support.
XDS100v3 is software compatible with the XDS100v2, but has a
different usb pid. This commit adds `xds100v3.cfg` that sources
the v2 one and changes the usb pid.
Change-Id: Ie29d325e8992d2de2f97d70862beeb63932ffa80 Signed-off-by: Remco Bloemen <openocd-gerrit@xn--2-umb.com>
Reviewed-on: http://openocd.zylin.com/3632 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Peter A. Bigot [Wed, 10 Aug 2016 21:58:07 +0000 (16:58 -0500)]
doc: correct and standardize instructions for disabling TCP servers
The instructions to set the port to zero to disable a service has not
worked for several years: the effect of doing so is to start the service
on a port randomly selected by the bind(2) system call.
Update the documentation to reflect the new standard way of disabling
network services.
Change-Id: Ic5315a80f9956ea195f63e05d30d604a980bbc8f Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Reviewed-on: http://openocd.zylin.com/3638 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Peter A. Bigot [Wed, 10 Aug 2016 21:54:00 +0000 (16:54 -0500)]
gdb_server: support disabling server
Although the documentation suggested this worked, and it is implemented
for tcl_port and telnet_port, the directive was not recognized for
gdb_port.
Change-Id: I38d95ee879ec3f6d551603b7313749a21e0e498e Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Reviewed-on: http://openocd.zylin.com/3637 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Andreas Bolsch [Mon, 20 Jun 2016 19:02:29 +0000 (21:02 +0200)]
Flash handling for STM32F76x/77x and F446 added
- added ids for various parts
- rewrite of sector allocation to deal with dual-bank F76x/77x
- single- / dual-bank mode for F76x/77x
- sector protection adapted for F76x/77x in dual-bank mode
- handling of additional option bits (28-31) in FLASH_OPTCR
in options_read and options_write for F42x/43x/469/479/7xx,
options bits 0-1 masked out
- check for sensible value of user_options in options_write
- some #defines clarified, non-needed ones removed
- docs updated (options read, options write)
Change-Id: Ie4db80e60baa7d2663e024ab1f278640b1ce901b Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/3526 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Steven Stallion [Wed, 20 Jul 2016 19:05:12 +0000 (14:05 -0500)]
rtos: remove display_str member
This patch removes the display_str member in the thread_detail struct.
This member was not being used and provides no additional benefit over
the thread_name_str and extra_info_str members. This change is made in
preparation of support for the qXfer:threads:read packet, which will
modernize how thread information is shared with GDB.
Change-Id: I1f8bc6325e6aa790e02ea6caee9d6f44c5fedf36 Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/3558 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
jlink: fix jlink regression introduced by ae8cdc commit
1) wrong last bit was shifted out in the end of IRSHIFT/DRSHIFT in
jlink_execute_scan()
2) TDI buffer was not cleared in jlink_tap_init(), results in wrong
data shifted out to the TDI and "Bad value '00000000' captured
during DR or IR scan" error message.
3) sizeof(tdi_buffer) was used in memset() to clean tms buffer. It
is the same as sizeof(tms_buffer), but shoud be fixed to make source
code consistent
Change-Id: I13f26d1c3e88eefc3856fe2b8542fb0ccea6acb1 Signed-off-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Reviewed-on: http://openocd.zylin.com/3394 Tested-by: jenkins Reviewed-by: Harry Zhurov <harry.zhurov@gmail.com> Reviewed-by: Anton Gusev Reviewed-by: Михаил Цивинский <mtsivinsky@gmail.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tomas Vanek [Thu, 21 Jul 2016 07:27:00 +0000 (09:27 +0200)]
target: check late abort from target in async_algorithm
target_run_flash_async_algorithm() ignored abort from target
(rp set to 0) when raised after all data have been written in fifo.
I could result e.g. in not reported error during flash write.
The change adds rp test after target algorithm has finished.
Change-Id: Iadd93371e4a4602737be10079479285d81ae41b2 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3560 Tested-by: jenkins Reviewed-by: Steven Stallion <stallion@squareup.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Andy Pomfret [Tue, 8 Mar 2016 13:52:36 +0000 (13:52 +0000)]
rtos: removed chSysInit from detection of ChibiOS (#121)
Using the presence of the 'chSysInit' symbol for detection of
ChibiOS is dangerous because this symbol may not be available
if link-time optimisation is used.
This patch removes this reliance, so the symbols 'ch' and 'ch_debug'
are the only things required for ChibiOS detection.
If 'ch' is present but 'ch_debug' is not, an info message suggests
that Chibios might be present without its registry being enabled.
This message has been reworded a little to make it slightly more
equivocal because the chances of a false positive message are
increased.
Addresses bug #121, "ChibiOS rtos detection fails with LTO enabled".
Change-Id: I5ef224735c06446751adee010ce75be4f30f0403 Signed-off-by: Andy Pomfret <cooperised@gmail.com>
Reviewed-on: http://openocd.zylin.com/3381 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Andreas Färber [Sun, 22 May 2016 17:12:20 +0000 (19:12 +0200)]
kinetis_ke: Switch to standard build variables
Instead of using ARM_ prefixed variables and an "arm" target,
use CROSS_COMPILE, AS, OBJCOPY. This requires to switch from ?= to =
to avoid the host assembler getting invoked.
This allows to handle kinetis_ke subdirectory like fm4 and xmc1xxx.
Change-Id: I7ea0bf119f6c4716f4d6002794004730af49eef4 Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3505 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tomas Vanek [Sat, 6 Aug 2016 06:28:04 +0000 (08:28 +0200)]
psoc4.cfg: fixed typo in message, add a hint
PSoC4 design prevents reset halt/init with standard/low level
SWD adapter if hw reset line configured. Give user hint
to use 'reset_config none' in such case.
Change-Id: I0ca2c46b8575829b0013fd151f2eb63963d66653 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3617 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Felix Held [Wed, 10 Aug 2016 01:09:02 +0000 (03:09 +0200)]
xilinx-xc7: correct Artix7 15T IDCODE
The IDCODE of Artix7 15T in the UG470 is wrong; Artix7 35T and 15T don't have the same IDCODE.
I've tested this on real hardware.
Change-Id: Iac267dc449c23454dd119126749dbeb8267c18ac Signed-off-by: Felix Held <felix-openocd@felixheld.de>
Reviewed-on: http://openocd.zylin.com/3633 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
adi_v5_jtag: clear sticky overrun condition in WAIT timeout
If WAIT recovery fails (times out), an ABORT command is issued to the
DAP but under some conditions the SSTICKYORUN bit in CTRL/STAT is not
cleared as well, which renders the DP unusable. This happens when
trying to access e.g. the ROM table of powered-down cores, on many
targets.
target: add "phys" argument to mem2array, array2mem
Allow using physical addresses with mem2array and array2mem. In order
to minimize the impact on existing scripts, "phys" is added as an
optional 5th parameter to both commands.
This patch also adds "phys" variants to the memwrite/memread commands
in memory.tcl.
Sometimes it is necessary to resume into a different state (ARM/Thumb)
than at debug state entry. According to the documentation this should
be possible with "arm core_state arm|thumb" before the resume command,
however the original code also restores the original CPSR, which
overrides whatever state the core was set to. This seems to work on some
cores (e.g. Cortex-A5) but not on others (e.g. Cortex-A9). Using the "BX"
instruction to set resume PC and core state works on Cortex-A9 and
ARM11, but is not sufficient on Cortex-A5, where an explicit write to
the PC (MOV pc, r0) is required additionally.
Change-Id: Ic03153b4b250fbb8cf6c75f8e329fb34829aa35f Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3386 Tested-by: jenkins Reviewed-by: Alexander Stein <alexanders83@web.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Andrey Skvortsov [Wed, 25 May 2016 10:11:18 +0000 (13:11 +0300)]
flash: nor: mdr: fix verification problem with 1986VE1T or 1986VE3T
1986VE1T and 1986VE3T have issue with flash acceleration engine described
in their errata (issue 0007).
After programming flash acceleration engine's buffer contains old data,
and therefore first read data are wrong. Because of this verification after
programming fails always. Recommended workaround for the issue is to flush
flash accelerator's buffer. To do so it's necessary to read at least 64
bytes of flash through accelerator.
Reading bytes through JTAG using default_flash_read doesn't help.
It seems that reading should be done by uC itself.
Steven Stallion [Mon, 11 Jul 2016 19:18:54 +0000 (14:18 -0500)]
server: support binding to arbitrary interfaces
Some installations of OpenOCD are used in restricted environments that
do not permit binding to public interfaces.
This patch does not affect the default behavior to listen on all
interfaces, however it does give the option to restrict services by way
of the bindto command.
Change-Id: Id51bd64b376a8c62dd47b08b4d834872925e6af2 Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/3534 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Today the reset option for connect_assert_srst is not done for SWD.
This patch adds this to SWD and make it possible to connect to targets which might disable JTAG interface when running.
Change-Id: Ib89f7cf59b628e8f0b5fca9dd9e362e383c4b99f Signed-off-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-on: http://openocd.zylin.com/3018 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Esben Haabendal [Fri, 27 Nov 2015 08:13:36 +0000 (09:13 +0100)]
cfi: Add support for strangely endianness broken SoC implementations
This adds the 'data_swap' parameter to the CFI driver, which enables
swapping of data bytes when writing/programming words to the flash.
Note, that this specifically means that bytes are not swapped when
writing command words to the flash chip. Unless you are using the SAP
in an LS102x chip to program an attached 16-bit NOR flash, you hopefully
do not need this!
Esben Haabendal [Tue, 10 Nov 2015 10:44:29 +0000 (11:44 +0100)]
Support for Freescale LS102x SAP
The SAP in LS102x SoC's from Freescale is able to read and write to all
physical memory locations, independently of CPU cores and DAP.
This implementation is 100% based on reverse-engineering of JTAG
communication with an LS1021A SAP using a JTAG debugger with SAP support.
And as such, this code is for now "works-for-me", pending verification
by other OpenOCD users, or even better, actual information from Freescale
on the SAP interface.
Tim Newsome [Thu, 19 May 2016 02:39:52 +0000 (19:39 -0700)]
Fix comment that limits num_bits to 32.
Andreas Fritiofson says "If any adapter driver does not work with
arbitrary lengths of individual fields, it's a bug."
https://sourceforge.net/p/openocd/mailman/message/35091945/
Note also that lengths of at least 96 bits are already in use, eg. in
mips_ejtag_add_scan_96().
Change-Id: I62a150adc75c0ef78827683ca8d0a8e90310a982 Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/3491 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Paul Fertser [Sat, 7 May 2016 16:35:22 +0000 (19:35 +0300)]
configure.ac: support MSYS with newer config.guess
Upstream commit
http://git.savannah.gnu.org/gitweb/?p=config.git;a=commitdiff;h=f4ebd3ed097771a729b68e688236aea665e7c1f3
makes both i386 and amd64 MSYS (and MSYS2) systems be detected as
*-pc-msys .
With this patch OpenOCD builds without any additional tweaks on MSYS2
with the latest config.guess.
Change-Id: I1ae4154f76125a84078926b425fa989904639ce0 Reported-by: "Stevens, Kelly E. M." <Kelly.Stevens@gtri.gatech.edu> Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3468 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Andreas Färber [Sun, 12 Jul 2015 13:45:20 +0000 (15:45 +0200)]
lpcspifi: Fix SWD support for LPC43xx
When using SWD rather than JTAG transport, the lpcspifi driver complains:
Error: Device ID 0x0 is not known as SPIFI capable
Error: auto_probe failed
This is because target's JTAG tap->idcode is zero for SWD.
Drop this check completely and hardcode the addresses for now. Neither
the JTAG TAPID nor the SWD IDCODE are unique enough to detect the exact
chip model and thereby its memory map.
Marc Schink [Sun, 17 Apr 2016 12:53:25 +0000 (14:53 +0200)]
board/efm32: Disable SRST
The current configuration leads to the following error when trying to
program the target:
SWD IDCODE 0x2ba01477
timed out while waiting for target halted
TARGET: efm32.cpu - Not halted
in procedure 'program'
in procedure 'reset' called at file "embedded:startup.tcl", line 478
in procedure 'ocd_bouncer'
Use the default reset handling of the target (SYSRESETREQ) to reset the
system rather than SRST to fix the problem.
Tested on EFM32GG, EFM32TG and EZR32WG STK.
Change-Id: I788c41baf08b20814cbe0934b563424c4bc144b8 Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3420 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Consistently write it the official way, so that it stops propagating.
Originally spotted in the documentation, it mainly affects code comments
but also Atmel SAM3/SAM4/SAMV, NiietCM4 and SiM3x flash driver output.
Samuel Martin [Wed, 18 May 2016 23:15:52 +0000 (01:15 +0200)]
tcl: add STM32F429I-DISC1 board config
Both the STM32F429I-DISC{O,1} boards are equipped with the same MCU, but
differ by the debugging chip:
- the STM32F429I-DISCO uses the ST-LINK/V2 chip;
- the STM32F429I-DISC1 uses the ST-LINK/V2-B chip (which matches the USB
VID/PID set in stlink-v2-1.cfg).
Change-Id: I07d637f72d26cf5d714472638da974eb6ca02325 Signed-off-by: Samuel Martin <s.martin49@gmail.com>
Reviewed-on: http://openocd.zylin.com/3492 Reviewed-by: Andreas Färber <afaerber@suse.de> Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Memory accesses are not made through the APB-AP, they are made through
the CPU (which happens to be controlled over the APB-AP). Rename all
irrelevant uses of the APB-AP term. And fix the long standing typo in
the function names...
Change-Id: Ide466fb2728930968bdba698f0dd9012cc9dbdf9 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3216 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Andreas Färber [Sat, 14 May 2016 13:02:44 +0000 (15:02 +0200)]
arm_adi_v5: Add part numbers for Infineon XMC4000 family
This was found on multiple XMC4500:
Valid ROM table present
Component base address 0xe00ff000
Peripheral ID 0x00001c11db
Designer is 0x0c1, Infineon (Siemens)
Part is 0x1db, Unrecognized
Component class is 0x1, ROM table
MEMTYPE system memory present on bus
On multiple XMC4700 and an XMC4800 this was found instead:
Valid ROM table present
Component base address 0xe00ff000
Peripheral ID 0x00001c11df
Designer is 0x0c1, Infineon (Siemens)
Part is 0x1df, Unrecognized
Component class is 0x1, ROM table
MEMTYPE system memory present on bus
Name them "XMC4500 ROM" and "XMC4700/4800 ROM" respectively.
Andreas Färber [Sat, 14 May 2016 12:55:38 +0000 (14:55 +0200)]
arm_adi_v5: Add part number for Infineon XMC1000 family
Not documented in the Reference Manuals but found on multiple XMC1100/1202:
Valid ROM table present
Component base address 0xf0000000
Peripheral ID 0x00001c11ed
Designer is 0x0c1, Infineon (Siemens)
Part is 0x1ed, Unrecognized
Component class is 0x1, ROM table
MEMTYPE system memory present on bus
Name it "XMC1000 ROM", since it didn't differ between XMC1100 and XMC1200.
Alexander Kurz [Sun, 14 Feb 2016 09:04:51 +0000 (10:04 +0100)]
jtag ulink: dont compile function when not required
ulink_calculate_frequency() is used exclusively when
_DEBUG_JTAG_IO_ is set, no need to compile this
function if it is not used.
Declaring it static in the same commit.
Change-Id: I243ffdf69a1dc3bee6d16e4bb8d78396b6ea5144 Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3241 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Alexander Kurz [Tue, 1 Mar 2016 08:32:49 +0000 (09:32 +0100)]
udev: add rule for original Keil ULink (version 1)
The original ULINK adapter has been introduced by Keil in 2002 and got
replaced in 2008 by the incompatible ULINK2. It is not listed on their
website any more. For information about it, browse archive.org
for http://www.keil.com/ulink1/ or http://www.keil.com/ulink/
Change-Id: Ie52d381580acab53ddb40499594dbdc2d27ef1b6 Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3371 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Andreas Färber [Sat, 14 May 2016 18:57:55 +0000 (20:57 +0200)]
doc: Fix mismerges of fm4, kinetis and kinetis_ke flash drivers
Commit dfc6658cf98d494e066426945879b9f60bbf9678 ("Kinetis: flash
driver described in openocd.texi") inserted a kinetis section between
fm3 and lpc2000. Then commit 43ff5acd45017fd9828cc56f54b929e600956c3b
("flash: New Spansion FM4 flash driver") was merged, inserting the fm4
section between kinetis and lpc2000, instead of after fm3. Finally
kinetis_ke was added between kinetis and fm4 in commit 5396ec5dcc64354c8101f8d3f16d498ca3b10326 ("flash: Added support for
Freescale Kinetis KE family.").
Restore the alphabetical order by moving the fm4 section to before
kinetis.
Change-Id: I77e47c3cd5b2cd8570b62ff2f7be8526aaf57ad0 Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3484 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Marc Schink <openocd-dev@marcschink.de>
Andreas Färber [Sat, 14 May 2016 11:59:40 +0000 (13:59 +0200)]
arm_adi_v5: Reorder Atmel part number entry
Instead of placing Atmel last, after ANY_ID, place it after ARM (it's
arm_adi_v5 despite 0x4BB) and sort it with the other vendors, i.e.
before ADI and Qualcomm. Adapt column alignment.
Drop the redundant "Atmel" comment to clarify that Analog is not Atmel.
Jiri Kastner [Thu, 5 May 2016 09:35:10 +0000 (11:35 +0200)]
arm_adi_v5: added partnumber for APQ8016
On APQ8016 was found a CoreSight component designed by
Qualcomm, according to db410c HRM [1] it has a partnumber
following this schema:
[11:8] is 0x4 meaning Qualcomm designed Coresight component in QDSS. Reads as 0x4.
[7:6] is Subsystem/core family ID (e.g. denote QDSS family or generation).
[5:4] is Subsystem/core configuration options (e.g. denote cache options, etc.).
[3:2] is Subsystem/core fuse options.
[1:0] is Subsystem/core future use field
Reads as 0x440.
arm7_9_common.c: In function ‘arm7_9_unset_breakpoint’:
arm7_9_common.c:353:4: error: this ‘if’ clause does not guard... [-Werror=misleading-indentation]
if (current_instr == arm7_9->thumb_bkpt)
^~
arm7_9_common.c:356:5: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the ‘if’
if (retval != ERROR_OK)
^~
The logic won't change once the braces have been added, as the new 'retval'
check only makes sense within the if().
Alexander Kurz [Sat, 13 Feb 2016 12:48:02 +0000 (13:48 +0100)]
Helper ioutil: cleanup: removing dead code
The ioutil helper functions copyfile and copydir were last and only used
in ecosboard.c which has been removed with commit 39650e22.
Removing the dead code.
Change-Id: I36c7c4c5009d755b4513a14a9f9e214d1ee500e8 Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3240 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Uwe Bonnes [Wed, 2 Mar 2016 11:54:07 +0000 (12:54 +0100)]
stlink: Decode more errors.
For STLINK_SWD_AP_FAULT git://git.ac6.fr/openocd commit 657e3e885b9ee10
returns ERROR_OK with the comment:
Change in error status when reading outside RAM.
This fix allows CDT plugin to visualize memory.
Lieven Hollevoet [Fri, 25 Mar 2016 14:05:35 +0000 (15:05 +0100)]
Support for debug interface lock of EFM32 controllers
The capability to lock the debug interface on EFM32
controllers was lacking in OpenOCD.
After receiving some pointers by zapb_ and PaulFertser
on IRC (thanks guys!) I have added this capability.
This works by writing the required bits in the debug
lock word to '0'.
Note: there is currently no way to re-enable the debug
interface from OpenOCD as doing this requires specific
pin wiggling that is currently not implemented yet.
However: having the capability to lock the debug interface
is useful when building a volume programming jig.
You can flash the program code, verify and then
lock the debug interface so that the device cannot
be read when it is deployed in the field.
Christopher Head [Thu, 21 Apr 2016 00:31:12 +0000 (17:31 -0700)]
Add Altera USB Blaster udev rule.
This udev rule makes the Altera USB Blaster clone I have on my desk
accessible to the plugdev group.
Change-Id: Ic5e8052c66a270b6a6f89e29de49d9785f18fc1e Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/3423 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
ftdi: make ftdi_location command depend on libusb1 version
The function libusb_get_port_numbers(), required for the command
ftdi_location, is only available in recent version of libusb1.
Compilation will break if the function is not available. This patch
enables the command only if libusb1 contains the necessary function.
Salvador Arroyo [Sun, 24 Aug 2014 18:56:05 +0000 (20:56 +0200)]
MIPS32 Fix typos
I suppose 0xff300008 is the correct value for EJTAG_V20_DBS.
20 miliseconds is too much for scan delay, 2ms is enough in mips_m4k scan_delay handler.
mips32 scan_delay has the correct value.
Change-Id: Ie9dc650065a58e845687058a4c930f85909beec9 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/2271 Tested-by: jenkins Reviewed-by: Kent Brinkley <jkbrinkley.imgtec@gmail.com> Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Salvador Arroyo [Sun, 24 Aug 2014 17:34:08 +0000 (19:34 +0200)]
Fix for BMIPS
BMIPS always needs 2 additional instructions to reach the core.
Seems there is a 2 instructions fifo between the tap and the core, or it behaves in this way.
No idea of the purpose of this fifo, I can only guess.
Of course function mips32_pracc_clean_text_jump() must add this additional instructions (NOPs).
Only tested on bcm3348..
Change-Id: I3183d3ce865d469d7262ba4b15446e5743a5f1df Signed-off-by: Salvador Arroyo <salvador@telecable.es>
Reviewed-on: http://openocd.zylin.com/2270 Tested-by: jenkins Reviewed-by: Kent Brinkley <jkbrinkley.imgtec@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tomas Vanek [Sun, 15 Mar 2015 18:09:15 +0000 (19:09 +0100)]
target: improve robustness of reset command
Before this change jim_target_reset() checked examined state of a target
and failed without calling .assert_reset in particular target layer
(and without comprehensible warning to user).
Cortex-M target (which refuses access to DP under active SRST):
If connection is lost then reset process fails before asserting SRST
and connection with MCU is not restored.
This resulted in:
1) A lot of Cortex-M MCUs required use of reset button or cycling power
after firmware blocked SWD access somehow (sleep, misconfigured clock etc).
If firmware blocks SWD access early during initialization, a MCU could
become completely inaccessible by SWD.
2) If OpenOCD is (re)started and a MCU is in a broken state unresponsive
to SWD, reset command does not work even if it could help to restore communication.
Hopefully this scenario is not possible under full JTAG.
jim_target_reset() in target.c now does not check examined state
and delegates this task to a particular target. All targets have been checked
and xx_assert_reset() (or xx_deassert_reset()) procedures were changed
to check examined state if needed. Targets except arm11, cortex_a and cortex_m
just fail if target is not examined although it may be possible to use
at least hw reset. Left as TODO for developers familiar with these targets.
cortex_m_assert_reset(): memory access errors are stored
instead of immediate returning them to a higher level.
Errors from less important reads/writes are ignored.
Requested reset always leads to a configured action.
arm11_assert_reset() just asserts hw reset in case of not examined target.
cortex_a_assert_reset() works as usual in case of not examined target.
Change-Id: I84fa869f4f58e2fa83b6ea75de84440d9dc3d929 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2606 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
projects / openocd / log