]> git.sur5r.net Git - openocd/log
openocd
14 years agoFT2232: lookup and save layout just once
David Brownell [Sun, 14 Mar 2010 20:10:26 +0000 (13:10 -0700)]
FT2232: lookup and save layout just once

Streamline use of the layout:  have the "ft2232_layout" command
look it up and save the result, instead of having a few different
chunks of code looking it up later, and saving just its name (which
is already part of the layout).  This

   - is cleaner
   - reports errors sooner
   - facilitates earlier adapter-specific setup
   - removes unused "default to "usbjtag" logic

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agofix xscale icache and dcache commands
Mike Dunn [Fri, 12 Mar 2010 00:53:05 +0000 (16:53 -0800)]
fix xscale icache and dcache commands

Simple patch that fixes the broken xscale icache and dcache commands.
This broke when the helper functions and macros were changed.

[ dbrownell@users.sourceforge.net: don't use strcasecmp ]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoversaloon cleanup patch
David Brownell [Thu, 11 Mar 2010 22:21:36 +0000 (14:21 -0800)]
versaloon cleanup patch

Remove undesirable
 - backslashes at end-of-line;
 - initializations of BSS data to zero/NULL;
 - overlong lines (80+ characters)
 - whitespace issues
 - brackets around single-line statements

And other minor issues reported by the Linux "checkpatch" utility

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoNew JTAG driver for Versaloon
simon qian [Thu, 11 Mar 2010 22:11:30 +0000 (14:11 -0800)]
New JTAG driver for Versaloon

This patch greatly simplifies the Versaloon driver:

 - reducing the code size from more than 50K to less than 28K
 - adding support for IR/DR scan with unlimited size
 - using tap_get_tms_path and tap_get_tms_path_len.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoAdd support for Bus Pirate as a JTAG adapter.
Michal Demin [Mon, 8 Mar 2010 12:45:14 +0000 (13:45 +0100)]
Add support for Bus Pirate as a JTAG adapter.

This includes a driver and matching config file.  This support needs to be
enabled through the initial "configure" (use "--enable-buspirate").

Signed-off-by: Michal Demin <michaldemin@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agosplit "interface" commands from "jtag" ones
David Brownell [Thu, 11 Mar 2010 17:47:47 +0000 (09:47 -0800)]
split "interface" commands from "jtag" ones

We'll need to be able to work with debug adapter interfaces (drivers)
even when they're not used for JTAG ... for example, while there are
multi-transport drivers which support JTAG *and* several other
transports (or just one more, like SWD) there are also adapters
with more limited goals (and no JTAG support at all).

Start decoupling the two concepts ("debug adapter driver", "jtag")
by having two command groups, which initialize separately.

This will help us support OpenOCD sessions using only non-JTAG
transports, in which JTAG commands should not be registered.
Update docs to mention that the JTAG, SVF, and XSVF commands
won't work without a JTAG transport.

Note that at least commands working with SRST are still inappropriately
coupled  to JTAG ... inappropriate because (a) SRST is not part of the
JTAG standard, for all that many platforms (like ARM) expect it; and also
(b) because they're used with non-JTAG debug and programming interfaces,
too.  They should perhaps become generic "interface" operations at some
point.  (Similarly with the clock rate to be used by a given adapter.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoMIPS: make fixed code arrays static const
Spencer Oliver [Wed, 10 Mar 2010 22:23:01 +0000 (22:23 +0000)]
MIPS: make fixed code arrays static const

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoJLINK: user info message cleanup
Spencer Oliver [Wed, 10 Mar 2010 21:54:21 +0000 (21:54 +0000)]
JLINK: user info message cleanup

 - remove trailing LF's from user info messages.
 - split long lines.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoPIC32: add flash algorithm support
Spencer Oliver [Mon, 8 Mar 2010 22:54:18 +0000 (22:54 +0000)]
PIC32: add flash algorithm support

Add flash algorithm support for the PIC32MX.
Still a few things todo but this dramatically decreases
the programing time, eg. approx programming for 2.5k test file.
 - without fastload: 60secs
 - with fastload: 45secs
 - with fastload and algorithm: 2secs.

Add new devices to supported list.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoSTM32: flash loader cleanup
Spencer Oliver [Mon, 8 Mar 2010 20:32:11 +0000 (20:32 +0000)]
STM32: flash loader cleanup

- make algorithm array static const.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoSTR7: flash loader cleanup
Spencer Oliver [Mon, 8 Mar 2010 20:31:50 +0000 (20:31 +0000)]
STR7: flash loader cleanup

- make algorithm array static const.
 - increase algorithm buffer size to 32k.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoSTR9: flash loader cleanup
Spencer Oliver [Mon, 8 Mar 2010 20:31:25 +0000 (20:31 +0000)]
STR9: flash loader cleanup

- make algorithm array static const.
 - increase algorithm buffer size to 32k.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoADUC702x: flash loader cleanup
Spencer Oliver [Mon, 8 Mar 2010 20:30:53 +0000 (20:30 +0000)]
ADUC702x: flash loader cleanup

- make algorithm array static const.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoCFI CORE: bug-fix protect single sector
Antonio Borneo [Mon, 8 Mar 2010 16:43:59 +0000 (00:43 +0800)]
CFI CORE: bug-fix protect single sector

Cannot protect or unprotect single sector in cfi flash.
When first==last the procedure fails.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agomove a constant table to .rodata section
David Brownell [Tue, 9 Mar 2010 03:10:05 +0000 (19:10 -0800)]
move a constant table to .rodata section

The table of command registration functions shouldn't be
in writable memory, where stray pointers can clobber it.
Also, it shouldn't be initialized at runtime; that just
consumes needless code space.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agocfi: simplify and clearify code
Antonio Borneo [Mon, 8 Mar 2010 17:31:27 +0000 (18:31 +0100)]
cfi: simplify and clearify code

At the end I have added comments /* FIXME: to be removed */
There are 3 lines in which my simplification is not complete due to
data dependency with LOG_DEBUG() messages visible in the patch.
Such log_debug has been introduced on Jan 22, 2007 with commit
4fc97d3f2726efa147cfdb0c456eace51550e1e3 during development activity
in this file/procedure.

From my point of view, these logs can be removed, since not part of a
consistent flow of information.
Alternatively, could be borrowed in the new cfi_send_command(), but
this will increase verbosity.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agozy1000: embedded ice dcc tweak
Øyvind Harboe [Mon, 8 Mar 2010 07:32:45 +0000 (08:32 +0100)]
zy1000: embedded ice dcc tweak

How many bits to shift out before/after enabled tap not
in bypass is calculated outside the loop. This is more of
a demonstration of principle and to clarify code than
a performance optimisation as such. Follows up a bit
on the simplification work in jtag interface.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agojtag: simplify jtag_add_plain_ir/dr_scan
Øyvind Harboe [Sat, 6 Mar 2010 10:29:59 +0000 (11:29 +0100)]
jtag: simplify jtag_add_plain_ir/dr_scan

These fn's now clearly just clock out/in bits. No mystical
fields are involved.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agojtag: jtag_add_ir_scan() now takes a single field
Øyvind Harboe [Thu, 4 Mar 2010 13:38:19 +0000 (14:38 +0100)]
jtag: jtag_add_ir_scan() now takes a single field

In the code a single field was all that was ever used. Makes
jtag_add_ir_scan() simpler and leaves more complicated stuff
to jtag_add_plain_ir_scan().

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agojtag: retire tap field
Øyvind Harboe [Mon, 1 Mar 2010 19:00:59 +0000 (20:00 +0100)]
jtag: retire tap field

jtag_add_dr/ir_scan() now takes the tap as the first
argument, rather than for each of the fields passed
in.

The code never exercised the path where there was
more than one tap being scanned, who knows if it even
worked.

This simplifies the implementation and reduces clutter
in the calling code.

use jtag_add_ir/dr_plain_scan() for more fancy situations.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agoCFI: review print of Voltage values
Antonio Borneo [Fri, 5 Mar 2010 16:56:36 +0000 (00:56 +0800)]
CFI: review print of Voltage values

JEDEC standard reports Vpp integer part encoded as 4 bit HEX value.
To print it using decimal digits, %u is required.
Other voltage values are coded as BCD, so %x is appropriate.

Code already prints one nibble at a time, so no need for field width
and precision in format string.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agodoc: not all debug adapters are "dongles"
David Brownell [Sat, 6 Mar 2010 05:09:03 +0000 (21:09 -0800)]
doc: not all debug adapters are "dongles"

Talk more about "debug adapters" instead of only "dongles".  Not all
adapters are discrete widgets; some are integrated onto boards.  If
we only talk about "dongles" we rule out many valid setups, and help
confuse some users (who may be using Dongle-free environments).

Also start bringing out the point that JTAG isn't the only transport
protocol, even though OpenOCD historically presumes "all is JTAG".
(Not all debug adapters are JTAG adapters, or JTAG-only adapters.)

Plus a few minor fixes (spelling etc) in the vicinity of those changes,
and updates about FT2232H clocking issues (they can go faster than the
older chips, and can support adaptive clocking).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoREADME: update libftdi version
David Brownell [Fri, 5 Mar 2010 21:08:11 +0000 (13:08 -0800)]
README: update libftdi version

The FT2232H really wants libftdi 0.17 or newer; some notable
bugs got fixed in that version.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoADIv5 share DAP command support
David Brownell [Fri, 5 Mar 2010 18:39:25 +0000 (10:39 -0800)]
ADIv5 share DAP command support

Get rid of needless and undesirable code duplication for
all the DAP commands (resolving a FIXME) ... there's no
need for coreas to have private copies of that stuff.
Stick a pointer to the DAP in "struct arm", letting common
code get to it.

Also rename the "swjdp_info" symbol; just call it "dap".

This is an overall code shrink.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agominidriver: fix arm11 compilation problem
Øyvind Harboe [Thu, 4 Mar 2010 17:30:03 +0000 (18:30 +0100)]
minidriver: fix arm11 compilation problem

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agorename "swjdp_common" as "adiv5_dap"
David Brownell [Fri, 5 Mar 2010 05:51:58 +0000 (21:51 -0800)]
rename "swjdp_common" as "adiv5_dap"

This partially corrects an inappropriate name choice (and its
associated FIXME).

There are still too many variables named "swjdp", bug little
current code actually relies on them referencing an SWJ-DP instead
of some other flavor of DAP.  Only the two new dap_to{swd,jtag}()
calls could behave differently on an SWJ-DP instead of a SW-DP or
a JTAG-DP.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoNOR: trim range in flash_driver_protect()
David Brownell [Thu, 4 Mar 2010 05:01:16 +0000 (21:01 -0800)]
NOR: trim range in flash_driver_protect()

When the beginning or end of the specified range of sectors
already has the requested protection status, don't ask the
flash driver to change those sectors.

This will among other things turn command sequences like
this into the NOPs one would expect:

flash protect_check 0
flash info 0
... reports everything as unprotected ...
flash protect 0 0 1 off

That speeds things up (by whatever work was just avoided).

Also, with Stellaris (which can't unprotect flash at  page level)
this can eliminate some undesirable/false error reports.  (And
finishes fixing a bug currently listed in our bug database...)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoNOR: invalidate cached state on target resume
David Brownell [Thu, 4 Mar 2010 04:57:49 +0000 (20:57 -0800)]
NOR: invalidate cached state on target resume

The NOR infrastructure caches some per-sector state, but
it's not used much ... because the cache is not trustworthy.

This patch addresses one part of that problem, by ensuring
that state cached by NOR drivers gets invalidated once we
resume the target -- since targets may then modify sectors.

Now if we see sector protection or erase status marked as
anything other than "unknown", we should be able to rely
on that as being accurate.  (That is ... if we assume the
drivers initialize and update this state correctly.)

Another part of that problem is that the cached state isn't
much used (being unreliable, it would have been unsafe).
Those issues can be addressed in later patches.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoNOR: stellaris message tweaks
David Brownell [Wed, 3 Mar 2010 20:59:53 +0000 (12:59 -0800)]
NOR: stellaris message tweaks

Give a more accurate failure message when trying to unprotect; don't
complain about pages being write protected, just say that unprotect is
not supported by the hardware ... referencing the new "recover" command,
which is the way to achieve that.

Likewise, when trying to protect, talk about "pages" (matching hardware
doc) not "sectors" (an concept that's alien to these chips).

Also make the helptext for the "recover" command mention that it
also erases the device.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoSTM32: Add Value Line Flash Programming Support
Spencer Oliver [Wed, 3 Mar 2010 10:20:37 +0000 (10:20 +0000)]
STM32: Add Value Line Flash Programming Support

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoADIv5: use new DAP ops for AP read/write
David Brownell [Wed, 3 Mar 2010 06:49:36 +0000 (22:49 -0800)]
ADIv5: use new DAP ops for AP read/write

Make ADIv5 internals use the two new transport-neutral calls for reading
and writing DP registers; and do the same for external callers.  Also,
bugfix some of their call sites to handle the fault returns, instead of
ignoring them.

Remove most of the JTAG-specific calls, using their code as the bodies
of the JTAG-specific implementation for the new methods.

NOTE that there's a remaining issue:  mem_ap_read_buf_u32() makes calls
which are JTAG-specific.  A later patch will need to remove those, so
JTAG-specific operations can be removed from this file, and so that SWD
support will be able to properly drop in as just a transport layer to the
ADIv5 infrastructure.  (The way read results are posted may need some more
attention in the transport-neutrality interface.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoADIv5: use new DAP ops for DP read/write
David Brownell [Wed, 3 Mar 2010 06:46:38 +0000 (22:46 -0800)]
ADIv5: use new DAP ops for DP read/write

Make ADIv5 internals use the two new transport-neutral calls for reading
and writing DP registers.  Also,  bugfix some of their call sites to
handle the fault returns, instead of ignoring them.

Remove the old JTAG-specific calls, using their code as the bodies
of the JTAG-specific implementation for the new methods.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoADIv5: use new dap_run() operation
David Brownell [Wed, 3 Mar 2010 06:42:45 +0000 (22:42 -0800)]
ADIv5: use new dap_run() operation

Make ADIv5 use one of the new transport-neutral interfaces: call
dap_run(), not jtagdp_transaction_endcheck().

Also, make that old interface private; and bugfix some of its call
sites to handle the fault returns, instead of ignoring them.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoARM: start abstracting ADIv5 transports (JTAG/SWD)
David Brownell [Wed, 3 Mar 2010 06:41:59 +0000 (22:41 -0800)]
ARM: start abstracting ADIv5 transports (JTAG/SWD)

To support both JTAG and SWD, ADIv5 needs DAP operations which are
transport-neutral, instead being of JTAG-specific.  This patch:

 - Defines such a transport-neutral interface, abstracting access
   to DP and AP registers through a conceptual queue of operations.

 - Builds the first implementation of such a transport with the existing
   JTAG-specific code.

In contrast to the current JTAG-only interface, the interface adds
support for two previously-missing (and unused) DAP operations:

 - aborting the current AP transaction (untested);
 - reading the IDCODE register (tested) ... required for SWD init.

The choice of transports may be fixed at the chip, board, or JTAG/SWD
adapter level.  Or if all the relevant hardware supports both transport
options, the choice may be made at runtime, This patch provides basic
infrastructure to support whichever choice is made.

The current "JTAG-only" transport choice policy will necessarily continue
for now, until SWD support becomes available in OpenOCD.  Later patches
start phasing out JTAG-specific calls in favor of transport-neutral calls.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agotarget_resume() doxygen
David Brownell [Tue, 2 Mar 2010 23:45:12 +0000 (15:45 -0800)]
target_resume() doxygen

Add doxygen for target_resume() ... referencing the still-unresolved
confusion about what the "debug_execution" parameter means (not all
CPU support code acts the same).

The 'handle_breakpoints" param seems to have resolved the main issue
with its semantics, but it wasn't part of the function spec before.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoLPC1768 updates, IAR board support
David Brownell [Tue, 2 Mar 2010 23:00:14 +0000 (15:00 -0800)]
LPC1768 updates, IAR board support

Fix some issues with the generic LPC1768 config file:

 - Handle the post-reset clock config:  4 MHz internal RC, no PLL.
   This affects flash and JTAG clocking.

 - Remove JTAG adapter config; they don't all support trst_and_srst

 - Remove the rest of the bogus "reset-init" event handler.

 - Allow explicit CCLK configuration, instead of assuming 12 MHz;
   some boards will use 100 Mhz (or the post-reset 4 MHz).

 - Simplify: rely on defaults for endianness and IR-Capture value

 - Update some comments too

Build on those fixes to make a trivial config for the IAR LPC1768
kickstart board (by Olimex) start working.

Also, add doxygen to the lpc2000 flash driver, primarily to note a
configuration problem with driver: it wrongly assumes the core clock
rate never changes.  Configs that are safe for updating flash after
"reset halt" will thus often be unsafe later ... e.g. for LPC1768,
after switching to use PLL0 at 100 MHz.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoADIv5: use right ID for Cortex-M3 ETM
David Brownell [Tue, 2 Mar 2010 17:39:36 +0000 (09:39 -0800)]
ADIv5: use right ID for Cortex-M3 ETM

Correct a mistake made copying the ID of the Cortex-M3 ETM module
from the TRM, so that "dap info" on a CM3 with an ETM will now
correctly describe ROM table entries for such modules.  (They are
included on LPC17xx and some other cores.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoarm_semihosting buildfix
David Brownell [Mon, 1 Mar 2010 18:39:57 +0000 (10:39 -0800)]
arm_semihosting buildfix

The recent "add armv7m semihosting support" patch introduced two
build errors:

arm_semihosting.c: In function ‘do_semihosting’:
arm_semihosting.c:71: error: ‘spsr’ may be used uninitialized in this function
arm_semihosting.c:71: error: ‘lr’ may be used uninitialized in this function

This fixes those build errors.  The behavior is, however, untested.
(Also, note the two new REVISIT comments.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agozy1000: faster jtag_add_ir_scan()
Øyvind Harboe [Mon, 1 Mar 2010 14:39:41 +0000 (15:39 +0100)]
zy1000: faster jtag_add_ir_scan()

Faster and simpler.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agozy1000: arm11 load is now faster
Øyvind Harboe [Mon, 1 Mar 2010 14:22:10 +0000 (15:22 +0100)]
zy1000: arm11 load is now faster

290kBytes/s @ 8MHz, no need to inline jtag_tap_next_enabled().

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agozy1000: add jtag_add_tms_seq support
Øyvind Harboe [Mon, 1 Mar 2010 07:25:57 +0000 (08:25 +0100)]
zy1000: add jtag_add_tms_seq support

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agojtag: the post TAP state is now passed to the drivers
Øyvind Harboe [Mon, 1 Mar 2010 07:22:12 +0000 (08:22 +0100)]
jtag: the post TAP state is now passed to the drivers

after clocking out a tms sequence, then the TAP will be
in some state. This state is now handed to the drivers.

TAP_INVALID is a possible state after a TMS sequence if
switching to SWD.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agoarmv4_5: remove core_type check in mcr/mrc cmd
Spencer Oliver [Sun, 28 Feb 2010 23:06:49 +0000 (23:06 +0000)]
armv4_5: remove core_type check in mcr/mrc cmd

core_type check is not required as the core function will be
null for cores that do not support the mcr/mrc functions.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agocm3-ftest: change to use arm disassemble
Spencer Oliver [Sun, 28 Feb 2010 22:52:06 +0000 (22:52 +0000)]
cm3-ftest: change to use arm disassemble

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agostellaris: recover_command use usleep rather than sleep
Spencer Oliver [Sun, 28 Feb 2010 22:40:23 +0000 (22:40 +0000)]
stellaris: recover_command use usleep rather than sleep

windows api does not define a posix sleep, use usleep that
has an openocd wrapper to the win32 native function.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoFT2232: add missing enum when using ftd2xx library
Spencer Oliver [Sun, 28 Feb 2010 22:37:53 +0000 (22:37 +0000)]
FT2232: add missing enum when using ftd2xx library

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agosemihosting: add armv7m semihosting support
Spencer Oliver [Fri, 26 Feb 2010 23:30:30 +0000 (23:30 +0000)]
semihosting: add armv7m semihosting support

do_semihosting and arm_semihosting now check the core type and
use the generic arm structure.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agosemihosting: move semihosting cmd to arm cmd group
Spencer Oliver [Fri, 26 Feb 2010 23:29:38 +0000 (23:29 +0000)]
semihosting: move semihosting cmd to arm cmd group

Move semihosting cmd to the arm cmd group.

Targets that support semihosting will setup the
setup_semihosting callback function.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoCortexM3: move disassemble cmd to arm cmd group
Spencer Oliver [Fri, 26 Feb 2010 23:25:55 +0000 (23:25 +0000)]
CortexM3: move disassemble cmd to arm cmd group

Rather than using a Cortex disassemble cmd, we now use
the arm generic version.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoARMv7M: add arm cmd group
Spencer Oliver [Fri, 26 Feb 2010 23:14:51 +0000 (23:14 +0000)]
ARMv7M: add arm cmd group

- Add arm cmd group to armv7m cmd chain.
 - arm cmd's now check the core type before running a cmd.
 - todo: add support for armv7m registers for reg cmd.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoMIPS: add mips algorithm support
Spencer Oliver [Wed, 13 Jan 2010 10:12:34 +0000 (10:12 +0000)]
MIPS: add mips algorithm support

 - add mips support for target algorithms.
 - added handlers for target_checksum_memory and target_blank_check_memory.
 - clean up long lines

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoARMv7M: use software breakpoints for algorithms
Spencer Oliver [Tue, 2 Feb 2010 13:22:07 +0000 (13:22 +0000)]
ARMv7M: use software breakpoints for algorithms

 - armv7m_run_algorithm now requires all algorithms to use
   a software breakpoint at their exit address
 - updated all algorithms to support this

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoAdd board/redbee-usb.cfg
Mariano Alvira [Sun, 28 Feb 2010 18:33:46 +0000 (10:33 -0800)]
Add board/redbee-usb.cfg

The Redbee USB is a small form-factor usb stick from Redwire, LLC
(www.redwirellc.com/store), built around a Freescale MC13224V
ARM7TDMI + 802.15.4 radio (plus antenna).

It includes an FT2232H for debugging, with Channel B connected to the
mc13224v's JTAG interface (unusual) and Channel A connected to UART1.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoadd board/redbee-econotag.cfg and JTAG support
Mariano Alvira [Sun, 28 Feb 2010 06:52:34 +0000 (22:52 -0800)]
add board/redbee-econotag.cfg and JTAG support

The Redbee Econotag is an open hardware development kit from
Redwire, LLC (www.redwirellc.com/store), for the Freescale
MC13224V ARM7TDMI + 802.15.4 radio.

It includes both an MC13224V and an FT2232H (for JTAG and UART
support).  It has flexible power supply options.

Additional features are:

  - inverted-F pcb antenna
  - 36 GPIO brought out to 0.1" pin header
    (includes all peripheral pins)
  - Reset button
  - Two push buttons (on kbi1-5 and kbi0-4)
  - USB-A connector, powered from USB
  - up to 16V external input
  - pads for optional buck inductor
  - pads for optional 32.768kHz crystal
  - 2x LEDS on TX_ON and RX_ON

[ dbrownell@users.sourceforge.net: shrink lines; texi ]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoAdd target/mc13224v.cfg
Mariano Alvira [Sun, 28 Feb 2010 06:51:41 +0000 (22:51 -0800)]
Add target/mc13224v.cfg

The MC13224V is a FreeScale ARM7TDMI based IEEE802.15.4 platform for
Zigbee and similar low-power wireless applications. Using PIP
(Platform In Package) technology, it integrates: an RF balun and
matching network; a buck converter (only an external inductor is
necessary); 96KB of SRAM; and 128KB of non-volatile memory.

It has an integrated bootloader and can boot from a variety of sources:
external SPI or I2C non-volatile memory, an image loaded over UART1,
or the internal non-volatile memory. The image loaded from one of these
sources is executed directly from SRAM starting at location 0x00400000.

Open source development code at http://mc1322x.devl.org

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agonew "stellaris recover" command
David Brownell [Sat, 27 Feb 2010 08:31:35 +0000 (00:31 -0800)]
new "stellaris recover" command

Stellaris chips have a procedure for restoring the chip to
what's effectively the "as-manufactured" state, with all the
non-volatile memory erased.  That includes all flash memory,
plus things like the flash protection bits and various control
words which can for example disable debugger access.  clearly,
this can be useful during development.

Luminary/TI provides an MS-Windows utility to perform this
procedure along with its Stellaris developer kits.  Now OpenOCD
users will no longer need to use that MS-Windows utility.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoADIv5 DAP ops switching to JTAG or SWD modes
David Brownell [Sat, 27 Feb 2010 08:31:35 +0000 (00:31 -0800)]
ADIv5 DAP ops switching to JTAG or SWD modes

Define two new DAP operations which use the new jtag_add_tms_seq()
calls to put the DAP's transport into either SWD or JTAG mode, when
the hardware allows.

Tested with the Stellaris 'Recovering a "Locked" Device' procedure,
which loops five times over both of these.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoft2232: implement TMS sequence command
David Brownell [Sat, 27 Feb 2010 08:12:38 +0000 (00:12 -0800)]
ft2232: implement TMS sequence command

Implement the new TMS_SEQ command on FT2232 hardware.
Also, swap a bogus exit() call with a clean failure return.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agointerface: define TMS sequence command
David Brownell [Sat, 27 Feb 2010 08:12:38 +0000 (00:12 -0800)]
interface: define TMS sequence command

For support of SWD we need to be able to clock out special bit
sequences over TMS or SWDIO.  Create this as a generic operation,
not yet called by anything, which is split as usual into:

 - upper level abstraction ... here, jtag_add_tms_seq();
 - midlayer implementation logic hooking that to the lowlevel code;
 - lowlevel minidriver operation ... here, interface_add_tms_seq();
 - message type for request queue, here JTAG_TMS.

This is done slightly differently than other operations: there's a flag
saying whether the interface driver supports this request.  (In fact a
flag *word* so upper layers can learn about other capabilities too ...
for example, supporting SWD operations.)

That approach (flag) lets this method *eventually* be used to eliminate
pathmove() and statemove() support from most adapter drivers, by moving
all that logic into the mid-layer and increasing uniformity between the
various drivers.  (Which will in turn reduce subtle bugginess.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoft2232: add a mechanism to specify channel in layout structs
Mariano Alvira [Thu, 25 Feb 2010 08:01:55 +0000 (00:01 -0800)]
ft2232: add a mechanism to specify channel in layout structs

FT2232-family chips have two or more MPSSE modules.   FTDI documentation
calls these channels.  JTAG adapter drivers thus need to be able to choose
which channel to use.  (For example, one channel may connect to a board's
microcontroller, while another connects to a CPLD.)

Since each channel has its own USB interface, libftdi (somewhat confusingly)
identifies channels using INTERFACE_* symbols.  Most boards use INTERFACE_A
for JTAG, which is the default in OpenOCD.  But some wire up a different one.

Note that there are two facets of what makes a wiring "layout":

 - The mapping between debug signals map and channel signals ... embedded
   in C functions.

 - Label used in Tcl configuration scripts ... part of the "layout" structure.

By letting the channel be part of the layout struct, we permit sharing the C
functions between Tcl-visible layouts, when those signal mappings are reused.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoARM ADIv5 doxygen and cleanup
David Brownell [Thu, 25 Feb 2010 07:46:46 +0000 (23:46 -0800)]
ARM ADIv5 doxygen and cleanup

Add doxygen for mem_ap_read_buf_u{8,16,32}() calls,
and shrink a few overlong lines.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoAVR flash: handle AT90CAN128 chips
Hans Peter Mortensn [Thu, 25 Feb 2010 07:35:12 +0000 (23:35 -0800)]
AVR flash: handle AT90CAN128 chips

I have successfully programmed the AT90CAN128, based on the mega128  
with some small modifications.

[ dbrownell@users.sourceforge.net: patch cleanup ]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoARM ADIv5: rename more JTAG-specific routines
David Brownell [Wed, 24 Feb 2010 07:36:42 +0000 (23:36 -0800)]
ARM ADIv5: rename more JTAG-specific routines

Highlight more of the internal JTAG-specific utilities, so it's
easier to identify code needing changes to become transport-neutral.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoarm11: improve performance using minidriver hook
Øyvind Harboe [Tue, 9 Feb 2010 13:26:57 +0000 (14:26 +0100)]
arm11: improve performance using minidriver hook

zy1000 performance for GDB load went from 100kBytes/s
to 300kBytes/s @ 8 MHz by implementing the inner loop
of unack arm11 memory writes directly on top of the hw
fifo.

Profiling info:

 78.57      0.77     0.77                             arm11_run_instr_data_to_core_noack_inner
  5.10      0.82     0.05                             memcpy
  4.08      0.86     0.04                             jtag_tap_next_enabled
  3.06      0.89     0.03                             gdb_input

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agoarm11: allow minidrivers to implement inner loop of memory writes
Øyvind Harboe [Tue, 9 Feb 2010 08:55:56 +0000 (09:55 +0100)]
arm11: allow minidrivers to implement inner loop of memory writes

This allows minidrivers to e.g. hardware accelerate memory
writes.

Same trick as is used for arm7/9 dcc writes.

Added error propagation for memory transfer failures in
code rearrangement.

Also the JTAG end state is not updated until after
the memory write run is complete.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agozy1000: jtag_add_dr_scan() performance improvement
Øyvind Harboe [Mon, 8 Feb 2010 14:40:53 +0000 (15:40 +0100)]
zy1000: jtag_add_dr_scan() performance improvement

Reduce overhead in jtag_add_dr_scan() a bit.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agoft2232 table init cleanup
David Brownell [Mon, 22 Feb 2010 01:19:08 +0000 (17:19 -0800)]
ft2232 table init cleanup

Use labeled initializers in the table of layouts instead of
positional ones.  This ls cleaner and less error prone, plus
it simplifies patches which add members to these structure.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoDeveloper's Guide: refresh release procedures
David Brownell [Mon, 22 Feb 2010 00:55:17 +0000 (16:55 -0800)]
Developer's Guide: refresh release procedures

Be a closer match to what I've actually done for the past few cycles.

In particular, hold off pushing repository updates until after the
packages are published, as part of opening the merge window, and
mention the utility commands which actually create the archives.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoADIv5: relocate memacess_tck cycles
David Brownell [Sun, 21 Feb 2010 22:58:16 +0000 (14:58 -0800)]
ADIv5: relocate memacess_tck cycles

When using an AP to access a memory (or a memory-mapped register),
some extra TCK (assuming JTAG) cycles should be added to ensure
the AP has enugh time to complete that access before trying to
collect the response.

The previous code was adding these cycles *before* trying to
access (read or write) data to that address, not *after*.  Fix
by putting the delays in the right location.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoADIv5: remove ATOMIC/COMPOSITE interface mode
David Brownell [Sun, 21 Feb 2010 22:56:56 +0000 (14:56 -0800)]
ADIv5: remove ATOMIC/COMPOSITE interface mode

This removes context-sensitivity from the programming interface and makes
it possible to know what a block of code does without needing to know the
previous history (specifically, the DAP's "trans_mode" setting).

The mode was only set to ATOMIC briefly after DAP initialization, making
this patch be primarily cleanup; almost everything depends on COMPOSITE.
The transactions which shouldn't have been queued were already properly
flushing the queue.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoARM: ADIv5, deadcode cleanup
David Brownell [Sun, 21 Feb 2010 22:54:54 +0000 (14:54 -0800)]
ARM: ADIv5, deadcode cleanup

I have no idea what the scan_inout_check() was *expecting* to achieve by
issuing a read of the DP_RDBUFF register.  But in any case, that code was
clearly never being called ("invalue" always NULL) ... so remove it, and
the associated comment.

Also rename it as ap_write_check(), facilitating a cleanup of its single
call site by removing constant parameters.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoARM: ADIv5 code shrinkage, cleanup
David Brownell [Sun, 21 Feb 2010 22:53:15 +0000 (14:53 -0800)]
ARM: ADIv5 code shrinkage, cleanup

adi_jtag_dp_scan_u32() now wraps adi_jtag_dp_scan(), removing
code duplication.  Include doxygen for the former.  Comment
some particularly relevant points.  Minor fault handling fixes
for both routines:  don't register a callback that can't run,
or return ERROR_OK after an error.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoADIv5 clean up AP fault handling
David Brownell [Sun, 21 Feb 2010 22:51:19 +0000 (14:51 -0800)]
ADIv5 clean up AP fault handling

Pass up fault codes from various routines, so their callers
can clean up after failures, and remove the FIXME comments
highlighting those previously goofy code paths.

 dap_ap_{read,write}_reg_u32()
 dap_ap_write_reg()
 mem_ap_{read,write}_u32()
 mem_ap_{read,write}_atomic_u32()
 dap_setup_accessport()

Make dap_ap_write_reg_u32() just wrap dap_ap_write_reg(),
instead of cloning its core code (and broken fault handling).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoADIv5 clean up AP selection and register caching
David Brownell [Sun, 21 Feb 2010 22:48:04 +0000 (14:48 -0800)]
ADIv5 clean up AP selection and register caching

Handling of AP (and AP register bank) selection, and cached AP
registers, is pretty loose ... start tightening it:

 - It's "AP bank" select support ... there are no DP banks.  Rename.
   + dap_dp_bankselect() becomes dap_ap_bankselect()
   + "dp_select_value" struct field becomes "ap_bank_value"

 - Remove duplicate AP cache init paths ... only use dap_ap_select(),
 and don't make Cortex (A8 or M3) cores roll their own code.

 - For dap_ap_bankselect(), pass up any fault code from writing
 the SELECT register.  (Nothing yet checks those codes.)

 - Add various bits of Doxygen

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoARM: keep a handle to the PC
David Brownell [Sun, 21 Feb 2010 22:34:33 +0000 (14:34 -0800)]
ARM: keep a handle to the PC

Keep a handle to the PC in "struct arm", and use it.
This register is used a fair amount, so this is a net
minor code shrink (other than some line length fixes),
but mostly it's to make things more readable.

For XScale, fix a dodgy sequence while stepping.  It
was initializing a variable to a non-NULL value, then
updating it to handle the step-over-active-breakpoint
case, and then later testing for non-NULL to see if
it should reverse that step-over-active logic.  It
should have done like ARM7/ARM9 does: init to NULL.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoARM DPM: support adding/removing HW breakpoints
David Brownell [Sun, 21 Feb 2010 22:32:34 +0000 (14:32 -0800)]
ARM DPM: support adding/removing HW breakpoints

Generalize the core of watchpoint setup so that it can handle
breakpoints too.  Create breakpoint add/remove routines which
will use that, and hook them up to target types which don't
provide their own breakpoint support (nothing, yet).

This suffices for hardware-only breakpoint support.  The ARM11
code will be able to switch over to this without much trouble,
since it doesn't yet handle software breakpoints.  Switching
Cortex-A8 will be a bit more involved.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoARM11: per-core options should not be global
David Brownell [Sun, 21 Feb 2010 22:30:27 +0000 (14:30 -0800)]
ARM11: per-core options should not be global

Address some FIXME comments by getting rid of globals, moving
per-core parameters in the existing per-core data structure.

This will matter most whenever there are multiple ARM11 cores,
e.g. ARM11 MPcore chips, but in general is just cleanup.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoARMv7-M: start using "struct arm"
David Brownell [Sun, 21 Feb 2010 22:28:53 +0000 (14:28 -0800)]
ARMv7-M: start using "struct arm"

This sets up a few of the core "struct arm" data structures so they
can be used with ARMv7-M cores.  Specifically, it:

 - defines new ARM core_modes to match the microcontroller modes
   (e.g. HANDLER not IRQ, and two types of thread mode);

 - Establishes a new microcontroller "core_type", which can be
   used to make sure v7-M (and v6-M) cores are handled right;

 - adds "struct arm" to "struct armv7m" and arranges for the
   target_to_armv7m() converter to use it;

 - sets up the arm.core_cache and arm.cpsr values

 - makes the Cortex-M3 code maintain arm.map and arm.core_mode.

This is currently set up as a parallel data structure, primarily to
minimize special cases for the semihosting support with microcontroller
profile cores.

Later patches can rip out the duplicative ARMv7-M support and start
reusing core ARM code.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoOpen the merge window for the 0.5.0 release cycle.
David Brownell [Sun, 21 Feb 2010 21:27:37 +0000 (13:27 -0800)]
Open the merge window for the 0.5.0 release cycle.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoLabel builds as OpenOCD v0.4.0 v0.4.0
David Brownell [Sun, 21 Feb 2010 20:20:13 +0000 (12:20 -0800)]
Label builds as OpenOCD v0.4.0

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoUser's Guide mentions OS-specific installation
David Brownell [Sun, 21 Feb 2010 17:29:24 +0000 (09:29 -0800)]
User's Guide mentions OS-specific installation

Specifically the Linux issue of needing "udev" rules, and MS-Windows
needing driver configuration.

Also, update the existing udev note to use the correct name of that
rules file in the source tree.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoarm920t line length cleanup
David Brownell [Sun, 21 Feb 2010 04:47:38 +0000 (20:47 -0800)]
arm920t line length cleanup

The recent patch to fixbreakpoints and dcache handling added
a bunch of overlong lines (80+ chars) ... shrink them, and do
the same to a few lines which were already overlong.

Also add a few FIXME comments to nudge (a) replacement of some
magic numbers with opcode macros, which will be much better at
showing what's actually going on, and (b) correct return codes.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoCSB337 board cleanup (quasi-regression)
David Brownell [Sun, 21 Feb 2010 04:47:38 +0000 (20:47 -0800)]
CSB337 board cleanup (quasi-regression)

Get rid of new nasty warning:

NOTE! Severe performance degradation without fast memory access enabled...

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoFreeBSD buildfix
David Brownell [Sat, 20 Feb 2010 19:11:43 +0000 (11:11 -0800)]
FreeBSD buildfix

Fix an unused variable warning seen when building the parport driver
under FreeBSD.

Using information from Xiaofan Chen <xiaofanc@gmail.com>

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoatm920t : fix breakpoints and data cache handling
Marc Pignat [Tue, 16 Feb 2010 09:08:18 +0000 (10:08 +0100)]
atm920t : fix breakpoints and data cache handling

Breakpoints did not work because the data cache was not flushed
properly.

As a bonus add capability to write to memory marked as read only
by the MMU, which allows software breakpoints in such memory
regions.

14 years agoARM920T scanchain 15 comments/cleanup
David Brownell [Wed, 17 Feb 2010 02:50:16 +0000 (18:50 -0800)]
ARM920T scanchain 15 comments/cleanup

For folk who don't know the ARM920 JTAG interface very well, the
two modes of scan chain 15 access to CP15 are confusing.

Make those parts of the ARM920 code less opaque, by:

 - Adding comments referencing the relevant parts of the TRM,
   catching up to similar updates in the User's Guide.

 - Replacing magic numbers in physical access clients with
   symbolic equivalents.

No functional change.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agogpl: fix GPL startup message
Øyvind Harboe [Mon, 15 Feb 2010 12:41:08 +0000 (13:41 +0100)]
gpl: fix GPL startup message

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agoLPC1768.cfg -- partial fixes for bogus reset-init handler
David Brownell [Mon, 15 Feb 2010 21:39:16 +0000 (13:39 -0800)]
LPC1768.cfg -- partial fixes for bogus reset-init handler

Cortex-M targets don't support ARM instructions.

Leave the NVIC.VTOR setup alone, but comment how the whole
routine looks like one big bug...

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agofix crash with DSP563XX
Mathias Kuester [Sun, 14 Feb 2010 20:59:10 +0000 (12:59 -0800)]
fix crash with DSP563XX

When a DSP563xx-aware GDB asks OpenOCD for target registers,
the result should be a GDB with register data ... not an
OpenOCD crash.

(Note that mainline GDB doesn't currently support this core,
so for now, this requires a GDB with FreeScale patches.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoNEWS: mention removal of obsolete commands
David Brownell [Sun, 14 Feb 2010 04:14:49 +0000 (20:14 -0800)]
NEWS: mention removal of obsolete commands

Removed remaining support for various commands, like advice for
migrating old-style TAP declarations.

The documentation no longer describes them either ... so if users have
been delaying config updates, they may need to consult older releases.

ALL this stuff has been clearly marked as "do not use" for at least a
year now, so anyone still using it hasn't been holding up their end.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoRestore "-dev" version suffix (0.4.0-rc2-dev)
David Brownell [Sat, 13 Feb 2010 23:28:05 +0000 (15:28 -0800)]
Restore "-dev" version suffix (0.4.0-rc2-dev)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agov4.0-rc2 milestone v0.4.0-rc2
David Brownell [Sat, 13 Feb 2010 22:47:17 +0000 (14:47 -0800)]
v4.0-rc2 milestone

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoSTR9xpec: issue warning when unlocking device
Spencer Oliver [Thu, 11 Feb 2010 20:56:32 +0000 (20:56 +0000)]
STR9xpec: issue warning when unlocking device

Issue warning to user when unlocking or writing the option bytes.
The new settings will not take effect until a target reset.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoSTM32x: issue warning when unlocking device (bug #16)
Spencer Oliver [Thu, 11 Feb 2010 20:55:31 +0000 (20:55 +0000)]
STM32x: issue warning when unlocking device (bug #16)

Issue warning to user when unlocking or writing the option bytes.
The new settings will not take effect until a target reset.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
14 years agoarm720t: virt2phys callback added
Øyvind Harboe [Fri, 12 Feb 2010 07:39:56 +0000 (08:39 +0100)]
arm720t: virt2phys callback added

This is a copy and paste of arm926ejs. Not tested, but
ready for testing at least. There is a good chance that
it will work if the generic armv4_5 fn's are robust enough...

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agoarm920: add virt2phys fn
Marc Pignat [Fri, 12 Feb 2010 07:23:44 +0000 (08:23 +0100)]
arm920: add virt2phys fn

Copy of the 926ejs function. I have tested it only using
my rtems application (where virtual address mapping == physical).

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agotarget library: configuration files for openocd tested with Atmel SAM-ICE V6 JTAG.
Viktar Palstsiuk [Thu, 11 Feb 2010 20:09:21 +0000 (21:09 +0100)]
target library: configuration files for openocd tested with Atmel SAM-ICE V6 JTAG.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agoUser's Guide: "#" in filesystems names is bad
David Brownell [Thu, 11 Feb 2010 00:42:37 +0000 (16:42 -0800)]
User's Guide: "#" in filesystems names is bad

Sometimes MS-Windows users try to use filesystem names which include
the "#" character.  That's generally unwise, since it begins Tcl
comments.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
14 years agoarm11: fix another infinite loop bug
Øyvind Harboe [Wed, 10 Feb 2010 19:04:00 +0000 (20:04 +0100)]
arm11: fix another infinite loop bug

reset init would get stuck in an infinite loop when
e.g. khz was too high. Added timeout. This is a copy
of paste of a number of such bugfixes in the arm11
code.

Arm11 code reviewed for further such infinite loop bugs
and I couldn't find any more. Xing fingers it's the last
one...

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
14 years agoUser's Guide: clarify jtag_rclk advice
David Brownell [Wed, 10 Feb 2010 19:27:48 +0000 (11:27 -0800)]
User's Guide: clarify jtag_rclk advice

Not all cores and boards support adaptive clocking, so qualify
all advice to use it to depend on core and board support.

It's primarily ARM cores which support this; and many of the
newer ones (like Cortex-M series) don't.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>