Freddie Chopin [Sat, 4 Dec 2010 14:45:40 +0000 (15:45 +0100)]
remove srst_pulls_trst from LPC2xxx target scripts
LPC2xxx do not require reset_config srst_pulls_trst. This can cause various "strange" problems when flashing the chip, because "reset halt" actually allows the chip to run for some short period of time and execute some code.
Andrew Leech [Mon, 6 Dec 2010 21:05:56 +0000 (08:05 +1100)]
svf: various improvements
* added support for targeting particular tap
* improved file reading
* improved command line parsing
* added progress meter
* more readable time measurement output
Mike Dunn [Thu, 2 Dec 2010 19:08:28 +0000 (11:08 -0800)]
xscale: trace buffer remains enabled until explicitly disabled
Hi everyone,
Since a call went out for patches... been sitting on this for months. For some
reason, the xscale trace buffer is automatically disabled as soon as a break
occurs and the trace data is collected. This patch was a result of the
frustration of always re-enabling it, or else hitting a breakpoint and checking
the trace data, only to discover that I forgot to re-enable it before resuming.
Don't see why it should work this way. There is no run-time penalty, AFAIK.
Along the way, I also cleaned up a little by removing the ugly practice of
recording wrap mode by setting the fill count variable to "-1", replacing it
with an enum that records the trace mode.
I've been using this for months. Comments, criticisms gratefully received.
Spencer Oliver [Thu, 2 Dec 2010 13:11:08 +0000 (13:11 +0000)]
luminary: remove unused config cmds.
Due to commit e40aee2954d2beabe1d8c530d9ff1e564fb01f48 we now honour the
targets 'reset_config' setting. Previously we ignored the srst setting
for luminary targets.
Luminary targets have never supported using srst to reset into debug mode
so remove the option from the target configs files.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Currently the cmd 'cortex_m3 reset_config' will overide the default
target's 'reset_config'.
Chnage the behaviour to use the target 'reset_config' if configured and
fallback if not.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Antonio Borneo [Wed, 17 Nov 2010 00:12:45 +0000 (08:12 +0800)]
NOR/SPEARSMI: Add comments about SPI
SMI interface hides the real SPI bus between SPEAr and
external flash.
Added comments to highlight the SPI operation, to help a
future rework in SPI generic and SPEAr specific drivers.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Freddie Chopin [Sat, 13 Nov 2010 14:42:00 +0000 (15:42 +0100)]
Add comments and tiny improvements to STM32 flash loader algorithm
Add comments to assembly flash loader for STM32. Add tiny improvement in
size of the algorithm (40 vs 48 bytes) and tiny speed improvement (~1.5%,
as time is wasted on waiting for end of operation anyway).
Øyvind Harboe [Thu, 11 Nov 2010 07:50:22 +0000 (08:50 +0100)]
gdb: improve error message when gdb connect fails
gdb connect can fail when the flash has not been probed.
During gdb connect, the flash layout is reported, but this
can not be automatically detected for a target that is
powered up and OpenOCD supports connecting to gdb server
even if the target is powered down.
The solution is to turn of the gdb_memory_map feature.
Antonio Borneo [Mon, 8 Nov 2010 04:08:56 +0000 (12:08 +0800)]
JIM: Add "-n" option to "echo"
With the new JIMTCL, "puts" only writes to stdout.
To write on telnet port too, "echo" must be used.
This patch gives to "echo" similar commandline option of "puts".
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Antonio Borneo [Thu, 4 Nov 2010 08:53:28 +0000 (16:53 +0800)]
TCL scripts: add support for ST SPEAr310
Initial support for ST SPEAr310 and for the evaluation
board EVALSPEAr310 Rev. 2.0.
Scripts are split in generic for SPEAr3xx family and
specific for SPEAr310. This should easily allow adding
new members of the family.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Marek Vasut [Fri, 29 Oct 2010 00:57:32 +0000 (02:57 +0200)]
CortexA8: Introduce Freescale i.MX51 variant
This patch introduces support for Cortex A8 based Freescale i.MX51 CPU. This CPU
has the Debug Access Port located at a different address (0x60008000) than TI
OMAP3 series of CPUs.
i.MX51 configuration file based on OMAP3 configuration file and an email from
Alan Carvalho de Assis <acassis@gmail.com>.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Marek Vasut [Sun, 31 Oct 2010 04:24:36 +0000 (05:24 +0100)]
ADIv5: Introduce function to detect ROM Table location
This patch adds function called "dap_detect_debug_base()", which should be
called to get location of the ROM Table. By walking ROM Table, it's possible to
discover the location of DAP.
Sadly, some CPUs misreport this value, therefore I had to introduce an fixup
table, which will be used in case such CPU is detected.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
ddraskovic [Thu, 4 Nov 2010 13:33:10 +0000 (14:33 +0100)]
arm964e: Add support for ARM946E target.
So far most of the people have been using existing ARM966E in the
place of ARM946E, because they have practically the same scan chains.
However, ARM946E has caches, which further complicates JATG handling
via scan-chain. this was preventing single-stepping for ARM946E when
SW breakpoints are used.
This patch thus introduces :
1) Correct cache handling on memory write
2) Possibility to flush whole cache and turn it off during debug, or
just to flush affected lines (faster and better)
3) Correct SW breakpoint handling and correct single-stepping
4) Corrects the bug on CP15 read and write, so CP15 values
are now correctly R/W
Øyvind Harboe [Wed, 27 Oct 2010 06:37:54 +0000 (08:37 +0200)]
help: help now works on configuration commands
help would not show help for commands when the command
interpreter was in the wrong mode, which means that
e.g. "help newtap" didn't work, it wouldn't show the
"jtag newtap" help as it was a configuration command.
David Brownell [Sun, 10 Oct 2010 21:41:11 +0000 (14:41 -0700)]
swj-dp.tcl (SWD infrastructure #1)
Provide new helper proc that can set up either an SWD or JTAG DAP
based on the transport which is in use -- mostly for SWJ-DP.
Also update some SWJ-DP based chips/targets to use it. The goal
is making SWD-vs-JTAG transparent in most places. SWJ-DP based chips
really need this flexible configuration to cope with debug adapters
that support different transports, without needing new target configs
for each transport or adapter.
For JTAG-DP, callers will use "jtag newtap" directly, as today; only
one chip-level transport option exists.
For SW-DP (e.g. LPC1[13]xx or EFM32, they'll use "swd newdap" directly
(part of an upcoming SWD transport patch). Again, only one transport
option exists, so hard-wiring is appropriate there.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
projects / openocd / log