This adds initial support for the STM32L0 family, specifically the ID
code 417 variant. The 'L0 has 128B rather than 256B pages as well as a
different number of pages per sector. It also has several key registers
and register sets in different locations from the STM32L1xx parts.
This change therefore takes the opportunity to reorganize part information into
a const table (it was previously determined by a set of control statements) and
abstracts away some of the low-level details to make them generic for L1 and
L0 parts.
We also include the first bank's size (for dual bank parts) in the new
device information table (and correct that size for the 0x437 variant
which is 256 rather than 192KB).
The 'L0 parts will not use the built-in loader/helper for Flash writing.
Tested on STM32L053 (dicovery board and Nucleo board) and STM32L152
(discovery board).
Robert Jarzmik [Sun, 27 Jul 2014 10:30:13 +0000 (12:30 +0200)]
jtag: usb_blaster: fix initialization regression
As Daniel pointed out, since the rewrite of the USB Blaster driver, the
initialization behaviour has change. The initial flush of the FIFOs is
not longer done with a specific USB setup packet, but with a write
filling up the blaster queues.
The problem is, quoting Daniel :
When the CPLD is in bit banging mode (as is usually the case), the
first 0x00 byte sets all pins to low and disables the output
driver. Disabling the output drivers is a few nanoseconds slower
than changing a pin from high to low, so I see a spike towards GND
on my reset line when that byte is sent over USB. The spike is too
short to have an effect on the board.
When the 4096 0x00 bytes are processed and the TMS=1 is to be
generated, all I see is several microseconds of low level on all
pins, resetting my board.
This patch changes the way the initialization is done :
- at driver init, nothing is sent towards the usb-blaster
This gives time for init script to setup PIN6 and PIN8 (resets)
- at the very first driver command, the initialization is done :
- the output is in bit bigbang mode
- the PIN6 and PIN8 are computed according to init script
- the 4096 computed output is sent
Change-Id: If7ceee957f6b59bcb27c8f912f1cfdd0f94f75ed Reported-by: Daniel Glöckner <daniel-gl@gmx.net> Cc: Franck Jullien <franck.jullien@gmail.com> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Reviewed-on: http://openocd.zylin.com/2229 Tested-by: jenkins Reviewed-by: Franck Jullien <franck.jullien@gmail.com> Reviewed-by: Daniel Glöckner <daniel-gl@gmx.net> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Oleksij Rempel [Wed, 5 Feb 2014 22:11:15 +0000 (23:11 +0100)]
mips32.c: cache debug caps and support EJTAG 2.0 specific changes
EJTAG v2.0 indicated some debug caps in IMP register.
V2.6 moved them to DCR register. To make it more universal,
convert this values and store them for later use.
Angus Gratton [Fri, 27 Jun 2014 23:27:11 +0000 (09:27 +1000)]
stlink_usb: Fix swallowed error on read/write operations, add retries on SWD WAIT, clean up error debug output.
- stlink_usb_get_rw_status() had a bug where FAULT or WAIT responses
in read/write operations were ignored, leading to incomplete data.
- Added wrapper stlink_cmd_allow_retry to handle
SWD_AP_WAIT/SWD_DP_WAIT statuses in most commands. These statuses
appear if an SWD read or write received a WAIT ACK response from the
target more than 4 times in a row. The driver retries the operation
(with exponential backoff) before failing outright (in testing 1
retry was always enough.)
- As part of the implementation of stlink_cmd_allow_retry a large
number of lines of boilerplate were refactored.
- Fleshed out stlink_usb_error_check and added it to some more code
paths so WAIT or FAULT responses are logged to debug. WAIT responses
will be logged even if they are subsequently retried, which should
help in case the retries have subtle side effects (none
anticipated.)
Tested with two targets: STLINK F0 Discovery, Nordic NRF51822. Only
tested with STLINK V2 programmers.
nRF51822: Add workaround for PAN-16 where not all RAM blocks reliably enabled on reset
According to Nordic Semiconductor Product Anomaly Notice (document
NRF51822-PAN), item 16, some revisions of nRF51822 sometimes reset
without all RAM blocks enabled. This was noted on NRF51822-QFAA rev
CA/C0, only 8KiB of memory was accessible.
This patch turns on all RAM following a debugger induced reset
(matches specified behaviour.)
This workaround broke usage with at least the I.MX6Q.
The comment implies that talking to the J-Link dongle itself should
fail if the target isn't reset, which sounds really strange. I'm
guessing it just triggered another bug in OpenOCD or Segger FW which
might have been fixed since. Revert and wait and see if there are any
failure reports.
Tested with Kwikstik (J-Link + Kinetis K40), not with the mentioned
adapter.
Change-Id: I97f555efe079bd99c098bf483491d9509b2363ad Signed-off-by: Roy Spliet <rspliet@mpi-sws.org> Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2147 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Paul Fertser [Sat, 19 Jul 2014 12:48:09 +0000 (16:48 +0400)]
drivers/jlink: fix SWD speed config, and set it before sending anything
During the initialisation a driver might need to communicate with the
target (e.g. sending jtag2swd sequence), so when doing so it should
honour the user-specified speed.
Don't hardcode the type for the array, just output the array initializer
so the includer can choose the type and storage class, zero-terminate at
will and so on.
Change-Id: I6d5e0710eaaba0a218b3eb32f6569177356f4462 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2176 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The current change renames target functions and definitions in the
implementation from cortex_a8 to cortex_a.
This prepares the implementation to support Cortex-A8, A9, A15-MPCore
in one place.
Change-Id: I73b5a38a92c12ba5bd3b806fbbb664817575a6d7 Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1599 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Paul Fertser [Tue, 24 Jun 2014 14:10:35 +0000 (18:10 +0400)]
jtag/drivers/cmsis_dap: fix check for hardcoded vids/pids
This is intended to fix cmsis_dap_vid_pid command but it doesn't
because cmsis-dap has only one transport and it's auto-selected from
"interface" command handler (before any other commands are run) and as
the result cmsis_dap_usb_open() is called too early.
Change-Id: Idaade73797d8df67a6439d096f6abc9736495599 Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2191 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Kamal Dasu [Thu, 20 Feb 2014 22:46:42 +0000 (17:46 -0500)]
Openocd: svf: Add ability to ignore svf_check_tdo errors
Added Openocd commandline argument to ignore_error when the
read back TDO does not match to expected value specified with
TDO after masking with what is specified in MASK. This allows
to continue to play entire SVF file ignoring errors.
Error logs clearly show the failure reason and prints
read back TDO value.
Change-Id: I324f476fc16a003b35e6f2c5b63976431f49d54a Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/2129 Tested-by: jenkins Reviewed-by: Franck Jullien <franck.jullien@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Paul Fertser [Sun, 22 Jun 2014 19:23:31 +0000 (23:23 +0400)]
jtag/drivers/ftdi: do not touch unavailable reset signals
If the current reset_config doesn't specify availability of nTRST or
nSRST, just leave them alone, do not try to deassert them ever
(asserting would be prevented by the upper layer).
Change-Id: I90123c666e05a1c26f1e164625e82d766a3e3744 Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2186 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Paul Fertser [Thu, 19 Jun 2014 10:21:21 +0000 (14:21 +0400)]
Auto-select JTAG transport when appropriate
I looked through all the target configs after stripping comments and
such from them with sed to see what jtag-specific commands can appear
first, and it looks like all the meaningful combinations should be
covered.
Change-Id: I8d543407b7f4ac8aca7354ecd50e841c8a04d5f3 Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2179 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Polling was disabled based on global variables jtag_trst and jtag_srst
which were never touched in non-JTAG mode. Modify the check and remove
the ugly workaround to avoid calls to a possibly uninitialized JTAG
subsystem.
Change-Id: I3b18c81e0fba7aaf35afe6f08c3fe8fa6f8443fd Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2143 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This is usable on most or all FTDI adapters using a small hardware tweak.
TCK goes to SWCLK as expected. TDO should be wired to SWDIO. For TDI there
are two options:
Either add a 74HC126 or similar tri-state buffer between TDI and SWDIO,
with OE controlled by a signal named SWDIO_OE. Or simply connect TDI and
SWDIO together via a suitable resistor (220-470 ohms or so depending on
the drive capability of the target and adapter).
nSRST (and of course Vcc, GND) may be connected too but all other signals
should be NC.
Change-Id: Id36cf4577439be96bd4e5955c3026236e1cabced Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1958 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
swd: Remove support for turnaround periods other than 1
ARM deprecated other trn periods in ADIv5.1 and one cycle is the only
setting that is guaranteed to be implemented, as well as being the reset
value in ADIv5.0.
Thus it makes no sense supporting anything else.
Change-Id: Iffa16bb0ce74788bca88fd3ace8a026148013d00 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2132 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
cortex_m: Do additional initialization during reset
SAM4L requires additional steps to be taken right after SYSRESETREQ is
issued in order to function robustly:
- CMSIS-DAP DAP driver needs to explicitly check for sticky bit
errors since it is possible for adapter to perform successful
write opration, report no errors and then, under the hood, do
some other things that will result in sticky bit being set.
- Debugger needs to wait for security system to finish
intialization and assert CDBGPWRUPACK before proceeding
This change is related to commit http://openocd.zylin.com/#/c/1995/
adi_v5_swd: Separate sticky error clearing from AP abort
Swd_queue_ap_abort should set DAPABORT, not only clear sticky errors.
However, DAPABORT should not be set as soon as there is a single
FAULT/WAIT response. It's an "emergency only" operations for use only when
the AP have stalled the transfer for a long time. So these need to be
separate functions.
Change-Id: I37618447884faad54d846c2b07fa668ad505919d Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1956 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
adi_v5: Remove strange IDCODE check from dap info handler
Otherwise it breaks SWD targets. The check seems really weird anyway since
it loops through *all* TAPs after the ADIv5 target but doesn't do anything
at all with the result, other than not setting the return values despite
returning ERROR_OK.
Remove a bogus initialization that was needed because of the odd
behaviour of this routine when an IDCODE wasn't found.
Change-Id: Ic086352f6af868b3406b00420291a0a671e3acac Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1953 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Paul Fertser [Thu, 12 Jun 2014 14:56:32 +0000 (18:56 +0400)]
jtag/drivers/jlink: better diagnostics for RCLK problems
The JLink protocol description doesn't really specify it for
JTAG-level commands but the real life evidence is that 0x01 error code
means "Adaptive clocking timeout" as it does for e.g. WRITE_MEM_ARM79.
Change-Id: I4e3b568742814271919f92d202713968c8fcccfb Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2169 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Andrey Yurovsky [Thu, 12 Jun 2014 16:57:29 +0000 (09:57 -0700)]
flash: samd: add SAMD10 and SAMD11 part IDs
Add part IDs for the new SAMD10 and SAMD11 parts within the Atmel SAMD
family, they have the same Flash controller as the other samd parts and
should be supported by the at91samd driver. Compile-tested only.
Joshua Wise [Fri, 16 May 2014 08:08:43 +0000 (01:08 -0700)]
svf: Only read TDO back from the device if we actually need to look at the bits.
This results in a 90% speedup on USB-Blaster, which serializes repeated
TDI input against TDO readback; program time on an 5CGXFC5C6F27 part was
dropped from 2m30s to 9s.
Signed-off-by: Joshua Wise <joshua@joshuawise.com>
Change-Id: I92d5a8b800492283d619328549235b610528c338
Reviewed-on: http://openocd.zylin.com/2145 Reviewed-by: Paul Fertser <fercerpav@gmail.com> Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Seth LaForge [Tue, 6 May 2014 23:02:23 +0000 (16:02 -0700)]
cortex_a: fix lockup when writing to high address
On a processor with caches, when you write data to memory OpenOCD invalidates
the cache lines affected. If you write to an address within 64 bytes of
UINT32_MAX, then the for loop control variable wrapped around resulting in an
infinite loop. Change control variable to be an offset from the address
involved. We should never be asked to write 2^32 bytes, so wraparound should
not be a problem.
Franck Jullien [Mon, 25 Nov 2013 22:18:19 +0000 (23:18 +0100)]
target: or1k: remove wrong endian swap from or1k generic code
We don't need to swap the endianness in the target generic code.
This swap is necessary because of the adv_debug_if debug unit.
This patch moves this specific piece of code from or1k.c to
or1k_du_adv.c.
Cosmin Gorgovan [Sat, 29 Mar 2014 22:34:43 +0000 (22:34 +0000)]
Flash/LPC2000: Add support for auto-probing flash size
Adds support for auto-probing on devices which support the IAP
Read Part ID command. Includes IDs for all LPC17XX, LPC13XX,
LPC11XX and LPC11XXX devices with publicly available user
manuals.
To use auto-probing, select the 'auto' lpc2000 variant.
STM32F2x: Don't clear FLASH_OPTCR bits when locking register
stm32x_write_options is locking the FLASH_OPTCR register by
writing 0x00000001 to it, which clears the other bits. This
causes problems with subsequent flash operations; the hardware
is probably seeing the write protection bits in the register
set to '0' (protect), causing a WRPERR.
This patch ORs the value of the register with 0x00000001, so that
the only change is the lock bit itself.
Alex Ray [Sun, 6 Apr 2014 14:34:27 +0000 (07:34 -0700)]
Disable multiprocessor-id read on ARMv7-R cores
ARMv7-R cores are largely uniprocessor-configured, and when they are
multiprocessor-configured the format of the MPIDR register isn't
compatible with ARMv7-A cores.
Change-Id: I024ec514496fbab5075c6fb34b6acd870e68e1fc Signed-off-by: Alex Ray <a@machinaut.com>
Reviewed-on: http://openocd.zylin.com/2096 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
projects / openocd / log