David Brownell [Sun, 22 Nov 2009 18:21:48 +0000 (10:21 -0800)]
ARM: use arm_reg_current()
Start using the arm_reg_current() call. This shrinks and speeds
the affected code. It can also prevent some coredumps coming from
invalid CPSR values ... the ARMV4_5_CORE_REG_MODE() macro returns
bogus registers if e.g. "Secure Monitor" mode isn't supported by
the current CPU.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Sun, 22 Nov 2009 11:41:14 +0000 (03:41 -0800)]
ARM: arm_set_cpsr() handles T and J bits
Have arm_set_cpsr() handle the two core state flags, updating
the CPU state. This eliminates code in various debug_entry()
paths, and marginally improves handling of the J bit.
Catch and comment a few holes in the handling of the J bit on
ARM926ejs cores ... it's unlikely our users will care about
Jazelle mode, but we can at least warn of Impending Doom. If
anyone does use it, these breadcrumbs may help them to find
the right path through the code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Sun, 22 Nov 2009 11:38:34 +0000 (03:38 -0800)]
ARM: define two register utilities
Define arm_reg_current() ... returning handle to a given register,
and encapsulating the current mode's register shadowing. It's got
one current use, for reporting the current register set to GDB.
This will let later patches clean up much ARMV4_5_CORE_REG_MODE()
nastiness, saving a bit of code.
Define and use arm_set_cpsr() ... initially it updates the cached
CPSR and sets up state used by arm_reg_current(), plus any SPSR
handle. (Later: can also set up for T and J bits.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Sun, 22 Nov 2009 11:37:21 +0000 (03:37 -0800)]
ARM: simplify CPSR handling
Stash a pointer to the CPSR in the "struct arm", to help get rid
of the (common) references to its index in the register cache.
This removes almost all references to CPSR offsets outside of the
toplevel ARM code ... except a pair related to the current ARM11
"simulator" logic (which should be removable soonish).
This is a net minor code shrink of a few hundred bytes of object
code, and also makes the code more readable.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add this to ease debugging why the standard scripts aren't
found on the default script search path in some build/install
enviroments. Especially on Windows it's not straight forward
where openocd actually looks for the scripts.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Sat, 21 Nov 2009 00:27:24 +0000 (16:27 -0800)]
ARM: pass 'struct reg *' to register r/w routines
Implementations need to access the register struct they modify;
make it easier and less error-prone to identify the instance.
(This removes over 10% of the ARMV4_5_CORE_REG_MODE nastiness...)
Plus some minor fixes noted when making these updates: ARM7/ARM9
accessor methods should be static; don't leave CPSR wrongly marked
"dirty"; note significant XScale omissions in register handling;
and have armv4_5_build_reg_cache() record its result.
Rename "struct armv4_5_core_reg" as "struct arm_reg"; it's used
for more than those older architecture generations.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Sat, 21 Nov 2009 00:21:29 +0000 (16:21 -0800)]
ARM7/ARM9: remove old "debug commands"
Remove two commands that were documented as "debug commands"
and where "you probably don't want to use this". We never
intended to support them, and at least one problem report
boiled down to using this when it shouldn't have been used.
Update the docs on the existing register commands to talk a
bit more about register access and cache behavior. (Those
debug commands existed largely to *bypass* the cache.) And
fix some minor doc goofs that snuck in with recent changes,
renaming "armv4_5" as "arm" and "arm9tdmi" as "arm9".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Zachary T Welch [Thu, 19 Nov 2009 15:23:25 +0000 (07:23 -0800)]
add add_help_text command handler
Rewrite means for scripts to register help text for commands. These
cause the new commands to be stored in the command heirarchy, with
built-in commands; however, they will never be invoked there because
they do not receive a command handler. The same trick is used for
the Jim commands.
Remove the old helpers that were used to register commands.
Zachary T Welch [Fri, 20 Nov 2009 17:11:39 +0000 (09:11 -0800)]
provide command context during cmd_init
For the startup.tcl code to use built-in commands, the context must be
associated with the interpreter temporarily. This will be required to
add help text.
Zachary T Welch [Thu, 19 Nov 2009 14:48:37 +0000 (06:48 -0800)]
improve 'help' command
Rewrites 'help' command in C, using new 'cmd_help' for display. Adds the
built-in 'help' COMMAND_HANDLER to provide better output than the
TCL-based script command (e.g. heirarchical listing of commands).
The help string is stored in the command structure, though it conitnues
to be pushed into the Jim environment. The current idiomatic usage
suggests the addition of a usage field as well, to provide two levels
of detail for users to consume (i.e. terse usage list, or verbose help).
Zachary T Welch [Thu, 19 Nov 2009 16:38:17 +0000 (08:38 -0800)]
refactor command registration
Refactors the command registration to use helpers to simplify the code.
The unregistration routines were made more flexible by allowing them
to operate on a single command, such that one can remove all of a
commands children in one step (perhaps before adding back a 'config'
subcommand that allows getting the others back). Eliminates a bit
of duplicated code and adds full API documentation for these routines.
David Brownell [Fri, 20 Nov 2009 03:03:02 +0000 (19:03 -0800)]
Cortex-A8: mode support
We *should* be able to read and write registers in any core mode,
instead of being stuck with whatever mode the core was when we
entered debug state. This patch makes them work.
Note that the current restore_context() only handles the current
mode; writing to other-mode registers is a NOP without a followup
patch fixing that. Also, that SPSR access needed some bugfixes;
it was confused with CPSR.
Secure monitor mode also seems dubious; there's probably more to
be done before that's sufficiently understood by the debugger.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Zachary T Welch [Tue, 17 Nov 2009 21:07:36 +0000 (13:07 -0800)]
rename flash and nand command helpers
After adding support for referencing banks by name, renames
the COMMAND_HELPERs appropriately:
flash_command_get_bank_by_num -> flash_command_get_bank
nand_command_get_device_by_num -> flash_command_get_device
Zachary T Welch [Tue, 17 Nov 2009 21:04:49 +0000 (13:04 -0800)]
allow flash/nand banks commands to accept names
Add get_flash_bank_by_name (and get_nand_device_by_name) helpers
to retrieves struct flash_bank * (struct nand_device *) given a
driver name and an (optional) driver-specific bank index.
These are used to extend flash_command_get_bank_by_num (and
nand_command_get_device_by_num) to allow all flash (nand) commands to
reference defined banks by name, not just by number.
To avoid some code duplication, add the flash/common.[ch] files to hold
functionality common to both types driver. The first two methods are
helpers for the above routines to find a bank specified by a "name" or
"name.index" string. get_flash_name_index() finds the '.index' portion,
while flash_driver_name_matches() performs the string portion matching.
David Brownell [Thu, 19 Nov 2009 21:23:08 +0000 (13:23 -0800)]
ARM: streamline register init
Combine register names with other per-register data into a
single template structure. This saves space, and makes it
easier to change how registers get handled (by shrinking
the number of places that care about cache indices).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Thu, 19 Nov 2009 18:47:31 +0000 (10:47 -0800)]
Cortex-A8: parts of examine() run just once
The examine() method has some conceptual breakage. Cope
with it by manually splitting out the run-once parts from
the after-each-reset parts ... this gets rid of memory
leaks and speeds up resets after the first one.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Thu, 19 Nov 2009 10:33:01 +0000 (02:33 -0800)]
ARMv7-A: use standard ARM core states
We don't want an ARMv7-specific core state enumeration just to
add ThumbEE state. Update the generic stuff to handle that,
and replace the V7-specific bits with it.
For Cortex-A8: on debug entry, check both the T and J bits
instead of just the T bit. When the J bit is set, set the
right state and warn appropriately.
(And while we're at it, move the generic arm struct to the front
of the v7a structure, for somewhat better code generation.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Thu, 19 Nov 2009 10:31:34 +0000 (02:31 -0800)]
ARMv7-A: use standard ARM core_mode symbols
The only way ARMv7-A modes differ from ARMv4/ARMv5 flavors
is that v7-A is allowed to include "Secure monitor" support.
That's now handled by our standard top-level ARM code ... so
phase out the stuff that's specific to ARMv7-A.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Zachary T Welch [Wed, 18 Nov 2009 13:02:08 +0000 (05:02 -0800)]
remove fast command and jim_global_long
Removing the fast command eliminates the fast_and_dangerous global,
which was used only by arm7_9_common as an initializer. The command
is not called in the tree; instead, more explicit commands are used.
The jim_global_long function was not used anywhere in the tree.
Zachary T Welch [Wed, 18 Nov 2009 20:41:20 +0000 (12:41 -0800)]
change all bool parsers to accept any value
This patch changes the behavior of all boolean parsing callers to
accept any one of "true/enable/on/yes/1" or "false/disable/off/no/0".
Since one particular pair will be most appropriate in any given
situation, the specific macros should continue to be used in
order to display the most informative error messages possible.
Zachary T Welch [Wed, 18 Nov 2009 14:58:27 +0000 (06:58 -0800)]
add handle_command_parse_bool command helper
Rewrite arm11_handle_bool to provide a generic on/off command helper.
Refactors COMMAND_PARSE_BOOL to use new command_parse_bool helper,
which gets reused by the new command_parse_bool_any helper.
This later helper is called by the new command helper function to
accepts any on/off, enable/disable, true/false, yes/no, or 0/1 parameter.
Zachary T Welch [Wed, 18 Nov 2009 13:36:18 +0000 (05:36 -0800)]
use COMMAND_PARSE_ENABLE macro where appropriate
Updates all command parsing of simple "enable" and "disable" arguments.
A few case in the tree use a tri-state or extended arguments, which
cannot use this simple macro.
Simlifies the xscale icache/dcache command handler logic.
Zachary T Welch [Wed, 18 Nov 2009 13:19:34 +0000 (05:19 -0800)]
add COMMAND_PARSE_BOOL macro and friends
Adds several macros similar to COMMAND_PARSE_NUMBER, but for parsing
boolean command arguments. Two flavors are provided to provide
drop-in compatibility with existing code, allow for the elimination
of a lot of code bloat while improving the error checking and reporting.
David Brownell [Wed, 18 Nov 2009 23:31:24 +0000 (15:31 -0800)]
ARM: rework "arm reg" output for new mode
Change the layout to show the "Secure Monitor" registers too,
when they're present.
Instead of lining registers for each of six (or seven) modes up
in adjacent vertical columns, display each mode's registers (or
shadows) in a single block, avoiding duplicate value displays.
This also lets us shrink the line length to fits in standard 80
character lines ... six or seven 18-character columns can't fit.
Relabel "r13" as "sp", so it's more meaningful.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Wed, 18 Nov 2009 22:49:22 +0000 (14:49 -0800)]
ARM: add a default full_context() method
If the core doesn't provide an optimized version of this
method, provide one without core-specific optimizations.
Use this to make Cortex-A8 support the "arm reg" command.
Related: make the two register access methods properly static,
have the "set" log a "not halted" error too, and make sure
that the "valid" flag is set on successful reads.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Wed, 18 Nov 2009 22:46:14 +0000 (14:46 -0800)]
ARM: simplify ARMv7-A register handling
ARMv7-A doesn't need to duplicate all the standard ARM code
for register handling.
- Switch Cortex-A8 to use the standard register code
- Remove duplicated infrastructure from ARMv7-A
- Have ARMv7-A arch_state() show CPSR, like other ARMs
Add comments to show where the Cortex-A8 isn't actually doing
the right thing for register reads/writes, unless core happens
to be in the right mode to start with. (Looks like maybe there
may be generic confusion between saved/current PSR values in all
the ARM code ...)
Make related ARMv7-A and Cortex-A8 symbols properly static.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Wed, 18 Nov 2009 21:23:00 +0000 (13:23 -0800)]
ARM: setup "secure monitor mode" shadow regs
Teach the "armv4_5" register code to understand about the
secure monitor mode:
- Add the other three shadowed registers to the arrays
- Support another internal mode number (sigh) in mappings
- Catch malloc/calloc failures building that register cache
This should kick in for Cortex-A8 and ARM1176.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Wed, 18 Nov 2009 21:22:27 +0000 (13:22 -0800)]
ARM: add "core_type" field to "struct arm"
It's used to flag cores with the "TrustZone" extension,
and is used in subsequent patches to set up support for
the registers shadowed by its new secure monitor mode.
The ARM1176 and Cortex-A8 both support this new mode.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Zachary T Welch [Wed, 18 Nov 2009 19:56:24 +0000 (11:56 -0800)]
fix segfault at startup
The previous changes to move the startup TCL code resulted in segfaults
during startup. This seemingly innocuous patch fixes the problem.
I would explain why changing from 'foo[]' to '*foo' caused this issue,
but the difference seems superficial. For now, this hot fix will do,
but this issue might bear further scrutiny.
Zachary T Welch [Tue, 17 Nov 2009 16:29:20 +0000 (08:29 -0800)]
split startup.tcl file across modules
Moves definitions for each layer into their own file, eliminating
layering violations in the built-in TCL code. Updates src/Makefile.am
rules to include all files in the final startup.tcl input file, and
others Makefile.am rules to distribute the new files in our packages.
Zachary T Welch [Wed, 18 Nov 2009 11:34:52 +0000 (03:34 -0800)]
fix regression in md/mw commands
The recent migration broke them, the fixes broken them in a new way,
but this should restore them to working order. Eliminates the
temporary variable, as the CMD_NAME macro can once again be use
in routines that increment CMD_ARGV without nasty side-effects.
David Brownell [Wed, 18 Nov 2009 07:50:26 +0000 (23:50 -0800)]
ARM: add is_arm_mode()
Add a new is_arm_mode() predicate, and use it to replace almost
all calls to current armv4_5_mode_to_number().
Eventually those internal mode numbers should vanish... along
with their siblings in the armv7a.c file.
Remove a handful of superfluous checks ... e.g. the mode number
was just initialized, or (debug entry methods) already validated.
Move one of the macros using internal mode numbers into the only
file which uses that macro. Make the tables manipulated with
those numbers be read-only and, where possible, static so they're
not confused with part of the generic ARM interface.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Wed, 18 Nov 2009 07:50:23 +0000 (23:50 -0800)]
ARM: add arm_mode_name()
Add and use arm_mode_name() to map from PSR bits to user
meaningful names. It uses a new table which, later, can
be used to hold other mode-coupled data.
Add definitions for the "Secure Monitor" mode, as seen on
some ARM11 cores (like ARM1176) and on Cortex-A8. The
previous mode name scheme didn't understand that mode.
Remove the old mechanism ... there were two copies, caused
by Cortex-A8 needing to add "Secure Monitor" mode support.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Wed, 18 Nov 2009 07:50:17 +0000 (23:50 -0800)]
ARM: only use one set of dummy FPA registers
All ARM cores need to provide obsolete FPA registers in their
GDB register dumps. (Even though cores with floating point
support now generally use some version of VFP...)
Clean up that support a bit by sharing the same dummy registers,
and removing the duplicate copies. Eventually we shouldn't need
to export those dummies.
(This makes the ARMv7-M support include the armv4_5 header, and
cleans up related #includes, but doesn't yet use anything from
there except those dummies.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Zachary T Welch [Tue, 17 Nov 2009 14:54:56 +0000 (06:54 -0800)]
allow documentation to be configured
Add --disable-doxygen-html and --enable-doxygen-pdf options to the
configure script, allowing user to change the defaults. These
update the proess of munging the Doxygen configuration file to
use the settings thusly provided. Add options in README.
Zachary T Welch [Tue, 17 Nov 2009 14:04:03 +0000 (06:04 -0800)]
update doxygen configuration to produce a PDF
A single PDF file for the developer manual allows accessing a single
index, browsing, and searching. It takes significantly more time to
build this way, but this patch allows others to look at the results.
Migration Tip: If you have previously built the HTML Doxygen
documentatation, rename your 'doxygen' directory to 'doxygen/html'
to prevent needlessly rebuilding those files.
Zachary T Welch [Sun, 15 Nov 2009 12:21:17 +0000 (04:21 -0800)]
add struct command_invocation for COMMAND_HANDLER
Adds the command_invocation structure to encapsulate parameters for
all COMMAND_HANDLER routines. Rather than passing several arguments
to each successive subroutine, a single pointer may be passed around.
Changes the CMD_* macros to reference the new fields.
Updates run_command to create an instance and pass it to the handler.
Zachary T Welch [Sun, 15 Nov 2009 12:18:51 +0000 (04:18 -0800)]
add more command_handler conversion macros
Add additional macros to allow command handling to be migrated easily:
CMD_CTX, CMD_ARGC, and CMD_ARGV. Updates CMD_NAME to use CMD_ARGV.
In addition to making the remaining patches of this series cleaner,
this introduces easily sed-able symbols that could allow us to retire
these once the command handler infrastructure matures (i.e. pre-1.0).
Øyvind Harboe [Tue, 17 Nov 2009 10:03:55 +0000 (11:03 +0100)]
jtag_registers: Avalon bridge flushing tweaks
The code is now much more explicit. It flushes every
N writes. For now flush every time, but tinkering with
the bridge FIFO size and how often we flush clearly
points in the direction of the Avalon write FIFO full
being the culprit.