]> git.sur5r.net Git - openocd/commit
arm920t: fix write memory operations with caches enabled
authorPaul Fertser <fercerpav@gmail.com>
Tue, 26 Nov 2013 15:46:09 +0000 (19:46 +0400)
committerSpencer Oliver <spen@spen-soft.co.uk>
Fri, 24 Jan 2014 12:48:43 +0000 (12:48 +0000)
commit1137eaedaf6498f3448cdedf6f93076d9b3fd58a
treea68a86bde226531710595395236f10fb0d356df3
parent2efb1f14f611f2ff8a380b703f3e8bcb8a95d1ad
arm920t: fix write memory operations with caches enabled

Commit ff5ec942d80a34e20b5a3ca3328f7e6a55fb309b made this target
always use generic arm7_9 memory write routines for software
breakpoints which resulted in inability to debug and single-step
sources in Gdb when icache is active as generic routine doesn't
invalidate it. This should fix it (and is real-life tested against
Samsung S3C2442). I expect other arm7-9 targets to be affected as
well.

Change-Id: Id7980e370ae4db47ac6b1490321d81ffe85711c0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1817
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
src/target/arm920t.c