From 8ff9213ea0add85ce00876831282624d560fc8a1 Mon Sep 17 00:00:00 2001 From: rtel Date: Mon, 30 Dec 2013 11:24:34 +0000 Subject: [PATCH] Minor updates to demo projects to ensure correct building with V8 rc1. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2152 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- .../RTOSDemo/Full-Demo/Sample-CLI-commands.c | 6 +- FreeRTOS/Demo/PIC18_MPLAB/stdint.h | 15 +++++ .../FreeRTOSConfig.h | 18 +++-- .../Demo/RL78_RL78G13_Promo_Board_IAR/main.c | 66 +++++++++---------- .../RX600_RX62N-RDK_GNURX/RTOSDemo/stdint.h | 15 +++++ .../RX600_RX62N-RSK_GNURX/RTOSDemo/stdint.h | 15 +++++ .../RTOSDemo/RenesasCode/typedefine.h | 5 +- .../SuperH_SH7216_Renesas/RTOSDemo/stdint.h | 15 +++++ .../Demo/uIP_Demo_Rowley_ARM7/uip/cs8900a.c | 56 ++++++++-------- FreeRTOS/Source/include/FreeRTOS.h | 3 + .../portable/GCC/ARM7_AT91SAM7S/portISR.c | 60 ++++++++--------- .../portable/GCC/ARM7_AT91SAM7S/portmacro.h | 12 ++-- FreeRTOS/Source/portable/GCC/ARM_CM3/port.c | 10 +-- FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c | 10 +-- FreeRTOS/Source/portable/IAR/ARM_CM3/port.c | 10 +-- FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c | 12 ++-- FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c | 10 +-- FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c | 10 +-- 18 files changed, 206 insertions(+), 142 deletions(-) create mode 100644 FreeRTOS/Demo/PIC18_MPLAB/stdint.h create mode 100644 FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/stdint.h create mode 100644 FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/stdint.h create mode 100644 FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/stdint.h diff --git a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/Sample-CLI-commands.c b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/Sample-CLI-commands.c index a5cf67c17..9fd423f8a 100644 --- a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/Sample-CLI-commands.c +++ b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/Sample-CLI-commands.c @@ -199,7 +199,7 @@ void vRegisterSampleCLICommands( void ) static portBASE_TYPE prvTaskStatsCommand( int8_t *pcWriteBuffer, size_t xWriteBufferLen, const int8_t *pcCommandString ) { -const char *const pcHeader = ( int8_t * ) "Task State Priority Stack #\r\n************************************************\r\n"; +const char *const pcHeader = "Task State Priority Stack #\r\n************************************************\r\n"; /* Remove compile time warnings about unused parameters, and check the write buffer is not NULL. NOTE - for simplicity, this example assumes the @@ -210,7 +210,7 @@ const char *const pcHeader = ( int8_t * ) "Task State Priority Stack /* Generate a table of task stats. */ strcpy( ( char * ) pcWriteBuffer, pcHeader ); - vTaskList( pcWriteBuffer + strlen( pcHeader ) ); + vTaskList( ( char * ) pcWriteBuffer + strlen( pcHeader ) ); /* There is no more data to return after this single string, so return pdFALSE. */ @@ -220,7 +220,7 @@ const char *const pcHeader = ( int8_t * ) "Task State Priority Stack static portBASE_TYPE prvRunTimeStatsCommand( int8_t *pcWriteBuffer, size_t xWriteBufferLen, const int8_t *pcCommandString ) { -const char * const pcHeader = ( int8_t * ) "Task Abs Time % Time\r\n****************************************\r\n"; +const char * const pcHeader = "Task Abs Time % Time\r\n****************************************\r\n"; /* Remove compile time warnings about unused parameters, and check the write buffer is not NULL. NOTE - for simplicity, this example assumes the diff --git a/FreeRTOS/Demo/PIC18_MPLAB/stdint.h b/FreeRTOS/Demo/PIC18_MPLAB/stdint.h new file mode 100644 index 000000000..30913ad0a --- /dev/null +++ b/FreeRTOS/Demo/PIC18_MPLAB/stdint.h @@ -0,0 +1,15 @@ + +#ifndef STDINT_INC +#define STDINT_INC + +/* This file will get picked up when stdint.h does not appear in the default +include path (which it doesn't seem to be - even though the file exists). */ + +typedef signed char int8_t; +typedef unsigned char uint8_t; +typedef short int16_t; +typedef unsigned short uint16_t; +typedef long int32_t; +typedef unsigned long uint32_t; + +#endif /* STDINT_INC */ diff --git a/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/FreeRTOSConfig.h index 703c632be..33d41d19a 100644 --- a/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/FreeRTOSConfig.h +++ b/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. + FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. All rights reserved FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT @@ -57,19 +57,19 @@ *************************************************************************** - http://www.FreeRTOS.org - Documentation, books, training, latest versions, + http://www.FreeRTOS.org - Documentation, books, training, latest versions, license and Real Time Engineers Ltd. contact details. http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, including FreeRTOS+Trace - an indispensable productivity tool, and our new fully thread aware and reentrant UDP/IP stack. - http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High - Integrity Systems, who sell the code with commercial support, + http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High + Integrity Systems, who sell the code with commercial support, indemnification and middleware, under the OpenRTOS brand. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and mission critical applications that require provable dependability. */ @@ -142,6 +142,10 @@ to exclude the API function. */ #define INCLUDE_xTaskGetIdleTaskHandle 0 #define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 +/* Tick interrupt vector - this must match the INTIT_vect definition contained +in the ior5fnnnn.h header file included at the top of this file (the value is +dependent on the hardware being used. */ +#define configTICK_VECTOR 56 /****************************************************************************** * PORT SPECIFIC CONFIGURATION OPTIONS diff --git a/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/main.c b/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/main.c index b8875d3bb..91d45f46c 100644 --- a/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/main.c +++ b/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/main.c @@ -1,5 +1,5 @@ /* - FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. + FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. All rights reserved FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT @@ -57,19 +57,19 @@ *************************************************************************** - http://www.FreeRTOS.org - Documentation, books, training, latest versions, + http://www.FreeRTOS.org - Documentation, books, training, latest versions, license and Real Time Engineers Ltd. contact details. http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, including FreeRTOS+Trace - an indispensable productivity tool, and our new fully thread aware and reentrant UDP/IP stack. - http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High - Integrity Systems, who sell the code with commercial support, + http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High + Integrity Systems, who sell the code with commercial support, indemnification and middleware, under the OpenRTOS brand. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and mission critical applications that require provable dependability. */ @@ -200,11 +200,11 @@ static xTimerHandle xDemoTimer = NULL; /* This variable is incremented each time the demo timer expires. */ static volatile unsigned long ulDemoSoftwareTimerCounter = 0UL; -/* RL78/G13 Option Byte Definition. Watchdog disabled, LVI enabled, OCD interface +/* RL78 Option Byte Definition. Watchdog disabled, LVI enabled, OCD interface enabled. */ __root __far const unsigned char OptionByte[] @ 0x00C0 = { - WATCHDOG_DISABLED, LVI_ENABLED, RESERVED_FF, OCD_ENABLED + 0x6eU, 0xffU, 0xe8U, 0x85U }; /* Security byte definition */ @@ -228,7 +228,7 @@ short main( void ) /* Create the RegTest tasks as described at the top of this file. */ xTaskCreate( vRegTest1, "Reg1", configMINIMAL_STACK_SIZE, NULL, 0, NULL ); - xTaskCreate( vRegTest2, "Reg2", configMINIMAL_STACK_SIZE, NULL, 0, NULL ); + xTaskCreate( vRegTest2, "Reg2", configMINIMAL_STACK_SIZE, NULL, 0, NULL ); /* Create the software timer that performs the 'check' functionality, as described at the top of this file. */ @@ -238,7 +238,7 @@ short main( void ) ( void * ) 0, /* The ID is not used, so can be set to anything. */ prvCheckTimerCallback /* The callback function that inspects the status of all the other tasks. */ ); - + /* Create the software timer that just increments a variable for demo purposes. */ xDemoTimer = xTimerCreate( "DemoTimer",/* A text name, purely to help debugging. */ @@ -247,12 +247,12 @@ short main( void ) ( void * ) 0, /* The ID is not used, so can be set to anything. */ prvDemoTimerCallback /* The callback function that inspects the status of all the other tasks. */ ); - + /* Start both the check timer and the demo timer. The timers won't actually start until the scheduler is started. */ xTimerStart( xCheckTimer, mainDONT_BLOCK ); xTimerStart( xDemoTimer, mainDONT_BLOCK ); - + /* Finally start the scheduler running. */ vTaskStartScheduler(); @@ -281,12 +281,12 @@ static portBASE_TYPE xChangedTimerPeriodAlready = pdFALSE, xErrorStatus = pdPASS { xErrorStatus = pdFAIL; } - + if( xArePollingQueuesStillRunning() != pdTRUE ) { xErrorStatus = pdFAIL; } - + if( xAreBlockTimeTestTasksStillRunning() != pdTRUE ) { xErrorStatus = pdFAIL; @@ -297,7 +297,7 @@ static portBASE_TYPE xChangedTimerPeriodAlready = pdFALSE, xErrorStatus = pdPASS { xErrorStatus = pdFAIL; } - + /* Ensure that the demo software timer has expired mainDEMO_TIMER_INCREMENTS_PER_CHECK_TIMER_TIMEOUT times in between each call of this function. A critical section is not required to access @@ -314,7 +314,7 @@ static portBASE_TYPE xChangedTimerPeriodAlready = pdFALSE, xErrorStatus = pdPASS { ulDemoSoftwareTimerCounter = 0UL; } - + if( ( xErrorStatus == pdFAIL ) && ( xChangedTimerPeriodAlready == pdFALSE ) ) { /* An error has occurred, but the timer's period has not yet been changed, @@ -322,13 +322,13 @@ static portBASE_TYPE xChangedTimerPeriodAlready = pdFALSE, xErrorStatus = pdPASS timer's period means the LED will toggle at a faster rate, giving a visible indication that something has gone wrong. */ xChangedTimerPeriodAlready = pdTRUE; - + /* This call to xTimerChangePeriod() uses a zero block time. Functions called from inside of a timer callback function must *never* attempt to block. */ xTimerChangePeriod( xCheckTimer, ( mainERROR_CHECK_TIMER_PERIOD_MS ), mainDONT_BLOCK ); } - + /* Toggle the LED. The toggle rate will depend on whether or not an error has been found in any tasks. */ mainLED_0 = !mainLED_0; @@ -350,58 +350,58 @@ unsigned char ucResetFlag = RESF; /* Set fMX */ CMC = 0x00; MSTOP = 1U; - + /* Set fMAIN */ MCM0 = 0U; - + /* Set fSUB */ XTSTOP = 1U; OSMC = 0x10; - + /* Set fCLK */ CSS = 0U; - + /* Set fIH */ HIOSTOP = 0U; } #else { - unsigned char ucTempStabset, ucTempStabWait; + unsigned char ucTempStabset, ucTempStabWait; /* Set fMX */ CMC = 0x41; OSTS = 0x07; MSTOP = 0U; ucTempStabset = 0xFF; - + do { ucTempStabWait = OSTC; ucTempStabWait &= ucTempStabset; } while( ucTempStabWait != ucTempStabset ); - + /* Set fMAIN */ MCM0 = 1U; - + /* Set fSUB */ XTSTOP = 1U; OSMC = 0x10; - + /* Set fCLK */ CSS = 0U; - + /* Set fIH */ HIOSTOP = 0U; } #endif /* configCLOCK_SOURCE == 1 */ - + /* LED port initialization - set port register. */ P7 &= 0x7F; - + /* Set port mode register. */ PM7 &= 0x7F; - + /* Switch pin initialization - enable pull-up resistor. */ PU12_bit.no0 = 1; @@ -457,6 +457,6 @@ volatile size_t xFreeHeapSpace; management options. If there is a lot of heap memory free then the configTOTAL_HEAP_SIZE value in FreeRTOSConfig.h can be reduced to free up RAM. */ - xFreeHeapSpace = xPortGetFreeHeapSize(); + xFreeHeapSpace = xPortGetFreeHeapSize(); } diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/stdint.h b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/stdint.h new file mode 100644 index 000000000..30913ad0a --- /dev/null +++ b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/stdint.h @@ -0,0 +1,15 @@ + +#ifndef STDINT_INC +#define STDINT_INC + +/* This file will get picked up when stdint.h does not appear in the default +include path (which it doesn't seem to be - even though the file exists). */ + +typedef signed char int8_t; +typedef unsigned char uint8_t; +typedef short int16_t; +typedef unsigned short uint16_t; +typedef long int32_t; +typedef unsigned long uint32_t; + +#endif /* STDINT_INC */ diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/stdint.h b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/stdint.h new file mode 100644 index 000000000..30913ad0a --- /dev/null +++ b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/stdint.h @@ -0,0 +1,15 @@ + +#ifndef STDINT_INC +#define STDINT_INC + +/* This file will get picked up when stdint.h does not appear in the default +include path (which it doesn't seem to be - even though the file exists). */ + +typedef signed char int8_t; +typedef unsigned char uint8_t; +typedef short int16_t; +typedef unsigned short uint16_t; +typedef long int32_t; +typedef unsigned long uint32_t; + +#endif /* STDINT_INC */ diff --git a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/RenesasCode/typedefine.h b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/RenesasCode/typedefine.h index c7ded32d2..836e402b4 100644 --- a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/RenesasCode/typedefine.h +++ b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/RenesasCode/typedefine.h @@ -40,6 +40,7 @@ #ifndef _TYPE_DEFINE_H_ #define _TYPE_DEFINE_H_ +#include typedef unsigned char Bool; @@ -47,12 +48,8 @@ typedef unsigned char Bool; typedef signed char char8_t; typedef unsigned char uchar8_t; -typedef signed char int8_t; -typedef unsigned char uint8_t; typedef signed short short16_t; typedef unsigned short ushort16_t; -typedef signed long int32_t; -typedef unsigned long uint32_t; typedef signed long long32_t; typedef unsigned long ulong32_t; diff --git a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/stdint.h b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/stdint.h new file mode 100644 index 000000000..30913ad0a --- /dev/null +++ b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/stdint.h @@ -0,0 +1,15 @@ + +#ifndef STDINT_INC +#define STDINT_INC + +/* This file will get picked up when stdint.h does not appear in the default +include path (which it doesn't seem to be - even though the file exists). */ + +typedef signed char int8_t; +typedef unsigned char uint8_t; +typedef short int16_t; +typedef unsigned short uint16_t; +typedef long int32_t; +typedef unsigned long uint32_t; + +#endif /* STDINT_INC */ diff --git a/FreeRTOS/Demo/uIP_Demo_Rowley_ARM7/uip/cs8900a.c b/FreeRTOS/Demo/uIP_Demo_Rowley_ARM7/uip/cs8900a.c index 331463a78..6d06fd673 100644 --- a/FreeRTOS/Demo/uIP_Demo_Rowley_ARM7/uip/cs8900a.c +++ b/FreeRTOS/Demo/uIP_Demo_Rowley_ARM7/uip/cs8900a.c @@ -13,7 +13,7 @@ // based on linux-header by Russel Nelson #define PP_ChipID 0x0000 // offset 0h -> Corp-ID - + // offset 2h -> Model/Product Number #define LED_RED (1<<8) #define LED_GREEN (1<<10) @@ -274,15 +274,15 @@ cs8900a_write(unsigned addr, unsigned int data) GPIO_IOCLR = 0xf << 4; // Put address on bus GPIO_IOSET = addr << 4; - + GPIO_IOCLR = 0xff << 16; // Write low order byte to data bus GPIO_IOSET = data << 16; - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOCLR = IOW; // Toggle IOW-signal - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOSET = IOW; - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOCLR = 0xf << 4; GPIO_IOSET = ((addr | 1) << 4); // And put next address on bus @@ -290,11 +290,11 @@ cs8900a_write(unsigned addr, unsigned int data) GPIO_IOCLR = 0xff << 16; // Write high order byte to data bus GPIO_IOSET = data >> 8 << 16; - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOCLR = IOW; // Toggle IOW-signal - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOSET = IOW; - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); } // Reads a word in little-endian byte order from a specified port-address @@ -308,20 +308,20 @@ cs8900a_read(unsigned addr) GPIO_IOCLR = 0xf << 4; // Put address on bus GPIO_IOSET = addr << 4; - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOCLR = IOR; // IOR-signal low - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); value = (GPIO_IOPIN >> 16) & 0xff; // get low order byte from data bus GPIO_IOSET = IOR; GPIO_IOSET = 1 << 4; // IOR high and put next address on bus - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOCLR = IOR; // IOR-signal low - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); value |= ((GPIO_IOPIN >> 8) & 0xff00); // get high order byte from data bus GPIO_IOSET = IOR; // IOR-signal low - + return value; } @@ -336,17 +336,17 @@ cs8900a_read_addr_high_first(unsigned addr) GPIO_IOCLR = 0xf << 4; // Put address on bus GPIO_IOSET = (addr+1) << 4; - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOCLR = IOR; // IOR-signal low - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); value = ((GPIO_IOPIN >> 8) & 0xff00); // get high order byte from data bus GPIO_IOSET = IOR; // IOR-signal high GPIO_IOCLR = 1 << 4; // Put low address on bus - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOCLR = IOR; // IOR-signal low - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); value |= (GPIO_IOPIN >> 16) & 0xff; // get low order byte from data bus GPIO_IOSET = IOR; @@ -427,9 +427,9 @@ cs8900a_send(void) GPIO_IOCLR = 0xff << 16; // Write low order byte to data bus GPIO_IOSET = uip_buf[u] << 16; // write low order byte to data bus - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOCLR = IOW; // Toggle IOW-signal - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOSET = IOW; GPIO_IOCLR = 0xf << 4; // Put address on bus @@ -438,9 +438,9 @@ cs8900a_send(void) GPIO_IOCLR = 0xff << 16; // Write low order byte to data bus GPIO_IOSET = uip_buf[u+1] << 16; // write low order byte to data bus - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOCLR = IOW; // Toggle IOW-signal - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOSET = IOW; } @@ -461,9 +461,9 @@ cs8900a_send(void) GPIO_IOCLR = 0xff << 16; // Write low order byte to data bus GPIO_IOSET = uip_appdata[u] << 16; // write low order byte to data bus - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOCLR = IOW; // Toggle IOW-signal - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOSET = IOW; GPIO_IOCLR = 0xf << 4; // Put address on bus @@ -472,9 +472,9 @@ cs8900a_send(void) GPIO_IOCLR = 0xff << 16; // Write low order byte to data bus GPIO_IOSET = uip_appdata[u+1] << 16; // write low order byte to data bus - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOCLR = IOW; // Toggle IOW-signal - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOSET = IOW; } @@ -518,7 +518,7 @@ cs8900a_poll(void) GPIO_IODIR &= ~(0xff << 16); GPIO_IOCLR = 0xf << 4; // put address on bus - GPIO_IOSET = RX_FRAME_PORT << 4; + GPIO_IOSET = RX_FRAME_PORT << 4; // Read bytes into uip_buf u = 0; @@ -528,13 +528,13 @@ cs8900a_poll(void) GPIO_IOCLR = IOR; // IOR-signal low uip_buf[u] = GPIO_IOPIN >> 16; // get high order byte from data bus - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); GPIO_IOSET = IOR; // IOR-signal high GPIO_IOSET = 1 << 4; // put address on bus GPIO_IOCLR = IOR; // IOR-signal low - asm volatile ( "NOP" ); + __asm volatile ( "NOP" ); uip_buf[u+1] = GPIO_IOPIN >> 16; // get high order byte from data bus GPIO_IOSET = IOR; // IOR-signal high u += 2; diff --git a/FreeRTOS/Source/include/FreeRTOS.h b/FreeRTOS/Source/include/FreeRTOS.h index b2539f4b5..651bc3f45 100644 --- a/FreeRTOS/Source/include/FreeRTOS.h +++ b/FreeRTOS/Source/include/FreeRTOS.h @@ -708,6 +708,9 @@ typedef TickType_t EventBits_t; #define xTaskStatusType TaskStatus_t #define xTimerHandle TimerHandle_t #define xCoRoutineHandle CoRoutineHandle_t +#define xListItem ListItem_t +#define xList List_t +#define xTimeOutType TimeOut_t #endif /* INC_FREERTOS_H */ diff --git a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c index c293b6483..09626f593 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c +++ b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c @@ -1,5 +1,5 @@ /* - FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. + FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. All rights reserved VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. @@ -96,7 +96,7 @@ volatile uint32_t ulCriticalNesting = 9999UL; /* ISR to handle manual context switches (from a call to taskYIELD()). */ void vPortYieldProcessor( void ) __attribute__((interrupt("SWI"), naked)); -/* +/* * The scheduler can only be started from ARM mode, hence the inclusion of this * function here. */ @@ -114,17 +114,17 @@ void vPortISRStartFirstTask( void ) /* * Called by portYIELD() or taskYIELD() to manually force a context switch. * - * When a context switch is performed from the task level the saved task + * When a context switch is performed from the task level the saved task * context is made to look as if it occurred from within the tick ISR. This * way the same restore context function can be used when restoring the context * saved from the ISR or that saved from a call to vPortYieldProcessor. */ void vPortYieldProcessor( void ) { - /* Within an IRQ ISR the link register has an offset from the true return - address, but an SWI ISR does not. Add the offset manually so the same + /* Within an IRQ ISR the link register has an offset from the true return + address, but an SWI ISR does not. Add the offset manually so the same ISR return code can be used in both cases. */ - asm volatile ( "ADD LR, LR, #4" ); + __asm volatile ( "ADD LR, LR, #4" ); /* Perform the context switch. First save the context of the current task. */ portSAVE_CONTEXT(); @@ -133,32 +133,32 @@ void vPortYieldProcessor( void ) vTaskSwitchContext(); /* Restore the context of the new task. */ - portRESTORE_CONTEXT(); + portRESTORE_CONTEXT(); } /*-----------------------------------------------------------*/ -/* +/* * The ISR used for the scheduler tick depends on whether the cooperative or * the preemptive scheduler is being used. */ #if configUSE_PREEMPTION == 0 - /* The cooperative scheduler requires a normal IRQ service routine to + /* The cooperative scheduler requires a normal IRQ service routine to simply increment the system tick. */ void vNonPreemptiveTick( void ) __attribute__ ((interrupt ("IRQ"))); void vNonPreemptiveTick( void ) - { + { uint32_t ulDummy; - + /* Increment the tick count - which may wake some tasks but as the preemptive scheduler is not being used any woken task is not given processor time no matter what its priority. */ xTaskIncrementTick(); - + /* Clear the PIT interrupt. */ ulDummy = AT91C_BASE_PITC->PITC_PIVR; - + /* End the interrupt in the AIC. */ AT91C_BASE_AIC->AIC_EOICR = ulDummy; } @@ -171,7 +171,7 @@ void vPortYieldProcessor( void ) void vPreemptiveTick( void ) { /* Save the context of the current task. */ - portSAVE_CONTEXT(); + portSAVE_CONTEXT(); /* Increment the tick count - this may wake a task. */ if( xTaskIncrementTick() != pdFALSE ) @@ -179,10 +179,10 @@ void vPortYieldProcessor( void ) /* Find the highest priority task that is ready to run. */ vTaskSwitchContext(); } - + /* End the interrupt in the AIC. */ AT91C_BASE_AIC->AIC_EOICR = AT91C_BASE_PITC->PITC_PIVR;; - + portRESTORE_CONTEXT(); } @@ -200,7 +200,7 @@ void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked)); void vPortDisableInterruptsFromThumb( void ) { - asm volatile ( + __asm volatile ( "STMDB SP!, {R0} \n\t" /* Push R0. */ "MRS R0, CPSR \n\t" /* Get CPSR. */ "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ @@ -208,14 +208,14 @@ void vPortDisableInterruptsFromThumb( void ) "LDMIA SP!, {R0} \n\t" /* Pop R0. */ "BX R14" ); /* Return back to thumb. */ } - + void vPortEnableInterruptsFromThumb( void ) { - asm volatile ( - "STMDB SP!, {R0} \n\t" /* Push R0. */ - "MRS R0, CPSR \n\t" /* Get CPSR. */ - "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ - "MSR CPSR, R0 \n\t" /* Write back modified value. */ + __asm volatile ( + "STMDB SP!, {R0} \n\t" /* Push R0. */ + "MRS R0, CPSR \n\t" /* Get CPSR. */ + "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ + "MSR CPSR, R0 \n\t" /* Write back modified value. */ "LDMIA SP!, {R0} \n\t" /* Pop R0. */ "BX R14" ); /* Return back to thumb. */ } @@ -228,14 +228,14 @@ in a variable, which is then saved as part of the stack context. */ void vPortEnterCritical( void ) { /* Disable interrupts as per portDISABLE_INTERRUPTS(); */ - asm volatile ( + __asm volatile ( "STMDB SP!, {R0} \n\t" /* Push R0. */ "MRS R0, CPSR \n\t" /* Get CPSR. */ "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ "MSR CPSR, R0 \n\t" /* Write back modified value. */ "LDMIA SP!, {R0}" ); /* Pop R0. */ - /* Now interrupts are disabled ulCriticalNesting can be accessed + /* Now interrupts are disabled ulCriticalNesting can be accessed directly. Increment ulCriticalNesting to keep a count of how many times portENTER_CRITICAL() has been called. */ ulCriticalNesting++; @@ -253,11 +253,11 @@ void vPortExitCritical( void ) if( ulCriticalNesting == portNO_CRITICAL_NESTING ) { /* Enable interrupts as per portEXIT_CRITICAL(). */ - asm volatile ( - "STMDB SP!, {R0} \n\t" /* Push R0. */ - "MRS R0, CPSR \n\t" /* Get CPSR. */ - "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ - "MSR CPSR, R0 \n\t" /* Write back modified value. */ + __asm volatile ( + "STMDB SP!, {R0} \n\t" /* Push R0. */ + "MRS R0, CPSR \n\t" /* Get CPSR. */ + "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ + "MSR CPSR, R0 \n\t" /* Write back modified value. */ "LDMIA SP!, {R0}" ); /* Pop R0. */ } } diff --git a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h index b93c1c103..a7e50ea24 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h @@ -129,7 +129,7 @@ typedef unsigned long UBaseType_t; #define portSTACK_GROWTH ( -1 ) #define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portBYTE_ALIGNMENT 8 -#define portNOP() asm volatile ( "NOP" ); +#define portNOP() __asm volatile ( "NOP" ); /*-----------------------------------------------------------*/ @@ -148,7 +148,7 @@ extern volatile void * volatile pxCurrentTCB; \ extern volatile uint32_t ulCriticalNesting; \ \ /* Set the LR to the task stack. */ \ - asm volatile ( \ + __asm volatile ( \ "LDR R0, =pxCurrentTCB \n\t" \ "LDR R0, [R0] \n\t" \ "LDR LR, [R0] \n\t" \ @@ -185,7 +185,7 @@ extern volatile void * volatile pxCurrentTCB; \ extern volatile uint32_t ulCriticalNesting; \ \ /* Push R0 as we are going to use the register. */ \ - asm volatile ( \ + __asm volatile ( \ "STMDB SP!, {R0} \n\t" \ \ /* Set R0 to point to the task stack pointer. */ \ @@ -227,7 +227,7 @@ extern volatile uint32_t ulCriticalNesting; \ #define portYIELD_FROM_ISR() vTaskSwitchContext() -#define portYIELD() asm volatile ( "SWI 0" ) +#define portYIELD() __asm volatile ( "SWI 0" ) /*-----------------------------------------------------------*/ @@ -251,7 +251,7 @@ extern volatile uint32_t ulCriticalNesting; \ #else #define portDISABLE_INTERRUPTS() \ - asm volatile ( \ + __asm volatile ( \ "STMDB SP!, {R0} \n\t" /* Push R0. */ \ "MRS R0, CPSR \n\t" /* Get CPSR. */ \ "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \ @@ -259,7 +259,7 @@ extern volatile uint32_t ulCriticalNesting; \ "LDMIA SP!, {R0} " ) /* Pop R0. */ #define portENABLE_INTERRUPTS() \ - asm volatile ( \ + __asm volatile ( \ "STMDB SP!, {R0} \n\t" /* Push R0. */ \ "MRS R0, CPSR \n\t" /* Get CPSR. */ \ "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ \ diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c index cd7681098..6ea767cbf 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c @@ -282,7 +282,7 @@ BaseType_t xPortStartScheduler( void ) #if( configASSERT_DEFINED == 1 ) { volatile uint32_t ulOriginalPriority; - volatile int8_t * const pcFirstUserPriorityRegister = ( volatile int8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); + volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API @@ -291,14 +291,14 @@ BaseType_t xPortStartScheduler( void ) ensure interrupt entry is as fast and simple as possible. Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pcFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all possible bits. */ - *pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE; + *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pcFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; @@ -319,7 +319,7 @@ BaseType_t xPortStartScheduler( void ) /* Restore the clobbered interrupt priority register to its original value. */ - *pcFirstUserPriorityRegister = ulOriginalPriority; + *pucFirstUserPriorityRegister = ulOriginalPriority; } #endif /* conifgASSERT_DEFINED */ diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c index a75cebfd1..fff011dcf 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c @@ -300,7 +300,7 @@ BaseType_t xPortStartScheduler( void ) #if( configASSERT_DEFINED == 1 ) { volatile uint32_t ulOriginalPriority; - volatile int8_t * const pcFirstUserPriorityRegister = ( volatile int8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); + volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API @@ -309,14 +309,14 @@ BaseType_t xPortStartScheduler( void ) ensure interrupt entry is as fast and simple as possible. Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pcFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all possible bits. */ - *pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE; + *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pcFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; @@ -337,7 +337,7 @@ BaseType_t xPortStartScheduler( void ) /* Restore the clobbered interrupt priority register to its original value. */ - *pcFirstUserPriorityRegister = ulOriginalPriority; + *pucFirstUserPriorityRegister = ulOriginalPriority; } #endif /* conifgASSERT_DEFINED */ diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c index cb5a6e985..fb66670e6 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c @@ -238,7 +238,7 @@ BaseType_t xPortStartScheduler( void ) #if( configASSERT_DEFINED == 1 ) { volatile uint32_t ulOriginalPriority; - volatile int8_t * const pcFirstUserPriorityRegister = ( volatile int8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); + volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API @@ -247,14 +247,14 @@ BaseType_t xPortStartScheduler( void ) ensure interrupt entry is as fast and simple as possible. Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pcFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all possible bits. */ - *pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE; + *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pcFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; @@ -275,7 +275,7 @@ BaseType_t xPortStartScheduler( void ) /* Restore the clobbered interrupt priority register to its original value. */ - *pcFirstUserPriorityRegister = ulOriginalPriority; + *pucFirstUserPriorityRegister = ulOriginalPriority; } #endif /* conifgASSERT_DEFINED */ diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c index 258d76173..6fcb6a9f5 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c @@ -111,7 +111,7 @@ #define portFIRST_USER_INTERRUPT_NUMBER ( 16 ) #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 ) #define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) ) -#define portMAX_8_BIT_VALUE ( ( int8_t ) 0xff ) +#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff ) #define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 ) #define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 ) #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL ) @@ -258,7 +258,7 @@ BaseType_t xPortStartScheduler( void ) #if( configASSERT_DEFINED == 1 ) { volatile uint32_t ulOriginalPriority; - volatile int8_t * const pcFirstUserPriorityRegister = ( volatile int8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); + volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API @@ -267,14 +267,14 @@ BaseType_t xPortStartScheduler( void ) ensure interrupt entry is as fast and simple as possible. Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pcFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all possible bits. */ - *pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE; + *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pcFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; @@ -295,7 +295,7 @@ BaseType_t xPortStartScheduler( void ) /* Restore the clobbered interrupt priority register to its original value. */ - *pcFirstUserPriorityRegister = ulOriginalPriority; + *pucFirstUserPriorityRegister = ulOriginalPriority; } #endif /* conifgASSERT_DEFINED */ diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c b/FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c index 35124d7ac..e54b7673f 100644 --- a/FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c +++ b/FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c @@ -284,7 +284,7 @@ BaseType_t xPortStartScheduler( void ) #if( configASSERT_DEFINED == 1 ) { volatile uint32_t ulOriginalPriority; - volatile int8_t * const pcFirstUserPriorityRegister = ( int8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); + volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API @@ -293,14 +293,14 @@ BaseType_t xPortStartScheduler( void ) ensure interrupt entry is as fast and simple as possible. Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pcFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all possible bits. */ - *pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE; + *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pcFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; @@ -321,7 +321,7 @@ BaseType_t xPortStartScheduler( void ) /* Restore the clobbered interrupt priority register to its original value. */ - *pcFirstUserPriorityRegister = ulOriginalPriority; + *pucFirstUserPriorityRegister = ulOriginalPriority; } #endif /* conifgASSERT_DEFINED */ diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c b/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c index 61cbde758..e2bdaad7f 100644 --- a/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c +++ b/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c @@ -322,7 +322,7 @@ BaseType_t xPortStartScheduler( void ) #if( configASSERT_DEFINED == 1 ) { volatile uint32_t ulOriginalPriority; - volatile int8_t * const pcFirstUserPriorityRegister = ( int8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); + volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API @@ -331,14 +331,14 @@ BaseType_t xPortStartScheduler( void ) ensure interrupt entry is as fast and simple as possible. Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pcFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all possible bits. */ - *pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE; + *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pcFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; @@ -359,7 +359,7 @@ BaseType_t xPortStartScheduler( void ) /* Restore the clobbered interrupt priority register to its original value. */ - *pcFirstUserPriorityRegister = ulOriginalPriority; + *pucFirstUserPriorityRegister = ulOriginalPriority; } #endif /* conifgASSERT_DEFINED */ -- 2.39.5