From 06de0701302488b4ac08f6e6d7bb9b8fcc92f5c2 Mon Sep 17 00:00:00 2001 From: Stefan Mavrodiev Date: Sat, 29 Oct 2016 14:34:07 +0200 Subject: [PATCH] sunxi: Update DRAM clock for Olimex A20 boards Originally dram clock was set to 480MHz, but this behaves unstable. To improve stability the clock is reduced to 384MHz Signed-off-by: Stefan Mavrodiev Reviewed-by: Hans de Goede Signed-off-by: Hans de Goede --- configs/A20-Olimex-SOM-EVB_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig index 7a14a7b9b2..3f4e90db4a 100644 --- a/configs/A20-Olimex-SOM-EVB_defconfig +++ b/configs/A20-Olimex-SOM-EVB_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_MACH_SUN7I=y -CONFIG_DRAM_CLK=480 +CONFIG_DRAM_CLK=384 CONFIG_MMC0_CD_PIN="PH1" CONFIG_MMC3_CD_PIN="PH0" CONFIG_MMC3_PINS="PH" -- 2.39.5