From 0812a1d3e5d056b012d6a9b4b2e83469440f7018 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Mon, 30 Mar 2015 17:01:05 -0500 Subject: [PATCH] arm: socfpga: spl: enable sdram, timer and uart Add the calls in the spl_board_init to enable SDRAM, timer, and UART. Signed-off-by: Dinh Nguyen Acked-by: Marek Vasut --- arch/arm/cpu/armv7/socfpga/spl.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/cpu/armv7/socfpga/spl.c index 6a8c15d91f..a4dbe4ffe6 100644 --- a/arch/arm/cpu/armv7/socfpga/spl.c +++ b/arch/arm/cpu/armv7/socfpga/spl.c @@ -144,6 +144,10 @@ void spl_board_init(void) /* freeze all IO banks */ sys_mgr_frzctrl_freeze_req(); + socfpga_sdram_enable(); + socfpga_uart0_enable(); + socfpga_osc1timer_enable(); + debug("Reconfigure Clock Manager\n"); /* reconfigure the PLLs */ cm_basic_init(&cm_default_cfg); -- 2.39.5