From 095ff3d2103f9e8089b5b1fb0816d43874014e08 Mon Sep 17 00:00:00 2001 From: Matthias Welwarsky Date: Sun, 27 Nov 2016 11:39:47 +0100 Subject: [PATCH] armv8: load aarch32 register through aarch64 equivalent The aarch32 register cache is only a separate view of the aarch64 registers. Load aarch32 registers through their aarch64 equivalents. Change-Id: I3e932dfb782f03d73d30d942b24db340a5749e47 Signed-off-by: Matthias Welwarsky Reviewed-on: http://openocd.zylin.com/3988 Tested-by: jenkins Reviewed-by: Paul Fertser --- src/target/armv8.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/src/target/armv8.c b/src/target/armv8.c index 7ae8cc9e..00ab6ed1 100644 --- a/src/target/armv8.c +++ b/src/target/armv8.c @@ -1093,7 +1093,7 @@ static int armv8_get_core_reg32(struct reg *reg) return ERROR_OK; } - retval = arm->read_core_reg(target, reg, armv8_reg->num, arm->core_mode); + retval = arm->read_core_reg(target, reg64, armv8_reg->num, arm->core_mode); if (retval == ERROR_OK) reg->valid = reg64->valid; @@ -1109,9 +1109,6 @@ static int armv8_set_core_reg32(struct reg *reg, uint8_t *buf) struct reg *reg64 = cache->reg_list + armv8_reg->num; uint32_t value = buf_get_u32(buf, 0, 32); - if (target->state != TARGET_HALTED) - return ERROR_TARGET_NOT_HALTED; - if (reg64 == arm->cpsr) { armv8_set_cpsr(arm, value); } else { @@ -1250,7 +1247,7 @@ int armv8_get_gdb_reg_list(struct target *target, if (arm->core_state == ARM_STATE_AARCH64) { - LOG_DEBUG("Creating Aarch64 register list"); + LOG_DEBUG("Creating Aarch64 register list for target %s", target_name(target)); switch (reg_class) { case REG_CLASS_GENERAL: @@ -1277,7 +1274,7 @@ int armv8_get_gdb_reg_list(struct target *target, } else { struct reg_cache *cache32 = arm->core_cache->next; - LOG_DEBUG("Creating Aarch32 register list"); + LOG_DEBUG("Creating Aarch32 register list for target %s", target_name(target)); switch (reg_class) { case REG_CLASS_GENERAL: -- 2.39.5