From 0da2f750a1d437b50b21ac7ee766188a47b37fad Mon Sep 17 00:00:00 2001
From: dbrownell <dbrownell@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Date: Tue, 6 Oct 2009 22:56:52 +0000
Subject: [PATCH] Add basic support for DM6446 EVM board.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2808 b42882b7-edfa-0310-969c-e2dbd0fdcd60
---
 tcl/board/dm6446evm.cfg | 74 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 74 insertions(+)
 create mode 100644 tcl/board/dm6446evm.cfg

diff --git a/tcl/board/dm6446evm.cfg b/tcl/board/dm6446evm.cfg
new file mode 100644
index 00000000..39607fe3
--- /dev/null
+++ b/tcl/board/dm6446evm.cfg
@@ -0,0 +1,74 @@
+# DM6446 EVM board
+#   http://focus.ti.com/docs/toolsw/folders/print/tmdsevm6446.html
+#   http://c6000.spectrumdigital.com/davincievm/
+# EVM is just the board; buy that at Spectrum.
+# The "kit" from TI also has: video camera, LCD video monitor, more.
+
+source [find target/ti_dm6446.cfg]
+
+# J4 controls what CS2 hooks up to, usually NOR or NAND flash.
+# S3.1/S3.2 controls boot mode, which may force J4 and S3.3 settings.
+# S3.3 controls AEMIF bus width.
+
+if { [info exists J4_OPTION] } {
+	# NOR, NAND, SRAM, ...
+	set CS2_MODE $J4_OPTION
+} else {
+	set CS2_MODE ""
+}
+
+# ARM boot:
+#  S3.1 = 0, S3.2 = 0	==> ROM/UBL boot via NAND (J4 == NAND)
+#  S3.1 = 1, S3.2 = 0	==> AEMIF boot (J4 == NOR or SRAM)
+#  S3.1 = 0, S3.2 = 1	==> ROM/UBL boot via HPI
+#  S3.1 = 1, S3.2 = 1	==> ROM/UBL boot via UART (J4 == don't care)
+# AEMIF bus width:
+#  S3.3 = 0		==> 8 bit bus width
+#  S3.3 = 1		==> 16 bit bus width
+# DSP boot:
+#  S3.4 = 0		==> controlled by ARM
+
+if { $CS2_MODE == "NOR" } {
+	# 16 Mbytes address space; 16 bit bus width
+	# (older boards used 32MB parts, with upper 16 MB unusable)
+	flash bank cfi 0x02000000 0x01000000 2 2 $_TARGETNAME
+	proc flashprobe {} { flash probe 0 }
+} elseif { $CS2_MODE == "NAND" } {
+	# 64 Mbyte small page; 8 bit bus width
+	nand device davinci $_TARGETNAME 0x02000000 hwecc1 0x01e00000
+	proc flashprobe {} { nand probe 0 }
+} elseif { $CS2_MODE == "SRAM" } {
+	# 4 Mbyte address space; 16 bit bus width
+	# loaded via JTAG or HPI
+	proc flashprobe {} {}
+} else {
+	# maybe it's HPI boot?  can't tell...
+	echo "WARNING:  CS2/flash configuration not recognized"
+	proc flashprobe {} {}
+}
+
+# NOTE:  disable or replace this call to dm6446evm_init if you're
+# debugging new UBL code from SRAM (for NAND boot).
+$_TARGETNAME configure -event reset-init { dm6446evm_init }
+
+#
+# This post-reset init is called when the MMU isn't active, all IRQs
+# are disabled, etc.  It should do most of what a UBL does, except for
+# loading code (like U-Boot) into DRAM and running it.
+#
+proc dm6446evm_init {} {
+
+	puts "Initialize DM6446 EVM board"
+
+	# FIXME initialize everything:
+	#  - PLL1
+	#  - PLL2
+	#  - PINMUX
+	#  - PSC
+	#  - DDR
+	#  - AEMIF
+	#  - UART0
+	#  - icache
+
+	flashprobe
+}
-- 
2.39.5