From 10a28644941327dc26760bc06294a5f588b46d30 Mon Sep 17 00:00:00 2001 From: Ramneek Mehresh Date: Fri, 29 May 2015 14:47:21 +0530 Subject: [PATCH] ls1021atwr: Enable USB IP support Enable USB IP support for both EHCI and XHCI for ls1021atwr platform Signed-off-by: Ramneek Mehresh --- include/configs/ls1021atwr.h | 38 ++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index d0432c35ac..cf2aaa3651 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -27,6 +27,44 @@ #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE +/* + * USB + */ + +/* + * EHCI Support - disbaled by default as + * there is no signal coming out of soc on + * this board for this controller. However, + * the silicon still has this controller, + * and anyone can use this controller by + * taking signals out on their board. + */ + +/*#define CONFIG_HAS_FSL_DR_USB*/ + +#ifdef CONFIG_HAS_FSL_DR_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#endif + +/* XHCI Support - enabled by default */ +#define CONFIG_HAS_FSL_XHCI_USB + +#ifdef CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_XHCI +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#endif + +#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB) +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_EXT2 +#endif + /* * Generic Timer Definitions */ -- 2.39.5