From 1482c26a4e656eaa35712895024a56303f4ba7ea Mon Sep 17 00:00:00 2001 From: Matthias Welwarsky Date: Thu, 6 Apr 2017 11:06:20 +0200 Subject: [PATCH] aarch64: simplify mode and state handling Aarch32 and Aarch64 modes don't conflict in CPSR, no need to deconflict ARMv7-M profile modes either. Change-Id: I4c437dfa657f9e8a1da3687bc9f21435384b7881 Signed-off-by: Matthias Welwarsky Reviewed-on: http://openocd.zylin.com/4144 Tested-by: jenkins Reviewed-by: Yao Qi Reviewed-by: Matthias Welwarsky --- src/target/arm.h | 15 +++++------ src/target/armv8.c | 58 +++++------------------------------------- src/target/armv8.h | 2 +- src/target/armv8_dpm.c | 7 +---- 4 files changed, 16 insertions(+), 66 deletions(-) diff --git a/src/target/arm.h b/src/target/arm.h index f89aa688..eb4a51f9 100644 --- a/src/target/arm.h +++ b/src/target/arm.h @@ -66,14 +66,13 @@ enum arm_mode { ARM_MODE_USER_THREAD = 1, ARM_MODE_HANDLER = 2, - /* shift left 4 bits for armv8 64 */ - ARMV8_64_EL0T = 0x0F, - ARMV8_64_EL1T = 0x4F, - ARMV8_64_EL1H = 0x5F, - ARMV8_64_EL2T = 0x8F, - ARMV8_64_EL2H = 0x9F, - ARMV8_64_EL3T = 0xCF, - ARMV8_64_EL3H = 0xDF, + ARMV8_64_EL0T = 0x0, + ARMV8_64_EL1T = 0x4, + ARMV8_64_EL1H = 0x5, + ARMV8_64_EL2T = 0x8, + ARMV8_64_EL2H = 0x9, + ARMV8_64_EL3T = 0xC, + ARMV8_64_EL3H = 0xD, ARM_MODE_ANY = -1 }; diff --git a/src/target/armv8.c b/src/target/armv8.c index df5e2510..1b8e4501 100644 --- a/src/target/armv8.c +++ b/src/target/armv8.c @@ -45,8 +45,6 @@ static const struct { const char *name; unsigned psr; } armv8_mode_data[] = { - /* These special modes are currently only supported - * by ARMv6M and ARMv7M profiles */ { .name = "USR", .psr = ARM_MODE_USR, @@ -112,48 +110,6 @@ const char *armv8_mode_name(unsigned psr_mode) return "UNRECOGNIZED"; } -int armv8_mode_to_number(enum arm_mode mode) -{ - switch (mode) { - case ARM_MODE_ANY: - /* map MODE_ANY to user mode */ - case ARM_MODE_USR: - return 0; - case ARM_MODE_FIQ: - return 1; - case ARM_MODE_IRQ: - return 2; - case ARM_MODE_SVC: - return 3; - case ARM_MODE_ABT: - return 4; - case ARM_MODE_UND: - return 5; - case ARM_MODE_SYS: - return 6; - case ARM_MODE_MON: - return 7; - case ARMV8_64_EL0T: - return 8; - case ARMV8_64_EL1T: - return 9; - case ARMV8_64_EL1H: - return 10; - case ARMV8_64_EL2T: - return 11; - case ARMV8_64_EL2H: - return 12; - case ARMV8_64_EL3T: - return 13; - case ARMV8_64_EL3H: - return 14; - - default: - LOG_ERROR("invalid mode value encountered %d", mode); - return -1; - } -} - static int armv8_read_reg(struct armv8_common *armv8, int regnum, uint64_t *regval) { struct arm_dpm *dpm = &armv8->dpm; @@ -533,9 +489,8 @@ void armv8_set_cpsr(struct arm *arm, uint32_t cpsr) /* Older ARMs won't have the J bit */ enum arm_state state = 0xFF; - if (((cpsr & 0x10) >> 4) == 0) { - state = ARM_STATE_AARCH64; - } else { + if ((cpsr & 0x10) != 0) { + /* Aarch32 state */ if (cpsr & (1 << 5)) { /* T */ if (cpsr & (1 << 24)) { /* J */ LOG_WARNING("ThumbEE -- incomplete support"); @@ -549,12 +504,13 @@ void armv8_set_cpsr(struct arm *arm, uint32_t cpsr) } else state = ARM_STATE_ARM; } + } else { + /* Aarch64 state */ + state = ARM_STATE_AARCH64; } + arm->core_state = state; - if (arm->core_state == ARM_STATE_AARCH64) - arm->core_mode = (mode << 4) | 0xf; - else - arm->core_mode = mode; + arm->core_mode = mode; LOG_DEBUG("set CPSR %#8.8x: %s mode, %s state", (unsigned) cpsr, armv8_mode_name(arm->core_mode), diff --git a/src/target/armv8.h b/src/target/armv8.h index 02663cab..0f3e66f6 100644 --- a/src/target/armv8.h +++ b/src/target/armv8.h @@ -270,7 +270,7 @@ static inline unsigned int armv8_curel_from_core_mode(enum arm_mode core_mode) return 3; /* all Aarch64 modes */ default: - return (core_mode >> 6) & 3; + return (core_mode >> 2) & 3; } } diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c index f4e7a079..c79b1a0f 100644 --- a/src/target/armv8_dpm.c +++ b/src/target/armv8_dpm.c @@ -561,12 +561,7 @@ int armv8_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode) } else { LOG_DEBUG("setting mode 0x%"PRIx32, mode); - - /* else force to the specified mode */ - if (is_arm_mode(mode)) - cpsr = mode; - else - cpsr = mode >> 4; + cpsr = mode; } switch (cpsr & 0x1f) { -- 2.39.5