From 196516047b2160dce14470e44207d5a7f098c3c8 Mon Sep 17 00:00:00 2001 From: rtel Date: Thu, 19 Jan 2017 04:11:21 +0000 Subject: [PATCH] Update BSP source files for UltraScale Cortex-A53 and Cortex-R5 and Microblaze to the 2016.4 versions. Correct alignment issue in GCC Cortex-R port that was preventing full floating point usage in interrupts (other ports will be updated likewise). Update the UltraScale R5 demo to test the GCC Cortex-A9 port layer modification mentioned on the line above. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2480 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- .../RTOSDemo_A53/.cproject | 9 +- .../RTOSDemo_A53/src/main.c | 58 - .../psu_cortexa53_0/include/xparameters.h | 102 +- .../libsrc/axipmon_v6_4/src/xaxipmon_g.c | 2 +- .../libsrc/canps_v3_1/src/xcanps_g.c | 2 +- .../libsrc/csudma_v1_0/src/xcsudma_g.c | 2 +- .../libsrc/emacps_v3_2/src/xemacps_g.c | 2 +- .../libsrc/gpiops_v3_1/src/xgpiops_g.c | 2 +- .../libsrc/iicps_v3_1/src/xiicps_g.c | 2 +- .../libsrc/ipipsu_v2_0/src/xipipsu_g.c | 114 +- .../libsrc/qspipsu_v1_0/src/xqspipsu_g.c | 2 +- .../libsrc/rtcpsu_v1_2/src/xrtcpsu_g.c | 2 +- .../libsrc/scugic_v3_2/src/xscugic_g.c | 2 +- .../libsrc/sdps_v2_7/src/xsdps_g.c | 2 +- .../libsrc/standalone_v5_4/src/bspconfig.h | 2 +- .../libsrc/sysmonpsu_v1_0/src/xsysmonpsu_g.c | 2 +- .../libsrc/ttcps_v3_1/src/xttcps_g.c | 2 +- .../libsrc/uartps_v3_1/src/xuartps_g.c | 2 +- .../libsrc/wdtps_v3_0/src/xwdtps_g.c | 2 +- .../libsrc/zdma_v1_1/src/xzdma_g.c | 2 +- .../RTOSDemo_R5/src/Full_Demo/main_full.c | 17 + .../RTOSDemo_R5_bsp/.cproject | 4 +- .../RTOSDemo_R5_bsp/.project | 2 +- .../RTOSDemo_R5_bsp/Makefile | 4 +- .../psu_cortexr5_0/include/xparameters.h | 187 ++- .../src/Makefile | 0 .../src/xaxipmon.c | 0 .../src/xaxipmon.h | 0 .../src/xaxipmon_g.c | 2 +- .../src/xaxipmon_hw.h | 0 .../src/xaxipmon_selftest.c | 0 .../src/xaxipmon_sinit.c | 0 .../{canps_v3_1 => canps_v3_2}/src/Makefile | 0 .../{canps_v3_1 => canps_v3_2}/src/xcanps.c | 0 .../{canps_v3_1 => canps_v3_2}/src/xcanps.h | 0 .../{canps_v3_1 => canps_v3_2}/src/xcanps_g.c | 2 +- .../src/xcanps_hw.c | 0 .../src/xcanps_hw.h | 0 .../src/xcanps_intr.c | 0 .../src/xcanps_selftest.c | 2 +- .../src/xcanps_sinit.c | 0 .../src/Makefile | 0 .../src/xcoresightpsdcc.c | 9 +- .../src/xcoresightpsdcc.h | 6 +- .../{csudma_v1_0 => csudma_v1_1}/src/Makefile | 0 .../src/xcsudma.c | 6 + .../src/xcsudma.h | 2 + .../src/xcsudma_g.c | 2 +- .../src/xcsudma_hw.h | 0 .../src/xcsudma_intr.c | 0 .../src/xcsudma_selftest.c | 0 .../src/xcsudma_sinit.c | 0 .../libsrc/ddrcpsu_v1_1/src/Makefile | 40 + .../libsrc/ddrcpsu_v1_1/src/xddrcpsu.h | 66 + .../{emacps_v3_2 => emacps_v3_3}/src/Makefile | 0 .../src/xemacps.c | 0 .../src/xemacps.h | 0 .../src/xemacps_bd.h | 0 .../src/xemacps_bdring.c | 0 .../src/xemacps_bdring.h | 0 .../src/xemacps_control.c | 0 .../src/xemacps_g.c | 2 +- .../src/xemacps_hw.c | 0 .../src/xemacps_hw.h | 0 .../src/xemacps_intr.c | 0 .../src/xemacps_sinit.c | 0 .../libsrc/gpiops_v3_1/src/xgpiops_g.c | 2 +- .../{iicps_v3_1 => iicps_v3_4}/src/Makefile | 0 .../{iicps_v3_1 => iicps_v3_4}/src/xiicps.c | 7 +- .../{iicps_v3_1 => iicps_v3_4}/src/xiicps.h | 3 +- .../{iicps_v3_1 => iicps_v3_4}/src/xiicps_g.c | 2 +- .../src/xiicps_hw.c | 2 +- .../src/xiicps_hw.h | 2 +- .../src/xiicps_intr.c | 2 +- .../src/xiicps_master.c | 68 +- .../src/xiicps_options.c | 17 +- .../src/xiicps_selftest.c | 2 +- .../src/xiicps_sinit.c | 2 +- .../src/xiicps_slave.c | 27 +- .../{ipipsu_v2_0 => ipipsu_v2_1}/src/Makefile | 0 .../src/xipipsu.c | 31 +- .../src/xipipsu.h | 6 +- .../src/xipipsu_g.c | 2 +- .../src/xipipsu_hw.h | 5 +- .../src/xipipsu_sinit.c | 7 +- .../src/Makefile | 0 .../src/xqspipsu.c | 260 +++- .../src/xqspipsu.h | 32 +- .../src/xqspipsu_g.c | 2 +- .../src/xqspipsu_hw.h | 39 +- .../src/xqspipsu_options.c | 180 ++- .../src/xqspipsu_sinit.c | 0 .../{rtcpsu_v1_2 => rtcpsu_v1_3}/src/Makefile | 0 .../src/xrtcpsu.c | 90 ++ .../src/xrtcpsu.h | 11 +- .../src/xrtcpsu_g.c | 2 +- .../src/xrtcpsu_hw.h | 0 .../src/xrtcpsu_intr.c | 10 + .../src/xrtcpsu_selftest.c | 0 .../src/xrtcpsu_sinit.c | 0 .../{scugic_v3_2 => scugic_v3_5}/src/Makefile | 0 .../src/xscugic.c | 189 ++- .../src/xscugic.h | 18 + .../src/xscugic_g.c | 2 +- .../src/xscugic_hw.c | 0 .../src/xscugic_hw.h | 0 .../src/xscugic_intr.c | 0 .../src/xscugic_selftest.c | 0 .../src/xscugic_sinit.c | 0 .../{sdps_v2_7 => sdps_v3_1}/src/Makefile | 0 .../{sdps_v2_7 => sdps_v3_1}/src/xsdps.c | 198 ++- .../{sdps_v2_7 => sdps_v3_1}/src/xsdps.h | 31 +- .../{sdps_v2_7 => sdps_v3_1}/src/xsdps_g.c | 7 +- .../{sdps_v2_7 => sdps_v3_1}/src/xsdps_hw.h | 71 +- .../src/xsdps_options.c | 543 +++++-- .../src/xsdps_sinit.c | 2 +- .../libsrc/standalone_v5_4/src/xil_io.h | 244 --- .../src/Makefile | 0 .../src/_exit.c | 53 +- .../src/_open.c | 5 +- .../src/_sbrk.c | 2 +- .../src/abort.c | 2 +- .../src/asm_vectors.S | 15 +- .../src/boot.S | 8 + .../src/bspconfig.h | 2 +- .../src/changelog.txt | 78 + .../src/close.c | 4 +- .../src/config.make | 0 .../src/cpu_init.S | 0 .../src/errno.c | 2 +- .../src/fcntl.c | 4 +- .../src/fstat.c | 2 +- .../src/getpid.c | 2 +- .../src/inbyte.c | 0 .../src/includes_ps/xddr_xmpu0_cfg.h | 0 .../src/includes_ps/xddr_xmpu1_cfg.h | 0 .../src/includes_ps/xddr_xmpu2_cfg.h | 0 .../src/includes_ps/xddr_xmpu3_cfg.h | 0 .../src/includes_ps/xddr_xmpu4_cfg.h | 0 .../src/includes_ps/xddr_xmpu5_cfg.h | 0 .../src/includes_ps/xfpd_slcr.h | 0 .../src/includes_ps/xfpd_slcr_secure.h | 0 .../src/includes_ps/xfpd_xmpu_cfg.h | 0 .../src/includes_ps/xfpd_xmpu_sink.h | 0 .../src/includes_ps/xiou_secure_slcr.h | 0 .../src/includes_ps/xiou_slcr.h | 1350 ++++++++--------- .../src/includes_ps/xlpd_slcr.h | 0 .../src/includes_ps/xlpd_slcr_secure.h | 0 .../src/includes_ps/xlpd_xppu.h | 0 .../src/includes_ps/xlpd_xppu_sink.h | 0 .../src/includes_ps/xocm_xmpu_cfg.h | 0 .../src/isatty.c | 2 +- .../src/kill.c | 8 +- .../src/lseek.c | 2 +- .../src/mpu.c | 10 +- .../src/open.c | 6 +- .../src/outbyte.c | 0 .../src/print.c | 2 +- .../src/putnum.c | 4 +- .../src/read.c | 49 +- .../src/sbrk.c | 2 +- .../src/sleep.c | 5 +- .../src/sleep.h | 13 +- .../src/uart.c | 0 .../src/unlink.c | 2 +- .../src/usleep.c | 5 +- .../src/vectors.c | 71 +- .../src/vectors.h | 19 +- .../src/write.c | 20 +- .../src/xbasic_types.h | 0 .../src/xdebug.h | 0 .../src/xenv.h | 0 .../src/xenv_standalone.h | 0 .../src/xil-crt0.S | 19 + .../src/xil_assert.c | 6 +- .../src/xil_assert.h | 4 +- .../src/xil_cache.c | 0 .../src/xil_cache.h | 0 .../src/xil_cache_vxworks.h | 0 .../src/xil_exception.c | 137 +- .../src/xil_exception.h | 48 +- .../src/xil_hal.h | 0 .../libsrc/standalone_v6_1/src/xil_io.c | 107 ++ .../xil_io.c => standalone_v6_1/src/xil_io.h} | 321 ++-- .../src/xil_macroback.h | 0 .../src/xil_mmu.h | 0 .../src/xil_mpu.c | 0 .../src/xil_mpu.h | 0 .../src/xil_printf.c | 84 +- .../src/xil_printf.h | 0 .../src/xil_testcache.c | 0 .../src/xil_testcache.h | 0 .../src/xil_testio.c | 0 .../src/xil_testio.h | 0 .../src/xil_testmem.c | 0 .../src/xil_testmem.h | 0 .../src/xil_types.h | 0 .../src/xparameters_ps.h | 92 +- .../src/xplatform_info.c | 4 +- .../src/xplatform_info.h | 0 .../src/xpm_counter.c | 0 .../src/xpm_counter.h | 0 .../src/xpseudo_asm.h | 0 .../src/xpseudo_asm_gcc.h | 78 +- .../src/xreg_cortexr5.h | 0 .../src/xstatus.h | 6 +- .../src/xtime_l.c | 29 +- .../src/xtime_l.h | 0 .../src/Makefile | 0 .../src/xsysmonpsu.c | 156 +- .../src/xsysmonpsu.h | 40 +- .../src/xsysmonpsu_g.c | 2 +- .../src/xsysmonpsu_hw.h | 53 + .../src/xsysmonpsu_intr.c | 0 .../src/xsysmonpsu_selftest.c | 0 .../src/xsysmonpsu_sinit.c | 0 .../{ttcps_v3_1 => ttcps_v3_2}/src/Makefile | 0 .../{ttcps_v3_1 => ttcps_v3_2}/src/xttcps.c | 12 +- .../{ttcps_v3_1 => ttcps_v3_2}/src/xttcps.h | 64 +- .../{ttcps_v3_1 => ttcps_v3_2}/src/xttcps_g.c | 2 +- .../src/xttcps_hw.h | 0 .../src/xttcps_options.c | 0 .../src/xttcps_selftest.c | 0 .../src/xttcps_sinit.c | 0 .../{uartps_v3_1 => uartps_v3_3}/src/Makefile | 0 .../src/xuartps.c | 0 .../src/xuartps.h | 1 + .../src/xuartps_g.c | 2 +- .../src/xuartps_hw.c | 0 .../src/xuartps_hw.h | 0 .../src/xuartps_intr.c | 2 +- .../src/xuartps_options.c | 3 + .../src/xuartps_selftest.c | 0 .../src/xuartps_sinit.c | 0 .../libsrc/usbpsu_v1_1/src/Makefile | 40 + .../libsrc/usbpsu_v1_1/src/xusbpsu.c | 906 +++++++++++ .../libsrc/usbpsu_v1_1/src/xusbpsu.h | 608 ++++++++ .../src/xusbpsu_controltransfers.c | 681 +++++++++ .../libsrc/usbpsu_v1_1/src/xusbpsu_endpoint.c | 927 +++++++++++ .../libsrc/usbpsu_v1_1/src/xusbpsu_endpoint.h | 184 +++ .../libsrc/usbpsu_v1_1/src/xusbpsu_g.c | 55 + .../libsrc/usbpsu_v1_1/src/xusbpsu_hw.h | 363 +++++ .../libsrc/usbpsu_v1_1/src/xusbpsu_intr.c | 434 ++++++ .../libsrc/usbpsu_v1_1/src/xusbpsu_sinit.c | 99 ++ .../libsrc/wdtps_v3_0/src/xwdtps_g.c | 2 +- .../libsrc/zdma_v1_1/src/xzdma_g.c | 2 +- .../RTOSDemo_R5_bsp/system.mss | 107 +- .../libsrc/bram_v4_1/src/xbram_g.c | 2 +- .../libsrc/emaclite_v4_2/src/xemaclite_g.c | 2 +- .../libsrc/gpio_v4_1/src/xgpio_g.c | 2 +- .../libsrc/intc_v3_5/src/xintc_g.c | 2 +- .../libsrc/standalone_v5_4/src/bspconfig.h | 2 +- .../src/microblaze_exceptions_g.h | 2 +- .../src/microblaze_interrupts_g.c | 2 +- .../libsrc/tmrctr_v4_1/src/xtmrctr_g.c | 2 +- .../libsrc/uartlite_v3_2/src/xuartlite_g.c | 2 +- .../RTOSDemo/.cproject | 2 +- .../RTOSDemo/.project | 37 +- .../RTOSDemo/src/FreeRTOSConfig.h | 2 + .../RTOSDemo/src/Full_Demo/main_full.c | 11 +- .../portable/GCC/ARM_CA53_64_BIT/port.c | 28 +- .../portable/GCC/ARM_CA53_64_BIT/portASM.S | 46 +- .../portable/GCC/ARM_CA53_64_BIT/portmacro.h | 7 +- FreeRTOS/Source/portable/GCC/ARM_CM3/port.c | 23 +- .../Source/portable/GCC/ARM_CR5/portASM.S | 7 +- .../Source/portable/IAR/ARM_CA9/portASM.s | 8 +- 266 files changed, 8287 insertions(+), 2117 deletions(-) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{axipmon_v6_4 => axipmon_v6_5}/src/Makefile (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{axipmon_v6_4 => axipmon_v6_5}/src/xaxipmon.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{axipmon_v6_4 => axipmon_v6_5}/src/xaxipmon.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{axipmon_v6_4 => axipmon_v6_5}/src/xaxipmon_g.c (95%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{axipmon_v6_4 => axipmon_v6_5}/src/xaxipmon_hw.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{axipmon_v6_4 => axipmon_v6_5}/src/xaxipmon_selftest.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{axipmon_v6_4 => axipmon_v6_5}/src/xaxipmon_sinit.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{canps_v3_1 => canps_v3_2}/src/Makefile (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{canps_v3_1 => canps_v3_2}/src/xcanps.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{canps_v3_1 => canps_v3_2}/src/xcanps.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{canps_v3_1 => canps_v3_2}/src/xcanps_g.c (94%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{canps_v3_1 => canps_v3_2}/src/xcanps_hw.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{canps_v3_1 => canps_v3_2}/src/xcanps_hw.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{canps_v3_1 => canps_v3_2}/src/xcanps_intr.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{canps_v3_1 => canps_v3_2}/src/xcanps_selftest.c (99%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{canps_v3_1 => canps_v3_2}/src/xcanps_sinit.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{coresightps_dcc_v1_2 => coresightps_dcc_v1_3}/src/Makefile (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{coresightps_dcc_v1_2 => coresightps_dcc_v1_3}/src/xcoresightpsdcc.c (93%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{coresightps_dcc_v1_2 => coresightps_dcc_v1_3}/src/xcoresightpsdcc.h (92%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{csudma_v1_0 => csudma_v1_1}/src/Makefile (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{csudma_v1_0 => csudma_v1_1}/src/xcsudma.c (99%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{csudma_v1_0 => csudma_v1_1}/src/xcsudma.h (98%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{csudma_v1_0 => csudma_v1_1}/src/xcsudma_g.c (94%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{csudma_v1_0 => csudma_v1_1}/src/xcsudma_hw.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{csudma_v1_0 => csudma_v1_1}/src/xcsudma_intr.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{csudma_v1_0 => csudma_v1_1}/src/xcsudma_selftest.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{csudma_v1_0 => csudma_v1_1}/src/xcsudma_sinit.c (100%) create mode 100644 FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/ddrcpsu_v1_1/src/Makefile create mode 100644 FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/ddrcpsu_v1_1/src/xddrcpsu.h rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{emacps_v3_2 => emacps_v3_3}/src/Makefile (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{emacps_v3_2 => emacps_v3_3}/src/xemacps.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{emacps_v3_2 => emacps_v3_3}/src/xemacps.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{emacps_v3_2 => emacps_v3_3}/src/xemacps_bd.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{emacps_v3_2 => emacps_v3_3}/src/xemacps_bdring.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{emacps_v3_2 => emacps_v3_3}/src/xemacps_bdring.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{emacps_v3_2 => emacps_v3_3}/src/xemacps_control.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{emacps_v3_2 => emacps_v3_3}/src/xemacps_g.c (94%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{emacps_v3_2 => emacps_v3_3}/src/xemacps_hw.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{emacps_v3_2 => emacps_v3_3}/src/xemacps_hw.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{emacps_v3_2 => emacps_v3_3}/src/xemacps_intr.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{emacps_v3_2 => emacps_v3_3}/src/xemacps_sinit.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{iicps_v3_1 => iicps_v3_4}/src/Makefile (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{iicps_v3_1 => iicps_v3_4}/src/xiicps.c (97%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{iicps_v3_1 => iicps_v3_4}/src/xiicps.h (99%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{iicps_v3_1 => iicps_v3_4}/src/xiicps_g.c (94%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{iicps_v3_1 => iicps_v3_4}/src/xiicps_hw.c (98%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{iicps_v3_1 => iicps_v3_4}/src/xiicps_hw.h (99%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{iicps_v3_1 => iicps_v3_4}/src/xiicps_intr.c (98%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{iicps_v3_1 => iicps_v3_4}/src/xiicps_master.c (95%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{iicps_v3_1 => iicps_v3_4}/src/xiicps_options.c (97%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{iicps_v3_1 => iicps_v3_4}/src/xiicps_selftest.c (98%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{iicps_v3_1 => iicps_v3_4}/src/xiicps_sinit.c (98%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{iicps_v3_1 => iicps_v3_4}/src/xiicps_slave.c (96%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{ipipsu_v2_0 => ipipsu_v2_1}/src/Makefile (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{ipipsu_v2_0 => ipipsu_v2_1}/src/xipipsu.c (92%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{ipipsu_v2_0 => ipipsu_v2_1}/src/xipipsu.h (98%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{ipipsu_v2_0 => ipipsu_v2_1}/src/xipipsu_g.c (94%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{ipipsu_v2_0 => ipipsu_v2_1}/src/xipipsu_hw.h (94%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{ipipsu_v2_0 => ipipsu_v2_1}/src/xipipsu_sinit.c (93%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{qspipsu_v1_0 => qspipsu_v1_3}/src/Makefile (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{qspipsu_v1_0 => qspipsu_v1_3}/src/xqspipsu.c (84%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{qspipsu_v1_0 => qspipsu_v1_3}/src/xqspipsu.h (88%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{qspipsu_v1_0 => qspipsu_v1_3}/src/xqspipsu_g.c (94%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{qspipsu_v1_0 => qspipsu_v1_3}/src/xqspipsu_hw.h (93%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{qspipsu_v1_0 => qspipsu_v1_3}/src/xqspipsu_options.c (70%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{qspipsu_v1_0 => qspipsu_v1_3}/src/xqspipsu_sinit.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{rtcpsu_v1_2 => rtcpsu_v1_3}/src/Makefile (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{rtcpsu_v1_2 => rtcpsu_v1_3}/src/xrtcpsu.c (82%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{rtcpsu_v1_2 => rtcpsu_v1_3}/src/xrtcpsu.h (97%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{rtcpsu_v1_2 => rtcpsu_v1_3}/src/xrtcpsu_g.c (94%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{rtcpsu_v1_2 => rtcpsu_v1_3}/src/xrtcpsu_hw.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{rtcpsu_v1_2 => rtcpsu_v1_3}/src/xrtcpsu_intr.c (95%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{rtcpsu_v1_2 => rtcpsu_v1_3}/src/xrtcpsu_selftest.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{rtcpsu_v1_2 => rtcpsu_v1_3}/src/xrtcpsu_sinit.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{scugic_v3_2 => scugic_v3_5}/src/Makefile (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{scugic_v3_2 => scugic_v3_5}/src/xscugic.c (82%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{scugic_v3_2 => scugic_v3_5}/src/xscugic.h (92%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{scugic_v3_2 => scugic_v3_5}/src/xscugic_g.c (94%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{scugic_v3_2 => scugic_v3_5}/src/xscugic_hw.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{scugic_v3_2 => scugic_v3_5}/src/xscugic_hw.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{scugic_v3_2 => scugic_v3_5}/src/xscugic_intr.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{scugic_v3_2 => scugic_v3_5}/src/xscugic_selftest.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{scugic_v3_2 => scugic_v3_5}/src/xscugic_sinit.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{sdps_v2_7 => sdps_v3_1}/src/Makefile (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{sdps_v2_7 => sdps_v3_1}/src/xsdps.c (90%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{sdps_v2_7 => sdps_v3_1}/src/xsdps.h (85%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{sdps_v2_7 => sdps_v3_1}/src/xsdps_g.c (89%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{sdps_v2_7 => sdps_v3_1}/src/xsdps_hw.h (94%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{sdps_v2_7 => sdps_v3_1}/src/xsdps_options.c (67%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{sdps_v2_7 => sdps_v3_1}/src/xsdps_sinit.c (98%) delete mode 100644 FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/standalone_v5_4/src/xil_io.h rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/Makefile (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/_exit.c (51%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/_open.c (95%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/_sbrk.c (97%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/abort.c (96%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/asm_vectors.S (87%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/boot.S (96%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/bspconfig.h (94%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/changelog.txt (77%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/close.c (95%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/config.make (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/cpu_init.S (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/errno.c (96%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/fcntl.c (93%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/fstat.c (96%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/getpid.c (96%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/inbyte.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xddr_xmpu0_cfg.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xddr_xmpu1_cfg.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xddr_xmpu2_cfg.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xddr_xmpu3_cfg.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xddr_xmpu4_cfg.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xddr_xmpu5_cfg.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xfpd_slcr.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xfpd_slcr_secure.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xfpd_xmpu_cfg.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xfpd_xmpu_sink.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xiou_secure_slcr.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xiou_slcr.h (77%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xlpd_slcr.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xlpd_slcr_secure.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xlpd_xppu.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xlpd_xppu_sink.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/includes_ps/xocm_xmpu_cfg.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/isatty.c (97%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/kill.c (89%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/lseek.c (97%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/mpu.c (96%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/open.c (94%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/outbyte.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/print.c (99%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/putnum.c (96%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/read.c (78%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/sbrk.c (97%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/sleep.c (96%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/sleep.h (92%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/uart.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/unlink.c (96%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/usleep.c (96%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/vectors.c (73%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/vectors.h (87%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/write.c (89%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xbasic_types.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xdebug.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xenv.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xenv_standalone.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil-crt0.S (86%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_assert.c (97%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_assert.h (97%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_cache.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_cache.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_cache_vxworks.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_exception.c (60%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_exception.h (85%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_hal.h (100%) create mode 100644 FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/standalone_v6_1/src/xil_io.c rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4/src/xil_io.c => standalone_v6_1/src/xil_io.h} (57%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_macroback.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_mmu.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_mpu.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_mpu.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_printf.c (81%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_printf.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_testcache.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_testcache.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_testio.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_testio.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_testmem.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_testmem.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xil_types.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xparameters_ps.h (82%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xplatform_info.c (97%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xplatform_info.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xpm_counter.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xpm_counter.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xpseudo_asm.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xpseudo_asm_gcc.h (71%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xreg_cortexr5.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xstatus.h (98%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xtime_l.c (88%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{standalone_v5_4 => standalone_v6_1}/src/xtime_l.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{sysmonpsu_v1_0 => sysmonpsu_v2_0}/src/Makefile (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{sysmonpsu_v1_0 => sysmonpsu_v2_0}/src/xsysmonpsu.c (93%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{sysmonpsu_v1_0 => sysmonpsu_v2_0}/src/xsysmonpsu.h (92%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{sysmonpsu_v1_0 => sysmonpsu_v2_0}/src/xsysmonpsu_g.c (94%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{sysmonpsu_v1_0 => sysmonpsu_v2_0}/src/xsysmonpsu_hw.h (97%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{sysmonpsu_v1_0 => sysmonpsu_v2_0}/src/xsysmonpsu_intr.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{sysmonpsu_v1_0 => sysmonpsu_v2_0}/src/xsysmonpsu_selftest.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{sysmonpsu_v1_0 => sysmonpsu_v2_0}/src/xsysmonpsu_sinit.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{ttcps_v3_1 => ttcps_v3_2}/src/Makefile (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{ttcps_v3_1 => ttcps_v3_2}/src/xttcps.c (97%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{ttcps_v3_1 => ttcps_v3_2}/src/xttcps.h (89%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{ttcps_v3_1 => ttcps_v3_2}/src/xttcps_g.c (94%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{ttcps_v3_1 => ttcps_v3_2}/src/xttcps_hw.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{ttcps_v3_1 => ttcps_v3_2}/src/xttcps_options.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{ttcps_v3_1 => ttcps_v3_2}/src/xttcps_selftest.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{ttcps_v3_1 => ttcps_v3_2}/src/xttcps_sinit.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{uartps_v3_1 => uartps_v3_3}/src/Makefile (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{uartps_v3_1 => uartps_v3_3}/src/xuartps.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{uartps_v3_1 => uartps_v3_3}/src/xuartps.h (99%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{uartps_v3_1 => uartps_v3_3}/src/xuartps_g.c (94%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{uartps_v3_1 => uartps_v3_3}/src/xuartps_hw.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{uartps_v3_1 => uartps_v3_3}/src/xuartps_hw.h (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{uartps_v3_1 => uartps_v3_3}/src/xuartps_intr.c (99%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{uartps_v3_1 => uartps_v3_3}/src/xuartps_options.c (99%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{uartps_v3_1 => uartps_v3_3}/src/xuartps_selftest.c (100%) rename FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/{uartps_v3_1 => uartps_v3_3}/src/xuartps_sinit.c (100%) create mode 100644 FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/usbpsu_v1_1/src/Makefile create mode 100644 FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/usbpsu_v1_1/src/xusbpsu.c create mode 100644 FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/usbpsu_v1_1/src/xusbpsu.h create mode 100644 FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/usbpsu_v1_1/src/xusbpsu_controltransfers.c create mode 100644 FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/usbpsu_v1_1/src/xusbpsu_endpoint.c create mode 100644 FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/usbpsu_v1_1/src/xusbpsu_endpoint.h create mode 100644 FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/usbpsu_v1_1/src/xusbpsu_g.c create mode 100644 FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/usbpsu_v1_1/src/xusbpsu_hw.h create mode 100644 FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/usbpsu_v1_1/src/xusbpsu_intr.c create mode 100644 FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/usbpsu_v1_1/src/xusbpsu_sinit.c diff --git a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/.cproject b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/.cproject index 6e3a6cb23..f0c9f2a32 100644 --- a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/.cproject +++ b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/.cproject @@ -20,7 +20,7 @@ - @@ -29,14 +29,15 @@ - - @@ -55,6 +56,7 @@